SU1444818A1 - Device for walsh transform - Google Patents

Abstract

The invention relates to the field of automation and computer technology and can be used in information processing and compression equipment, in data transmission, in approximating devices of piecewise quadratic type. The purpose of the invention is to improve the accuracy of the conversion in the basis of Walsh piecewise quadratic functions. The goal is achieved due to the fact that the device includes a register 1, subtractors 2, 3, registers 4, 5, subtractor 6, a converter 7 in piecewise constant Walsh functions and synchronizer 8. 2 Il.

Description

four

4 4

00

00

not one

The invention relates to automation and computer technology and can be used in information processing and compression equipment, in data transmission, in annpokcuMHpyroniHX devices of piecewise quadratic type.

The purpose of the invention is to improve the accuracy of the transformation in the basis of piecewise quadratic Walsh functions.

The algorithm for calculating the coefficients in the basis of piecewise quadratic Walsh functions can be represented as follows:

 f 4: i (firb). (fi-fi f:. (.) (b)

f

fi

-I.

Ill step - calculation of the third, (). (). (.

The fourth step is to perform the transformation in the basis of piecewise-constant Walsh functions according to the procedure similar to the prototype device.

Fig, 1 shows the functional scheme of the device; Fig 2 is a functional diagram of the synchronizer.

The device for Walsh transformation contains register 1, drives 2, 3, registers 4, 5, subtractor 6, converter 7 by Walsh piecewise constant functions, synchronizer 8.

The synchronizer B (FIG. 2) generates a sequence of clock pulses at its outputs with a delay of half a period and can be executed, for example, on the element HE 9.

The device works as follows

At the time of inclusion all registers

zeroed out, signal counts f, f | five..

ff in series with the clock frequency are fed to the input of register 1, where they are delayed by one clock, while at the output of the subtractor 2 forms the first differences of fp, (f -frf), () ("-1 f)" Further, the first differences arrive at the first input of the subtractor 3, on

, R R,, R .R, W F R-i W FjW, (1)

where F (FR7 - the first difference;

F F, - RI - second differences;

Fj F third differences, I step - calculation of the first differences 5

f, f, f, fo, (f, -fn), (fi-: f,), (f, -fi) l. (2)

15

Step II - calculation of the second differences:

I

fi

-I.

The following:

(four)

the output of which forms the second differences of the form (3), t, e,

fl, (), (). (f r4 + f; -fc)

Claims (1)

in register 5, the received information is delayed by one cycle, which allows to output third differences, similar to the first, at the output of viewer 6. The third differences are fed successively to the converter 7, in which the orthogonal transformation of information is realized in a manner similar to the corresponding prototype block. To ensure guaranteed rewriting of information into registers 1,4, 5 and converter 7, pulse sequences are shifted relative to each other by half period on the first and second outputs of synchronizer B, and clocking of registers 1, 4, 5 and converter 7 is performed synchronously. Invention Formula A Walsh transform apparatus comprising a converter according to piecewise constant Walsh functions, a synchronizer, a first subtractor, and The first register, the output of which is connected to the first input of the subtractor, the output of which is connected to the information input of the converter, has a piecewise constant 1M Walsh function, the output of which is the information output of the device, the first output of the synchronizer is connected to the clock the input of the first register, distinguishing the converter paradise, is piecewise-sequential in order to increase the accuracy, the second and third registers are entered into it, the second and third subtractors, the first synchronizer output connected to the second input of the second register, the output of which is connected to the first input of the second subtractor, the output of which is connected to the first input of the third igniter, the output of which is connected to the information input of the first register, the second input of the first subtractor and information input of the third register, the stroke of which is connected to the second input of the third subtractor, the clock inputs of the third register-related Walsh functions are connected to the second output of the synchronizer, the clock input of which is the clock input of the device whose information input is the second register information input and the second input of the second subtractor. and Faye. 2