SU1444740A1 - Device for collecting and processing information - Google Patents

Abstract

The invention can be used for collecting and pre-processing analog information from sensors of various types with subsequent processing in a computer. The purpose of the invention is to increase the reliability of the input information. The device contains the first group of information inputs 1, switch 2, ADC 3, first register 4, first element 5, pulse generator 6, second element 8, delay element 9, second register 10, counter 11, third element 15, second group information inputs 16, gating input 17, start input 18, initial setup input 19, read input 20, information output 21, interrupt request output 22. This goal is achieved by introducing triggers 12, 13, 14 and frequency divider 7 into the device. Improving the reliability of the output information of the selected channel is carried out by synchronizing the initial installation of the device after starting it from the computer. 2 Il.

Description

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The invention relates to automation and computing and can be used to collect and pre-process analog information from sensors of various types with subsequent processing in a computer (for example, in automated control systems, in training systems and complexes aimed at developing skills and skills for managing dynamic objects).

The purpose of the invention is to increase the reliability of the input information.

FIG. 1 shows a block diagram of the proposed device; in fig. 2 - time diagrams of the device when entering information from the second information channel.

The device contains the first group of information inputs 1, switch 2, analog-to-digital converter 3, first register 4, first element 5, generator 6, pulses frequency divider 7, second element 8, delay element 9, second register 10, counter 11, the first 12, the second 13 and the third 14 trigger, the third element 15, the second group of information inputs 16, the gate input 17, the start input 18, the initial installation input 19, the read input 20, the information output 21 and the interrupt request output 22.

On the time diagrams are marked: a- the first output of the divider 7-6 - the second output of the divider 7; in - entrance 19; g - input 18; d - trigger output 12; e - trigger output 14; W - output element And 15; h - switched information channel; and - output analog-to-digital converter 3; to - output element 9 delay; l - output register 4; m - exit zero counter 11; n - exit 22; about - input 20; p - exit 21.

The element base on which a device can be built, with the exception of analog-to-digital converter 3, is a series 155 chip.

In the device, the outputs of the information channels are connected to the information inputs of the switch 2, the output of which is connected via an analog-digital converter 3 to the information input of the first register 4, the output of which is connected to the information input of the first element 5, the output of which is information output 21 of the device, and An input input is a read input 20, the output of the second element AND 8 is connected to the delay element 9. The input of the frequency divider 7 is connected to the pulse generator 6, one of the outputs is connected to the input of the trigger 14, the other output is connected to the control inputs of the switch 2, the analog-digital converter 3 and the first input of the second element And 8, the second

the input of which is connected to the output of the third element I 15. The output of the delay element 9 is connected to the control input of the first register 4 and to the counting input of the counter 11, the group of inputs of which is connected to the information inputs 16 via the second register 10, the control input of the register 10 is connected to the input 17 gating, the output of zeroing the counter 11 is connected to the synchronous inputs of the first

12 and second 13 flip-flops, with the output of the latter being the interrupt request output 22. The initial installation input 19 is connected to the reset inputs of the first 12 and third 14 flip-flops and the installation input of the second flip-flop 13. The start 18 of the trigger is connected to the installation inputs of the counter 11 and the first trigger 12, the output of which is connected to the first input of the third element 15 and the third information input trigger 14, the output of which is connected to the second input of the third element I 15, the information inputs of the first. 12 and 13 second triggers are connected by the total potential of the device.

The device works as follows. After turning on the power, a pulse generator 6 is started (Fig. 1), of which the frequency divider 7 forms two series of pulses (Fig. 2). The number of pulses in the second series corresponds to the number of information channels, and the number of pulses of the first series is one per number of channels, and each pulse of the first series is ahead of the first pulse of the second series. A computer signal (not shown) on the input 19 of the initial installation triggers 12-14 are installed, are reset (triggers 12

and 4 is reset and trigger 13 is set). In this case, the interrupt signal at the output 22 of the trigger 13 is absent. The strobe signal from the computer at input 17 is entered into the second register.

0 10 code of the information channel number on the inputs 16.

Then a computer signal on the input 18 run

the code of the information channel number is entered (- scgs from register 10 into counter II, as a result of which the first trigger 12 is set. Then the pulse edge of the first series arriving at the synchronous input of the third trigger 14 is fixed. The same pulse at the same pulse of the first series, the input to the initial setup of the switch 2, the latter is set to the initial state. The pulses of the second series arriving at the control input of the switch 2 control the sequential alternating connection of information input channels to analog-to-digital converter 3, which start is carried out by the same second pulse chaff.

After the trigger 12 and trigger 14 are set, element 15 gives the enable signal to the second element 8, with the result that the pulses of the second series from the frequency divider 7 through the second element 8 begin to flow through the delay element 9 to the control input of the first register 4 and the counting input setter 11 operating in subtraction mode.

If it is necessary to enter information from all or part of the channels into the computer, then the code of the last of the specified information channels is pre-recorded in the second register 10 from the computer, and at the input 20, the first element 5 And 5

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the mutator, the information inputs of which are the first group of information inputs of the device, the switch outputs are connected to the information inputs of the analog-digital converter, the outputs of which are connected to the information inputs of the first register, the first, second and third elements And, the counter, the delay element whose input is connected to the output of the second element is And, the pulse generator, the second register, characterized in that, in order to increase the reliability of the entered information, the first, second and third trig EASURES and frequency divider whose input soediustanavlivaets enable signal. At 15 it with the output of the pulse generator,

the first output is connected to the input of the initial installation of the switch and the sync input of the third trigger, and the second output is connected to the control inputs of the switch and the analog-digital converter and to the first input of the second And element, the output of the first register is connected to the information inputs of the first And element, the outputs of which These are informational outputs of the device, and after starting up the computer, the codes of analog values from the first to the last of the specified information channels are sequentially output to the computer.

If it is necessary to enter into the computer information only on one (specified) information channel, then in the second register 0- from the computer, the code of the specified information channel is preliminarily entered.

20

Counter 11 operates in the subtract-25 input mode of the first element AND is

neither When it is zeroed, the zeroing signal resets triggers 12 and 13. At the same time, the third element 15 is blocked, from which output the permissive signal for passing through the second element And 8 pulses of the second series is removed.

The control input from the first register 4 ceases to receive signals permitting the recording of information from the next channel from the analog-digital converter 3. Therefore, it is stored in the first

the readout input of the device, the output of the delay element is connected to the control input of the first register and to the counting input of the counter, the installation input of which is connected to the installation input of the first trigger and is the start input of the device, the output of the counter is connected to the sync inputs of the first and second triggers The information inputs of the second register are the second group of information inputs of the device, controlling the input of the second

register 4 digital code analog register value 35 is the gate input

the rank of the specified information channel remains in it. At the same time, the signal at the output 22 of the second trigger 13 signals that the device is ready to enter into the computer the reading of the information of the first element I 5 from the computer the enabling signal and information from the first register 4 are received through the first element 5 through the information devices, and the outputs are reset and the first and third triggers are connected to the installation input of the second trigger and a formation along a given channel, being the input of the initial installation by means of an interrupt signal. In response to the input of the 20 device, the information inputs of the first

and the second trigger is connected to the zero potential bus, the direct output of the first trigger is connected to the information input of the third trigger, and with the first input output 21 of the device is entered into 45 DO of the third element AND, direct output

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the third trigger is connected to the second input of the third element AND, the output of which is connected to the second input of the second element AND, the inverse output of the second trigger is the output of the interrupt request.

A device for collecting and preprocessing information containing

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the mutator, the information inputs of which are the first group of information inputs of the device, the switch outputs are connected to the information inputs of the analog-digital converter, the outputs of which are connected to the information inputs of the first register, the first, second and third elements And, the counter, the delay element whose input is connected to the output of the second element is And, the pulse generator, the second register, characterized in that, in order to increase the reliability of the entered information, the first, second and third trig The sensors and the frequency divider, whose input is connected to the readout of the device, the output of the delay element is connected to the control input of the first register and the counting input of the counter, the installation input of which is connected to the installation input of the first trigger and is the device start input, the output of the counter is connected to the syncro - the inputs of the first and second triggers, the information inputs of the second register are the second group of information inputs of the device, the control input of the second

the register is a gating input

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the third trigger is connected to the second input of the third element And, the output of which is connected to the second input of the second element And, the inverse output of the second trigger is the output of the interrupt-P request

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Claims (1)

Claim A device for collecting and pre-processing information containing a switch, the information inputs of which are the first group of information inputs of the device, the outputs of the switch are connected to the information inputs of an analog-to-digital converter, the outputs of which are connected to the information inputs of the first register, the first, second and third elements , a counter, a delay element, the input of which is connected to the output of the second element And, a generator of ¹ pulse, a second register, characterized in that, in order to increase the reliability In addition to the input information, the first, second and third triggers and a frequency divider are introduced into the device, the input of which is connected to the output of the pulse generator, the first output is connected to the input of the initial installation of the switch and the sync input of the third trigger, and the second output is connected to the control inputs of the switch and analog digital converter 20 and with the first input of the second element And, the output of the first register is connected to the information inputs of the first element And, the outputs of which are information outputs of the device, controlling the input input of the first element And is the input of the readout of the device, the output of the delay element is connected to the control input of the first register and to the counter input of the counter, the installation input of which is connected to the installation input of the first trigger 30 of the generator and is the input of the device start, the output of the counter is connected to the clock inputs of the first and second triggers , the information inputs of the second register are the second group of information inputs of the device, the control input of the second 35 register is the gating input of the device, and the outputs are connected they are connected to the information inputs of the counter, the reset inputs of the first and third triggers are connected to the installation input of the second trigger and are the input of the initial installation of the device, the information inputs of the first and second triggers are connected to the zero potential bus, the direct output of the first trigger is connected to the information input of the third trigger and the first the house of the third element And, the direct output of the third trigger is connected to ^ the second input of the third element And, the output of which is connected to the second input of the second element And, inverse you od is the output of the second trigger request prery50 device Bani. Ί __________________________________ J ____ P. L Phage 2 Compiled by S. Kulish Editor A. Revin Order 6481/46 Tehred I. Veres Corrector A. Obruchar Circulation 704 Subscription VNIIIPI of the USSR State Committee for Inventions and Discoveries 113035, Moscow, Zh-35, Raushskaya nab., D. 4/5 Production and printing company, Uzhhorod, st. Project, 4