SU1425839A1 - Adaptive delta-coder - Google Patents

Description

(21) 4218399 / 24-24

(22) 01/04/87

(46) 09/23/88. Bksh. No. 35

(72) B, W. Zlatkin, V.A. Petros n

and S.O. Starlings

(53) 621.376.56 (088.8)

(56) TIIER, 1967, No. 3, p. 59-71. USSR author's certificate

No. 1193820, cl. H 03 M 3/02, 1984.

Delta Moduli Theory and Application ™. - M .: Holy Horn, 1976, p. 188, fig. 7.8.

(54) ADAPTIVE DELTA CODER

(57) The invention relates to automation and communication technology. Its use in information transmission systems will improve the accuracy of the delta coder containing subtractor 2, compyrator 4, pulse sequence generator 5, pulse amplitude modulator 6, integrator 7 to control signal generator 10. By introducing the lower 1 and upper 11 frequency filters, the subtractor 3, the integrators 8 and 9, the rectifier 12, the cy materopa (3, the multiplier 14, the constant voltage source 15 and the functional transducer 16 ensures continuous monitoring of the spectrum of the approximating signal, resulting filter out the high-frequency components of the signal spectrum, the level of which le-.g lives below the quantization noise level. 3 Il,

The invention relates to automation and communication technology and may be used in information transmission systems with delta modulation (DM).

The purpose of the invention is to improve the accuracy of the delta coder,

Fig, 1 shows a functional diagram of an adaptive delta coder; f) a fig ,, 2 - signal and noise spectra. yvaitovani; in fig. 3 - diagrams of the delta coder. ; The adaptive delta coder contains a low-pass filter 1 (LPF), the first 3 and second 3 subtractors, a comparator 4a, a pulse-shaper driver 5 (in the simplest case Trigger) is an amplitude-pulse module (torus 6 (AIM) 5 first-third integrator TJopbi 7-9, driver, 10 signals 3 | 5, filter 11, upper frequencies SPHF) 5 rectifier 12 (two-half-full) adder 13, multiplier 14, source 15 constant voltage AND functional converter 16, Information 17 and clock 18 inputs nj output 1 9 o

; The control signal generator 10 serves to control the quantization step depending on the input signal and can be implemented in the same way as in the known device: The adaptive delta coder works in a similar way.

The speech signal (UCt) limited by the spectrum in the low-pass filter 1, coming from the input 175 is compared in the subtractor 2 with the approximating signal UCt) generated at the output of the integrator 7 In accordance with the output pulse sequence. The difference signal U (t) - U (t) is fed to comparator 4j deciding on the sign of this signal. At times determined by the clock frequency at input 18, the output of driver 5 produces a stream of ones and zeros in accordance with the sign of the difference signal.

This sequence is fed to the local decoder and from output 19 to the beat of the connection. In the delta coder scheme, it is provided5 that the positive Polarity of the difference signal corresponds to symbols 1 in the information sequence at output 19 and an increase in the approximating signal at the output of the local decoder (integrator output 7), and negative polarity - the symbols O and reduction

approximating signal. The absolute value of the increment generated in integrator 7 depends on the voltage value at the control input of the AIM 6, the function of the AIM 6 also includes the conversion of the unipolar signal at the input, corresponding to the levels O and 1, into the bipolar signal at the exit .

The optimal increment value Ep of the approximating signal (quantization step) generated at the output of multiplier 14 is a function of two quantities: the current power of the derived signal D and the upper frequency of the input signal spectrum equal to the cutoff frequency of the low-pass filter 1, and they are related as follows:

 F (,); (f) L. In

f-r

(one)

five

0

five

0

five

0

five

where f is the clock frequency (constant).

The voltage, numerically equal, at one of the inputs of the multiplier 14 is formed by analyzing the output pulse sequence in the shaper 10. The second input of the multiplier 14 receives the voltage, due to the current value of the cutoff frequency fg of the low-pass filter 1, It is obtained by converting the value .f ( ., equal to the control voltage of the low-pass filter 1, formed at the output of the integrator 9 in the converter 16, which realizes the conversion according to (1),

The limitation of the signal spectrum in the low-pass filter 1 is performed so that the upper weak components of the signal spectrum, which, when decoding the signal will be below the level of quantization noise, are not input to the delta coder. A similar limitation, but the approximating signal is produced in the decoder, which is equivalent to the local decoder, which leads to the excision of that part of the spectrum that lies in the level of quantization noise.

Since both the shape of the signal spectrum and the quantization noise level vary over time, the cutoff frequency of the low-pass filter 1 varies in accordance with these factors based on an analysis of the approximating signal and the 31A25839

The quantization steps in the local decoder.

In order to clarify the principle of the shaping voltage of the cut-off frequency control, consider an approximating signal in the frequency domain. Fig. 2 shows schematically its spectrum containing components of the useful signal (C) and quantization noise (W). The frequency f is plotted on the abscissa, and the spectral density is plotted on the ordinate (5. By filtering in the low-pass filter 11, the cutoff frequency of which coincides with the cutoff frequency of the PES 1, an out-of-band part of the spectrum, consisting mainly of quantization noise, is obtained (Fig. 26) .The full-wave tuner is monitored for the frequency fJ, which is slightly shifted relative to f by f.

c Consider the process of adaptation. Two initial states are possible.

Let in the initial state of the cutoff frequency fc f ((FIG. Za). In this case

10 the voltage uU at the output of the subtractor 3 (li and. / And + and) 0. Integration of the positive voltage L U in the integrator 9 leads to a continuous increase in the voltage across its output, which shifts the cutoff frequency of the low-pass filter 1 and the high-pass filter 11 to high frequencies. The output voltage of converter 16 decreases in accordance with the second integrator 8 calculations with function (f) (O, thereby the current level U, out-of-band 20 maintaining the quantized value of the quantized part of the approximating signal. The optimal process. Process quantization noise in the absence of an overload is directly proportional to the voltage U at the output is continued until the voltage U decreases (and UQ and fj. f,. Dweller 14, equal to the quantization step. 25 will become zero, t You are a.

The value of U is compared with the voltage of the integrator 9 by the fixation of u2) shifted by the sum-

torus 13 and source 15 to a small

UQ value. Voltage difference

and rebuilding is no longer carried out.

Let in the initial state

at the output of the subtractor 3 integrates - 0 s (Figb). In this case, U

and

35

di and, - (and + Ug) - and. The voltage at the output of the integrator 9 decreases, shifting the cutoff frequency of the filter 1 and 11 to the low frequency range. The output voltage of converter 16 increases, maintaining optimum. The adjustment is carried out to the frequency fc f, while U + UQ and, and di O, therefore,

c in the integrator 9 and is fed to the control inputs of the low-pass filter 1 and high-pass filter 11, as well as to the input of the converter 16.

Adjusting the low pass filter 1 and high pass filter. 11 is carried out so that the cutoff frequency monitors the point of intersection of the envelopes of the spectra of the signal and noise (this point corresponds to the frequency f, in FIG. 2a). For this, the out-of-band approximation levels are compared. the termination of the signal U, and the quantization noise U, which

when tracking is present (set in. Thus, the voltage controlled mode) must be equal to the cut-off frequency of UFNCH 1 and UHF-frequency, because the quantization noise is calculated. On the basis of the analysis, the limit along the frequency axis is comparative. with approximating signal and magnitude uniformly. The increase in U, relative to the quantization step 5, but depends on but also indicates that the out-of-frequency cutoff and power of the derivative is the band part of the approximating signal D. Moreover, any deviation of the signal contains not only the noise of the quantum-frequency fj from ff due to the switch, but also the signal itself. At the same time, the frequency distribution of the signal spectrum and the cutoff level of the controlled filters 1 and n noise lead to a corresponding 11 increase (Fig. 3a). A small tuning of the cut-off frequency and step offset U ,, corresponding to reduction of quantization so that the cut-off frequency is kept at f, equality fj, f, and optimality are introduced. long Ensuring that this allows limiting the weak high cases where the cut-off frequency to the frequency components of the spectrum goes to Bbmie frequency f, (FIG. 36). In a signal that is lower than this, the cut-off frequency of the quantization noise level filters results in a decrease. Thus, the actual signal-to-noise ratio of quantoks is monitored for the frequency fJ, which is slightly shifted relative to f by f.

Let us consider the process of adaptation. Two initial states are possible.

Let in the initial state of the cutoff frequency fc f ((FIG. Za). In this case

the voltage uU at the output of the subtractor 3 (whether u. / and + and) 0. Integrating the positive voltage L U in the integrator 9 leads to a continuous increase in the voltage at its output, which shifts the cutoff frequency of the low-pass filter 1 and the high-pass filter 11 to the high frequencies . The output voltage is transformed with (Fig. 4b). In this case, U

and

di and, - (and + Ug) - and. The voltage at the output of the integrator 9 decreases, shifting the cutoff frequency of the filter 1 and 11 to the low frequency range. The output voltage of converter 16 increases, maintaining optimum. The adjustment is carried out to the frequency fc f, while U + UQ and, and di O, therefore,

construction stops,

The delta transform increases.

Claims (1)

Invention Formula the one and the low-pass filter, the information input of which is the digital input of the delta coder, you-: control signal generator is connected to the first input multiply ten l, the output of which is connected to the control input of the amplitude-pulse modulator and the first input of the adder, the output of the constant voltage source is connected to the second input cj of the adder, the output of which is connected to the subtracting input of the second readout, the output of which through the third input An adaptive delta coder containing the first subtractor, the output of which is connected to the input of a comparator, the output of which is connected to the information input of the pulse / sequence generator, the clock input of which is the clock input of the delta coder, the output of the pulse sequencer of the subgigrator connected to the control The BCS is connected to the information input of the amplitude of the high-pass filter and the filter-pulse modulator, the input of the low-pass frequency and the input of the function of the control signal generator and nogo transducer output is output koto delta coder cerned You are a second input connected to the shift pulse amplitude modulator zo multiplier, the output of lower filter chas- through the first integrator is coupled to the summing input coupled to the input of the first subtractor vmitatel,. characterized in that, with the first subtractor, the information input of the high-pass filter is connected to the output of the first integrator, 25 the output of the high-pass filter is connected through a rectifier connected in series, and the second integrator is connected to the summing input of the second subtraction with a target of increasing the delta coder, the second and third integrators are entered into it, subtractor, adder, constant voltage source, multiplier, functional converter, high-pass filter The low pass filter, the information input of which is the information input of the delta coder, you-: the control signal generator is connected to the first input; the multiplier detector is connected to the high pass filter control and low pass filter and the function input. the inverter, the output of which is connected to the second input of the sump, the output of the low-pass filter is connected to the summing input l, the output of which is connected to the control input of the amplitude-pulse modulator and the first input of the adder, the output of the constant voltage source is connected to the second input cj of the adder, the output of which is connected to the subtracting input of the second readout, the output of which through the third input The teerator is connected to the control BHOs of a high-pass filter and a low-pass filter and the input of a functional converter, the output of which is connected to the second input of the multiplier, the output of the low-pass filter is connected to the summing input The teerator is connected to the control BHOs of a high-pass filter and a low-pass filter and the input of a functional converter, the output of which is connected to the second input of the multiplier, the output of the low-pass filter is connected to the summing input the first subtractor, the information input of the high-pass filter is connected to the output of the first integrator, the output of the high-pass filter is connected via a rectifier connected in series, and the second integrator is connected to the summing input of the second subtraction 1  With OO  J Fie.2 d Jc // L /// L - S:% fig.d