SU1406738A1 - Generator of pseudorandom sequences - Google Patents

Abstract

The invention can be used in information-measuring and instrumentation technology. The purpose of the invention is to expand the functionality of the device. The generator contains N registers 1.1, ..., 1.N, a block of 3 additions, a group of blocks of 2.1 multiplication, an element 4, a generator of 8 pulses. The introduction of (N-1) multiplication unit groups, (N-1) addition blocks, control block 5, information bus groups 6, control bus 7, and the formation of new functional connections increases the number of sequences generated. The description provides an example of the implementation of control block 5. 1 hp f-ly, 3 ill.

Description

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And: and - the appliance is related to the impuls technique; and it can be used both by the information-measuring and control-test technique.

The aim of the invention is to improve the functionality by increasing the number of sequences generated.

FIG. 1 shows the structure of the pseudo-random sequence generator; in fig. 2 is a diagram of an example of a specific embodiment of a pseudo-random sequence generator; in fig. 3 is a transition diagram of the device of FIG. 2

The pseudo-random sequence generator (Fig. 1) contains N registers 1.1-1.N, N groups 2.1-2.N multiplicators, N blocks 3.1-3.N add, element 4, control block 5, information bus group 6, bus 7, the generator 8 impulses, the output of which is connected to the synchronization inputs of registers 1.1-1.N and to the input of the control unit 5, the output of which is connected to the second input of the And 4 element, the first input of which is connected to the control bus 7. The output of the AND 4 element is connected to the inputs jx jx of the addition blocks 3j (j 1, N), the outputs of which are connected to the information inputs jx of registers 1J, the outputs of which are connected to the corresponding inputs of the multiplication blocks jx of groups 2j, the outputs of which are connected to the inputs jx blocks 3J add, the corresponding inputs of which are connected to a group of 6 information tires. The outputs of the registers 1.1-1.N are connected to the corresponding information inputs of the control unit 5.

The control unit 5 (Fig. 2) contains N groups of 9 decoders, the corresponding codes of which are connected to the corresponding inputs of the corresponding elements AND group 10 of the elements AND, the corresponding inputs of elements And which are connected to the output of the element OR 11, the inputs of which are connected to the corresponding outputs of the group 9 decoders, the inputs of which are the corresponding information inputs of the control unit 5, the input of which is connected to the input of the corresponding element AND of group 10, the output of the external element of the element

0 Q

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0

0

the swarm is the output of the j jawing.

The pseudo-array 1 H1 1x sequence works as follows.

Before starting, all the registers 1.1-1.N of the device are set to the initial zero state (in the drawing, the setup circuit is not shown in the initial state). In the presence of a signal O on agine 7 control, the device operates in a multichannel mode on a pseudo-random number generator or a multichannel signature analyzer (control bus or control codes are supplied to a group of 6 information buses, respectively).

If there is a signal O on the control bus 7 / the device operates in the mode of the generator of 2-prime numbers sequence (n-width of registers 1) of length 2 (in this case, a group of 6 information buses is given signals O). When the device operates in the generator mode of 2-prime sequences of length 2, it is possible to combine several generators: a signal from the output of the previous stage is supplied to the clock input of the generator of the next stage. Thus, it becomes possible to test complex digital devices, which are characterized by a different frequency of switching signals at the inputs, having various functional purposes: installation, synchronous inputs, address, information, control, etc.

When there is a signal O on the control bus 7, the registers 1i are switched in accordance with the following equations:

Q; (t-t-1) A l (t) - G a..Q. (T),,

 1) J

where a j - the elements of the accompanying

a matrix whose type is determined by the form of the generating polynomial F (x) and the decimation index K;

Q, (t) and

Q. (T + 1)

L (t)

the state of register 1i, respectively, at times t and (t + 1) (before and after the arrival of the trailing edge of a clock pulse); binary code on the i-th group of 61 information tires.

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If there is a signal 1 on the tin 7, the control regis 1 ry And switch n in accordance with the equations:

Nn

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Qi (t-H) A. (t) I. ajjQ, (t;) Zi: aj; and i iT N,

/ -

J where the signal Z is removed from the output of the block

management

With the initial zero state of the registers 1.1-1.N the following state of the registers 1, 1, lj, .. ,, 1 will be the state

N. N

EA.A. i: a;, a ;, La. ,, a .....

., a.

Further, the operation of the generator continues in accordance with the indicated equations. The last 2 nd state of the generator is a, a, a, .., a (a. O is the state of the i-ro register, i 1, N).

FIG. Figure 2 shows an example of running a pseudo-random sequence generator for (t (x) U) x -f t-X 1; p 2, where s is a primitive element of the field GF (22) O, 1, tJ, y.

Blocks 3.1 and 3.2 are implemented on modulo two adders. A signal 1 at the output of the decoder 9.1 appears in case the register 1.1 is in the zero state. The signal 1 appears at the output of the element OR 11 in case the register 1.2 is either in the zero state or in the state aO. Thus, at the output of block 5 connected to the input of the element 4, a signal 1 appears (Z 1) in the case when registers 1.1; 1.2 are in one of two states — 00 or O a (a and). The transition diagram of the example device is shown in FIG. 3.

Claims (2)

Invention Formula one . Pseudo-random sequence generator containing N re - ABOUT five Q five 0 five 0 five i, 4 gistron, pog) ours | Oloka c-chszhsi, nepi yiii group Ghpokov multiplication, the outputs of which are connected to the corresponding inputs of the first block of addendum, and the output of which is connected to the control input of the first adder, pulse generator, the output of which is connected to the synchronization inputs of N registers, outputs which are connected to the corresponding multiplication units of the first group, characterized in that, in order to expand the functionality by increasing the number of generated sequences, (N-1) multiplication unit groups are introduced into it, (N-1) b addition locks, control unit, information bus group and control bus connected to the first input of the element I, the output of which is connected to the control inputs jx of addition blocks (J 2, N), whose outputs are connected to information inputs of jx registers, outputs of registers via multiplication blocks the corresponding ix groups (i 2, N) are connected to the corresponding inputs ix of the addition blocks, the outputs N of the registers are combined with the corresponding information inputs of the control unit, the input and output of which are connected respectively to the generator output the pulses and the second input of the AND element, the information buses of the group are connected to the corresponding inputs of the addition blocks. 2. The generator according to claim 1, characterized in that the control unit contains a group of decoders, an OR element and a group of elements AND whose inputs are connected to the corresponding outputs of the group decoders, an output of the OR element and an input of the control unit whose information inputs are connected to the corresponding inputs corresponding decoders of the group, the outputs of the corresponding decoders of which are connected to the inputs of the OR element. Phi