SU1390771A1 - Two-phase digital generator - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to provide phase control between the output signals. A two-phase digital oscillator contains a reference oscillator 1, a frequency divider (DCH) 2, controlled by DCH 4. DCH 3, controlled by DF 5, a counter 6, pulse formers (PI) 7 and 8, a block 9 of generation of control codes are introduced. From the generator 1, the periodic pulse sequence (with frequency f) goes to the counting inputs of DCh 2 and DCh 4, the division ratio for which is N. On the falling edge of the pulses at the output of DCh 2 following with a frequency, FI 7 turns short the impulse, on the leading edge of which the change by the unit of states RF 3 and PM 5 is carried out, and on its back front the initial installation RF 4 is made by writing a binary code, which arrives at the information 1: (. counter 6. The division ratio of DCH 3 and DCH 5 is K. On the falling edge of the transfer pulse, FI 8 to the output de DF 3 generates a short pulse, on the leading edge of which the initial setup of DF 5 and counter 6 is made by writing the binary code from block 9. The code change from block 9 is carried out on the falling edge of pulse 8. FIG. pulse sequences at the output of DC 4 depends on the value of the control code at its information input. 1 Il, "" L s Q C

Description

one

This invention relates to the field of

39077;

radio engineering and communications and can be used in simulators of phase radio navigation systems.

The purpose of the invention is to provide phase control between the output signals.

The drawing shows a structural electrical circuit of a two-phase digital generator.

The two-phase digital oscillator contains a reference oscillator 1, the first 2 and second 3 frequency dividers, the first 4 and second 5 controlled dividers 4, the counter 6, the first 7 and the second 8 pulse formers and the 9 common code generation unit.

Two-phase digital generator works as follows.

From the output of the reference generator 1, a periodic sequence of pulses (with a frequency f) is fed to the counting inputs of the first divider 2 and the first controlled divider 4, the division factor of which is N,

On the falling edge and on the code of the first divider 2, following with frequency, the first driver 7 generates a short pulse, on the leading edge of which a change of state of the second divider 3 and the second controlled divider 5 is carried out, and on the back front of it, Start the installation of the first controllable divider 4 by writing a binary code that enters the information input of the first controllable g (divider 4 from the output of counter 6. Koi ({) is the division divider of the second divider 3 and the second control A divider 5 is K, and the capacity of counter 6 is N. On the falling edge of the transfer pulse at the output of the second divider 3, the second driver 8 produces a short pulse, on the leading front of which the second control divider 5 and counter 6 are set up by recording binary code that enters the information inputs of the second controlled divider 5 and counter 6, respectively, from the second and first outputs of block 9.

The change of the binary code on the first and second outputs of block 9 is realized on the falling edge of the pulse from the output of the second driver 8. Phase

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five

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g

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the periodic pulse sequence at the output of the first controlled divider 4 depends on the value of the control code at its information input. Every K signal periods at the output of the first splitter 2, the control codes on the first and second outputs of block 9 are changed.

The control code from the first output of block 9 through the counter 6 enters the information input of the first controlled divider 4. A transfer pulse at the output of the second controlled de - ;: body 5 is generated through K - K p pulses at the input. The first divider 2, where K pr is the binary code value at the information input of the second controlled divider 5. The transfer pulse from the output of the second controlled divider 5 is fed to the counting input of counter 6 and changes its state by one. The phase shift by the signals at the outputs of the two-phase digital generator is defined as the arithmetic average of the instantaneous phase shifts by K periods of the output signal.

Claims (1)

Invention Formula A two-phase digital oscillator comprising a reference oscillator, a first frequency divider and a first controlled frequency divider, wherein the counting inputs of the frequency divider and the controlled frequency divider are combined and connected to the output of the reference oscillator, characterized in that in order to provide phase-shift control Between the output signals 9, the first pulse shaper, the second controlled frequency divider and the counter, the second frequency divider connected in series, are introduced in series, the second one forms Spiral pulses and a control code generation unit, the first and second outputs of which are connected to the control inputs of the counter and the second controlled frequency divider respectively, the setup inputs of the second controlled frequency divider and the counter are combined and connected to the output of the second pulse shaper, the output of the first frequency divider connected to the input of the first pulse generator, vy31390771 the stroke of which is connected to the counting input frequency divider, the information house of the second frequency divider and from the input of which is connected to the output by the setting input of the first control of the meter.