SU1358078A1 - Frequency doubler - Google Patents

Abstract

The invention relates to a pulse technique and can be used in automation and computing devices. The aim of the invention is to maintain a stable duty ratio of two in a wide range of variation of the frequencies and amplitudes of the input signal. To achieve this goal, a device containing an element EXCLUSIVE OR 1, output bus 2 and input signal band 3, has additionally introduced a detector .4 zero sinusoidal signal and shaper 5 of the extreme sinusoidal signal. One of the possible embodiments of the former 5 is shown in the drawing. The driver co-holds the capacitors 6 and 7, the operational amplifier 8, diodes 9-13, resistors 14, 15 and 16 and the transistor 17. The proposed device does not require tuning to ensure the output ratio of two pulses. This value of the duty cycle is provided for any, even the most rapid changes in the amplitude of the input signal, since in the frequency doubler, the amplitude of each half-period of the sinusoidal signal is analyzed. 1 il. (L with:

Description

The invention relates to a pulse technique and can be used in automation and computing devices.

The aim of the invention is to maintain a stable duty ratio of two, in a wide range of variation of the frequency and amplitudes of the input signal.

The drawing shows a structured electrical frequency doubler circuit.

The doubler 4acTJ3TH contains an EXCLUSIVE OR 1 element, the output of which is connected to the output bus 2 of the doubler, an input signal bus 3, a detector 4 of a sinusoidal signal, a driver 5 of an extreme sinusoidal signal, the output of which is connected to the first input of the element EXCLUSIVE OR I, with input Tina 3 and detector input 4 zero of a sinusoidal signal, the output of which

connected to the second input element of the IC-c frequency doubler to provide

KEYS OR 1.

The driver contains capacitors 6 and 7, operational amplifier 8, diodes 9-13, resistors 14-16, and transistor 17. The driver can be made differently, which is of no fundamental importance, but it must provide an accurate fixation of the extremes of the sinusoidal signal and form right angle pulses output with a duty cycle of two, the fronts of which coincide with the extremes of the input signal.

Detector 4 zero can also be of any design, but it must convert the input sinusoidal signal into square pulses with a duty cycle equal to two, the fronts of which coincide in time with the moments of the sinusoid passing through zero. Frequency doubler works as follows.

From the bus 3 of a sinusoidal signal, a sinusoidal voltage is applied which is fed to the inputs of the driver 5 and the detector 4 zero. A shaper converts a sinusoidal signal into square symmetrical pulses with a duty cycle equal to two, the fronts of which coincide in time

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duty cycle of two pulses at the output. The duty cycle of the pulses, p on two, is ensured by love even the fastest, changes in the amplitude of the input signal, since the frequency doubler analyzes the amplitude of each half-period of the sinusoidal signal.

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Claims (1)

Invention Formula A frequency doubler containing an EXCLUSIVE OR element, the output of which is connected to the output bus, the input signal bus, so that, in order to maintain a stable wellbore equal to two, in a wide range and change the frequencies and amplitudes of the input signal, A detector of a sinusoidal signal and an extreme value shaper are inserted into it from a nusoidal signal, the output of which is connected to the first element input EXCLUDING OR OR, the input is connected to the input signal line and the input zero detector of a sinusoidal signal, the output This is connected to the second input of the EXCLUSIVE OR element, and an input signal bus is supplied with a nasoidal signal. VNIIPI Order 6008/56 Circulation 900 Subscription Proizv.-poly, pr-tie, Uzhgorod, st. Project, 4 five 0 With peak sinusoid values. Detector 4 zero converts a sinusoidal output signal into square symmetrical pulses, the fronts of which coincide in time with the time the sinusoidal signal passes through zero.  . From the outputs of the imaging unit 5 and the detector 4 zero, rectangular pulses arrive at the inputs of the EXCLUSIVE OR 1 element, the output of which produces rectangular pulses with a duty cycle of two twice the frequency and enter the bus 2 outputs. A frequency doubler provides two-frequency square-wave pulse output radiation with a duty cycle equal to two, in a wide frequency range of an input sinusoidal signal (10 Hz + 15 kHz) and amplitude change from 0.5 to 5.0 V, does not require circuit configuration thirty the duty cycle of pulses equal to two at the output. The pulse duty cycle, equal to two, is ensured with any, even the fastest, changes in the amplitude of the input signal, since the amplitude of each half-period of the sinusoidal signal is analyzed in the frequency doubler. five 0 five 0 Invention Formula A frequency doubler containing an EXCLUSIVE OR element, the output of which is connected to the output bus of the doubler, is an input signal bus, which is so that, in order to maintain a stable duty cycle equal to two, in a wide range of frequencies and amplitudes of the input signal , a zero sinusoidal signal detector and an extreme sinusoidal value shaper are inputted into it, the output of which is connected to the first input of the element EXCLUDING OR OR, the input is connected to the input signal bus and the zero input of the detector is sinusoidal A signal whose output is connected to the second input of the EXCLUSIVE OR element, and a sinusoidal signal is applied to the input signal bus.