SU1343531A1 - N/c d.c. drive - Google Patents

Abstract

The invention relates to electrical engineering and m. used in direct current electric drives with control from digital computers. The purpose of the invention is higher reliability. The device contains an electric motor 1 post, a current with current sensors 2 and temperature 3, a bridge power amplifier 4, a splitter counter 6 and a comparison unit 15. The external high frequency signal causes the splitter counter 6 to operate in a mode of continuous summing of input pulses. Next, the formation of control signals for the switching of strong switches takes place depending on the size of the input signal and the presence of current and temperature limitations of the core. Certain ratios between the location of the control signals of the power switches and the through currents in the racks of the bridge amplifier evenly distribute the dynamic losses and exclude the biasing of the transformers of the phase-sensitive rectifiers of the preamplifier 5. 3 Il. S (l

Description

The invention relates to electrical engineering, in particular, to the control of electric: direct current electric drives from digital computing devices.

The aim of the invention is to increase reliability.

Fig. 1 shows a structural diagram of a digital DC electric drive; Figure 2a shows the proportions between the signals: and the most significant bit of the fourth phase of the splitter counter, C, C - the output signals of the first splitter of the two-phase code d, d - output signals of the second splitter of the two-phase code, K, K - duty ratio of the control elements of the power elements bridge amplifier in the coordinates of the input signals B, in Fig.26, c, d - intermediate values of the signals K, K and the corresponding supply voltage of the motor Un, respectively, for the values of the input signal,,, where A is the capacity of the divider counter; Fig. 3 shows the dependence of the motor supply voltage U- on the digital input signal B in the absence of a current limitation of the motor core.

Digital direct current electrolyte drive (figure 1). contains a direct current motor 1 with sensors 2 and 3 of current and core temperature, a bridge power amplifier 4, the output of which is connected to the electric motor 1, and an input with a preamplifier of power 5, a splitter counter 6, two dividers 7 and 8, two adders 9 and 10, two logic circuits 11 and 12, two threshold amplifiers 13 and 14, and a comparison unit 15.

An external stable frequency bus is connected to the input of the splitter counter 6, the output of which, in forward and reverse digital codes, is connected to the first inputs of the first 9 and second 10 adders, respectively, each of which contains a decoder signal transfer bus of the summation result. The second inputs of the adders 9 and 10 of the lower bits are connected to the lower bits of the digital input signal bus B, and the most significant bit of the second inputs of these adders is connected to the output of the comparison unit 15. The first input of the logic unit 15 is connected to the higher-order buses B of the input signal B. The output of the older k-th bit and the splitter counter 6 connect

5 0 5

0 5 0

5 Q

five

yen with the input of the first divider 7 two-phase code, having two outputs, respectively, for the inverse and direct signals of the second phase. The first output is connected to the input of the second divider 8 two-phase code, the output of the phases of which is connected to the first input of the preamplifier 5 power. The outputs of adders 9 and 10 and the second output of the first divider 7 are connected to the first 11 and second 12 logic circuits, each of which has two AND two-input logic elements AND connected at the output with a two-input element OR. The output of the first adder 9 is connected to the first inputs of the first elements AND of each logic circuit 11, 12, and the output of the second adder 10 is connected to the first inputs of the second elements AND of each logic circuit 11, 12, the first output of the first divider 7 is connected to the second inputs of the second element And the first logic circuit 11 and the first element And the second logic circuit, and the second output of the first divider 7 is connected to the second inputs of the first element And the first logic circuit 11 and the second element And the second logic circuit 12.

The outputs of the OR elements are connected to the second input of the power preamplifier 5, the output of which is connected to the control inputs of the power elements, for example, the transistors of the bridge amplifier 4.

The output of the bridge amplifier 4 is loaded on the DC motor 1.

The outputs of the sensors 2 and 3 through the threshold amplifiers 13 and 14 are connected respectively to the second and third: the inputs of the comparison unit 15. The threshold amplifier circuit 13 contains four elementary comparators: the first of them outputs a signal at the motor current of a positive sign i, О, the second at the motor current i of any polarity, the third - i, the fourth - i (i). The threshold amplifier circuit 14 contains three elementary comparators that operate, respectively, at core temperatures t °, t °., Tl (t t.tp.

The basic circuit of the comparator unit 15 depends on the base of the input digital signal numbering system and the principle of its coding. Wherein

the base of the number system of the divider counter 6 must coincide with the base of the input signal, but the principles of their coding may either coincide or differ.

Consider the base number variant with the same coding principle of this base in the input signal and output signals of the counter-divider 6.

In order to determine the conceptual diagram of the comparison unit 15, two groups of POLICY are constructed, respectively, for the case when the signs of the current and the voltage of the motor coincide, and when these signs are different. In each of the tables, values equivalent to a four-phase code are written.

As the input signal increases, for example, B 000001 by one, the signal P, –1 appears on you

The output signal of the divider is the digit of the usual digital code at the input 20 during the first adder 9 with the most significant bit of the adders 9 and 10 (the signal of different trigger levels of the threshold amplifiers 13 and 14. The tables represent the A 77777 delimiter, and the transfer signal P , 1 appears at the output of the second adder 9 at A 00000. With this

A 77777, and the transfer signal P, 1 appears at the output of the second adder 9 at A 00000. At the same time

the three-dimensional digital multiple screwdriver 25 straight C and inverse C signals are second in the numbers of the usual digital code represented in the coordinates B (In the | phase of the first divider 7 of the two-phase code that switches from the signal of the fourth phase a of the highest digit of the - counter 6, which are the formation of control signals by switching the power switches of the bridge amplifier 4 according to the following logical dependencies:, CV,

;. ,

iJ, T (t;

tp.

j 1 2

The tables define the equivalent circuit diagrams for block 15 for the received encoding method.

The device works as follows.

The external high-frequency signal f received at the input of the splitter-counter 6, makes it operate in the mode of continuous summing of the input pulses. In this case, if divider-counter 6, for example, is five-bit, then its digital signals on the output buses for the direct code change in each switching cycle from 00000 to 77777, and on return tires, from 77777 to 00000.

The input digital signal can take values from 000000 to 100000. The zero value of the output voltage of the bridge amplifier corresponds to the value of the input signal 040000, and the maximum value of one, for example, positive sign is 000000, and the other negative sign is 100000.

When the drive is operating with no limitations on the motor current and its winding temperature, core (0; t t ° 2 it -OTcTap

3435314

The largest bit of the input signal B is transmitted from the input of block 15 to its output unchanged.

When the value of the input signal is B 000000, the output of adders 9 and 10 at any values of the signals on the output buses of the splitter counter 6 does not contain transfer signals (P 0,). Therefore, K, j O and, therefore, the power switches, controlled by the signals K, 1, K 1, are always open; The motor is supplied with a voltage Ua and, for example, a positive voltage.

15

When increasing the value of the input signal, for example, B 000001 by one, the signal P, –1 appears at the output of the first adder 9 with the value

the output signal of the divisor-count of the first adder 9 when

during the first adder 9 when

A 77777, and the transfer signal P, 1 appears at the output of the second adder 9 at A 00000. At the same time

direct C and inverse C signals are second

direct C and inverse C signals are second

The phase of the first divider 7 of the two-phase code, which switches from the signal of the fourth phase of a high-order divider counter 6, produces the control signals by switching the power switches of the bridge amplifier 4 according to the following logic dependencies: C.V,

K ,, V,

Consequently, the signal K is equal to one with the values of A 00001 in each odd switching cycle of the divider counter and with the value of A 77777 in each even n; b and with A 77777 in each odd cycle of its switching. Thus, the duration of the signals K and K is equal to two periods of the frequency, and the signals themselves are rigidly tied to the time of the end of one switching cycle of the splitter counter

6 and the beginning of another cycle. Therefore, the signals of the phases d, d of the second divider

7 two-phase code, which form the voltage of the photosensitive rectifiers in preamplifier 5 and switch at the time of the end of the cycles of the divider counter 6, coincide in the switching time with the center of the pulses K, K,.

zy d - impulses K ,, and the signal

phases dj - impulses K ..vf ---. .

With signals K, - 1, K,., - O and K, 0, Kj 1, the power switches of the same name group (emitter or collector) are opened, which ensures at these times a zero value of the voltage of the bridge amplifier 4, thus , the maximum value of the output voltage of the bridge amplifier 4 is reduced.

With a further increase in the input signal, for example, to the value of Lj, the duration of the signals and K increases proportionally and is equal to 24V periods of the input frequency, and all the relations between the position of the signals

K, K ,.

d 2 remain, iv, and the signals of the phases d, s, with no change (Fig. 36). At the same time, the opening times of the power switches of the same group (emitter or collector) increase in proportion to the input signal, which leads to a further decrease in the positive polarity of the voltage applied to the motor.

At B 040000, the duration of the signals K and K is equal to the duration of the switching cycle of the splitter-counter for any moment of time there will be only the ratios of the signals K, 1, Kj O or K O, Kj 1 (Fig. 3b), which corresponds to a zero value of the motor supply voltage.

With a further increase in the input signal, the duration of the signals K and K increases proportionally, and the polarity of the output voltage of the bridge amplifier also changes, when at times K - 1, 1, negative polarity voltage pulses appear at its output (Fig. 3g). ). A proportional increase in voltage occurs up to the value of the input signal B 100000, at which always P 1, P 1 and, therefore, K 1, 1, and the output voltage has the maximum value of negative polarity and UH.

Consider the operation of the drive in the presence of current limits of the engine and the temperature of its winding box.

At the moment of transient processes and when the load on the motor shaft exceeds the permissible current limiting of the bridge amplifier 4, this limitation is realized

G

jg

five

0

impact on higher-order input signals. RCUIH, in this case, the motor current coincides with the sign attached to the motor voltage (), then when the threshold amplifier 13 is triggered, the input signal B changes to the equivalent digits of the usual code according to the following law (figure 4): , 3 and. This change leads to a decrease in the supply voltage of the electric motor 1 and the limitation of its Toka.

If the current of the electric motor 1 and the voltage of its power supply have different signs (), which occurs when the counter-emf, then to decrease the current it is necessary to increase the voltage

1. Therefore, when the threshold amplifier 13 is triggered, the input signal B changes in the equivalent digits of the usual code according to the following

the law (figure 4): ...

7 and.

Motor current limit when core temperature reaches t

about

7

the threshold amplifier 14 is carried out by changing the input signal in the equivalent digits of a conventional code according to the following law: 0,

 about 11

Thus, the digital DC electric drive determines the ratio between the location of the switching control signals of the power switches of the bridge amplifier and the rectangular supply voltages of the phase-sensitive preamplifier, which eliminates the through currents in the racks of the bridge amplifier, evenly distributes the dynamic losses between the power switches , eliminates the magnetisation of the transformers of phase-sensitive rectifiers and increases the reliability of the electric drive.

Claims (1)

Invention Formula A digital DC motor containing a DC motor with current sensors and core temperatures, a bridge power amplifier whose output is connected to an electric motor, and an input with a power amplifier, characterized in that, to increase reliability, a divider counter is inserted into it, two dividers, two adders, two logical circuits 2 AND-OR, two. threshold amplifiers, a comparison unit, the output of the divider counter is connected to the inputs of the adders and the first divider, one output of which is connected to the inputs of l cal circuits 2 AND-OR and the second splitter, the outputs of which are connected to the inputs and 0 a ki d preamplifier power, the other inputs of which are connected to the outputs of logic circuits 2 AND-OR, the second inputs of which are combined and connected to the second output of the first divider, the third and fourth inputs of logic circuits 2 AND-OR are connected respectively to the outputs of the first and second adders, the second inputs of which connected through a unit of comparison and threshold amplifiers with current and temperature sensors. tUj KI Kg about . fput.Z Editor O. Golovach Compiled by Y. Vorobiev Tehred L. Serdyukova Proofreader M. Demchik Order 4835/55, Circulation 659 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, Proktna str., 4 -V  Puj.Z