SU1267285A1 - Calibrator of phase shift angle increments - Google Patents

Abstract

The invention relates to the field of phase-measuring technology. The purpose of the invention is to increase the speed of the device. The calibrator contains a generator 1, a Johnson counter 2 and a switch 3. The introduction of controlled inverter 4, D-flip-flops 5 and 6, filters 7 and 8, and code switch 9 eliminates intermediate switching elements and provides a signal from generator 1 directly to the D-flip-flops 5 and 6, forming the value of phase i shift. 1 il. (L o o yu 00 SP

Description

The invention relates to a phase-measuring technique and can be used for calibrating phase-measuring equipment.

The purpose of the invention is to increase the speed of the device by eliminating the intermediate switching elements and feeding the signal from the generator directly to the D-triggers, which form the phase shift value.

The drawing shows a block diagram of the calibrator increments of the phase shift angle.

The calibrator contains a generator 1, Johnson's counter 2, a switch 3, an inverter control 4, two T) triggers 5 and 6, two filters 7 and 8, and a coding switch 9. At the same time, the output of the generator 1 is connected to the input of Johnson's counter 2 and D -triggers. The zero output of Johnson's counter 2 is connected to the corresponding information input of the switch 3 and through the series-connected controlled inverter 4, the B input of the trigger 5 and the filter 7 to the first output of the device. Inform: Johnson's counter outputs are connected to the inputs of switch 3, the control inputs of which are connected to the outputs of code switch 9, the auxiliary output of which is connected to the control input of the controlled inverter 4. The output of switch 3 through the D-INPUT of the trigger 6 and the filter 8 are connected with the second output of the device.

The device works as follows.

The generator 1 accumulates rectangular pulses with a frequency f that are fed to the input of the counter 2 Jonson and the C inputs of the flip-flops 5 and 6. On the working edge of the pulse, the counter 2 shifts the pulse sequence by one bit, and so on. d, formaiu at the outputs of the triggers of the 2 Jonson counter N periodic right angular sequences shifted relative to each other by the magnitude of the discrete setting of the phase shift

LC, 1§2

I

following with frequency-P

- N N number of triggers

2I

counter 2 johnson. Controlled by coding switch ode 9

the switch 3 connects the required output of the counter 2 to the D input of the trigger 5, and the zero code through the controlled inverter 4 is connected to the 1) input,

trigger channel trigger. If fa-. zovy shift lies in the range of 0-180 °, then the zero signal is fed without in, version on trigger 6, if .360 °, then the signal: zero is inverted

controlled by the inverter 4. The value of the set angle of the phase shift is determined by the number (relative to zero) of the output of the counter 2, switched to the master channel, i.e .:

lr klf (,)

4 180 ° + К1Ч (),

where K 0,1,2.

Phased at an angle угол), two rectangular signals arrive at the D inputs of flip-flops 5 and 6 with some additional shift G caused by the spread of delays in the circuits of counter 2 and switch 3, and inverter 4.

At the output of the synchronization triggers, the signals appear with a delay of one clock cycle (the period of the generator 1 impulse) later in relation to the clock frequency that caused the input signals, however, the spread of G on their outputs is eliminated, since the output information on the output of D.-flip-flops appears synchronously with the arrival of the clock front at the C input. For normal operation, the following condition must be met:

. d t.

EC max

i.

where tjK MQKC is the maximum channel delay time.

When working at limiting frequencies, it is usually delayed in the meter triggers. 2 and switch 3 exceeds -i, i.e.

in this case, the signal at the output of the synchronization triggers relative to the front of the pulse that caused it to appear at the output of counter 2 is 2 cycles, which ensures synchronization (exclusion of delay spreads) at the limiting frequency, when the error of the spread of delays becomes comparable to discrete

 set the phase shift angle. Therefore, devices without triggers near the limiting frequencies practically cannot operate as a result

increase in error caused by the spread of delays in the channels. This error is both systematic and random in nature, depending on the number of the connected channel and various parasitic interference. All of them are excluded up to the limiting frequency if the maximum (total) deviation from the average value of the delay (which corresponds to the arrival of the clock edge at the C input) fte exceeds 0.5 i. Further,

in which there is only an error in the spread of the timing parameters of synchronization triggers, they are fed to output shaping devices (filters), the type of which determines the shape and size of the output signal.

Invention Formula

Calibrator increments of the phase shift angle, containing the generator-, counter, switch, and 1) trigger.

characterized in that, in order to increase speed, a controlled inverter, a second D-flip-flop, a code switch, two filters are inserted into it, while this counter is made according to the Johnson counter circuit, and the generator output is connected to the counter input and synchronization inputs of the first l of the second D - triggers, the information outputs of the counter are connected to similar inputs of the switch, the control inputs of which are connected to the outputs of the code switch, the auxiliary output of the code switch is connected to the control input of the switch of the inverter, a zero counter output through series-connected controllable inverter, the first D-trigger, the first filter - to the first output device through the output switch in series connected second O-trigger, a second filter coupled to the second

device output.

Claims (1)

Formulas a ^ inventions A phase shift increment calibrator containing a generator ·, a counter, an hD-trigger switch, characterized in that, in order to improve performance, a controlled inverter, a second B-trigger, a code switch, two filters are introduced into it, while the counter is made according to the scheme Johnson counter, and the generator output is connected to the counter input and synchronization inputs of the first l of the second D-flip-flops, the information outputs of the counter are connected to similar inputs of the switch, the control inputs of which are connected to the outputs of the code switch switch, the additional output of the code switch is connected to the control input of the controlled inverter, the counter zero output through the connected inverter, the first D-trigger, the first filter with the first device output, the switch output through the second D-trigger connected in series, the second filter is connected to the second device output.