SU1255964A1 - Digital meter of symmetric components - Google Patents

Abstract

The invention can be used in relay control systems and automation. The purpose of the invention is to improve the accuracy and noise immunity of the measurement. The device contains an analog-digital conversion unit 1, adders 5 and 18, accumulating adder 14 and quadrant 19. Introduction of registers 2,3 and 4, subtractors 5 and 7, multipliers 8-11, blocks 12 and 13 of memory, accumulating adder 15 and squaring blocks 16 and 17 with the formation of new connections between the elements of the device. allows the use of a discrete Fourier transform with a constant discretization step for implementing selective filtering of the fundamental harmonic. This in turn allows you to completely eliminate the effect of harmonics, whose frequencies are multiples of the frequency of the main harmonic. In addition, the error introduced by other types of interference and noise can be reduced to an arbitrarily small amount by increasing the analysis time. 7 il. § (L followed; od

Description

The invention relates to electrical measuring technology and can be used in relay protection and automation systems using direct and reverse sequence components.

The purpose of the invention is to improve the accuracy and noise immunity of measuring symmetric components by applying a discrete Fourier transform with a constant sampling step to selectively filter the main harmonic, which completely eliminates the effect of harmonics whose frequencies are multiples of the frequency of the main harmonic and the error introduced by others interference and noise can be reduced to an arbitrary small value by increasing the analysis time.

Fig. 1 shows a functional diagram of a meter for symmetric components; in fig. 2 - functional block diagram of the analog-digital conversion (parallel conversion); in fig. 3 is a functional block diagram of the control unit (parallel transformation); Fig. 4 is a functional block diagram of an analog-to-digital conversion (sequential conversion); in fig. 5 is a functional block diagram of the control unit (sequential conversion); Fig. 6 shows timing charts of operation of the control unit (sequential conversion); Fig, 7 is a functional quad pattern.

The digital meter of symmetric components contains an analog-to-digital conversion unit 1, the inputs of which are the inputs of the meter. The first output of block 1 is connected to the input of the first register 2, the second output is connected to the input of the second register 3, the third output is connected to the input of the third register 4, the output of the first register 2 is connected to the first input of the first power reader 5, the output of the second register 3 is connected to the first inputs of the first the adder 6 and the second recipient 7, the output of the third register 4 is connected to the second inputs of the first adder 6 and the second control unit 7, the output of the first adder 6 is connected to the second input of the first subtractor 5, the output of the first subtractor 5 is connected to the first inputs dami first

8 and the second 9 multiplier, the output of the second igniter 7 is connected to the first inputs of the third 10 and fourth 11 multipliers. The first output of the first memory block 12 is connected to the second input of the first multiplier 8, the second output of the first memory block 12 is connected to the second input of the second multiplier 9, the first output of the second block

13 memory is connected to the second input of the third multiplier 10, the second output of the second memory block 13 is connected to the second input of the fourth multiplier, l 11, Output of the first multiplier 8

connected to the first input of the first accumulating adder 14, the output of the second multiplier 9 is connected to the first input of the second accumulating adder 15, the output of the third multiplier

10 is connected to the second input of the second accumulating adder 15, the output of the fourth multiplier 11 is connected to the second input of the first accumulating adder 14, the outputs of the first 14

and the second 15 accumulating adders are connected respectively to the inputs of the first 16 and second 17 squaring blocks, the outputs of which are respectively connected to

the first and second inputs of the adder 18, the output of which is connected to the input of the quad 19, the output of the quad is the output of the meter. The first output of control unit 20 is connected

with the control input of the analog-to-digital conversion unit 1, the second output is connected to the control inputs of the first 2, second 3 and third 4 registers, the third output of the block 20

control is connected to the control inputs of the first 12 and second 13 memory blocks.

All blocks, except for block 1 of analog-to-digital conversion, quadr and control block 20, are standard

Analog-to-digital conversion unit 1 can operate both in parallel and in series. If transform

The task is carried out in parallel.

That block 1 analog-to-digital conversion is constructed according to a functional diagram (Fig. 2) and contains the first 21, the second 22 and the third 23 analog-to-digital converters. The conversion of all three input signals into digital form is carried out simultaneously on the control signal from

control unit 20, which contains a clock pulse generator 24 and a delay element 25 (FIG. 3) ..

If the conversion is performed sequentially, the functional circuit (FIG. 4) of the analog-digital conversion unit 1 comprises an input multiplexer 26, a sample and storage unit 27, an analog-digital converter 28 and an output multiplexer 29. On the control signals from the control unit 20, the first, second and third input signals are serially converted into digital form.

In this case, the control unit 20 is constructed according to a functional diagram, which is shown in FIG. 5, and contains a generator of 30 square-wave pulses, a generator of 31 clock pulses, an element 32, a trigger 33, an RS flip-flop 34, an element of the GB, and a distributor 36 of pulses. The generators 30 and 31 are constructed according to the same scheme as the generator 24. The frequency of the square-wave generator f, frequency of the clock, f,

and „- -t-. Generator 31 in te2 D

Half of the oscillation period opens element 32 and sets the RS flip-flop 34 to state 1. thus both elements 32 and 35 are open. The counter 33 counts three pulses and transfers the RS flip-flop 34 to the state O, which terminates the AND 35 element. Thus, the first output of control unit 20 receives for one clock cycle three pulses of frequency f,. In the pulse distributor 36 (a decoder is used as the pulse distributor), these pulses are respectively distributed and then fed to the second output of the control unit 20 for alternate. gating registers 2,3 and 4.

The third output of control unit 20 receives pulses of frequency f, which synchronize the operation of the measurer. .

The functional diagram of the quadrant 19 (Fig. 7) contains an address counter 37, a code comparator 38, a group of elements AND, and a block 40 of memory. In a block of 40 memory at the addresses that correspond to the input values, the square root values are written.

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20 25

all right

using the counter 37 of the address, the comparator 38 codes and a group of 39 elements. And the memory address is determined, on which the corresponding value of the square root is written.

The principle of measuring the symmetrical components to the q in the proposed meter is as follows.

Let X ,, (t), Xg (t), Xj, (t) be the phase electrical quantities that are a mixture of a harmonic signal with some interference, i.e.

Cd (s) (u) t + d) + S (t); Xe (t) UE, sin (Jt + fe) Se, (t);

X, (t) + fc) +,

where S (t), S (t), S (t) is the corresponding interference.

They are denoted by I (t), U (t) of Fssctions, which are the electrical quantities of the direct and inverse sequence, respectively. Any of these functions is harmonic with the frequency oJ and therefore can be written as the following sum:

and. (t) ot. coso) t + | 5. s inoOt, (2)

where i 1,2,

and its effective value U- can

be calculated by the formula

. / 5tc: 21.

(3)

Therefore, the main task is to determine the coefficients 0,. But the coefficients bt, can be expressed in terms of the Fourier coefficients of the signals X (t), X (t), Xj. (T), corresponding to the frequency oJ. If we apply this approach and replace the Fourier coefficients of the signals X ((t), X- (t), Xp (t)) with their estimates obtained by the discrete Fourier transform from samples of discrete values

. {X, (Kt), {X (Kt)}, {X, (Kt)}.

where k 1,2, ..., N, N .. 21ГГА); r is a positive integer; 1/1 sampling rate, we get expressions that allow for discrete values {X. (Ki)}, {X (Cl)}, | X (. (Kt)} to calculate the estimate, D, coefficients otj, -.

So for forward and reverse sequence signals are obtained

Ы, (2Х, (КГ) - Х (КТ) - Кт1 HI

-X (KT)) cosa) Kt + C (1) GZ (X / KP

-xjKi;)) sin cJKtJ;

.- -t (.-

-x, (kg)) s1ptszhg + (((-O VKXglKt)

)) cosa) iai, (0.

Determined by formulas (4), the estimates of d-, -) by formula (3) calculate the estimate of the effective value of L j, with 1 1 the direct sequence, the inverse sequence.

The described algorithm is implemented in a digital meter for symmetric components as follows.

Signals Xd (t), Xg (t), Xj. (T) nose are blunt at the inputs of the analog-digital conversion unit 1 and converted into a digital code (HdSCT), 7vg (KT), X (Kt). On the control signals from control unit 20, these signals are recorded in registers 2,3 and 4 "

In adder 6, the value XjjCKt) + X () is calculated and transmitted to subtractor 5, where the value 2Xd (CG) - Xd (CG) - X (kg) is determined. In Calc. 7, the value of X (CG) - X (CG) is calculated. The multipliers 8 and 9 multiply the values 2Xd (K 1) .- X (Kt) - X,. (Kt) by the value, о cos (JKt)

 one . , - and -r- sinCiJKT), which are written in

block 12 of memory. Multipliers 10 and P multiply)

- HLkg) on --1- cos (u) Kt) and

--fv-sin (cJKt), these values are recorded in memory block 13. In accumulating

Lsummator 14 defines a score with / ,; in accumulating adder 15 - assessment p. . Squaring blocks 16 and 17 are squaring the estimates of oL k. In adder 18, the value of: and are summed, Quadrat 19 calculates the square root of this sum.

At the output of the meter, therefore, after N cycles of operation, there is an effective value of symmetric

component of direct or inverse sequence.

1) the formula of the image.

A digital meter for symmetrical components, containing an analog-to-digital conversion unit, a first accumulating adder, a quadrant and a control unit, characterized in that, in order to improve accuracy and noise immunity, two memory blocks, three registers, two subtractors, two are entered into it adder, four multipliers, the second accumulating adder, the first and second blocks squaring, with the outputs of the analog-to-digital conversion unit connected to the first inputs of the registers, the output of the first register, soy inn with the first input of the first inverter, the output of the second register is connected to the first inputs of the first adder and the second subtractor, the second inputs of which are connected to the output of the third register, the output of the first adder is connected to the second input of the first subtractor, outputs of the first and second subtractors are connected respectively to the first inputs of the first , the second and third and fourth multipliers, the second inputs of the first and second and third and fourth multipliers are connected respectively to the first and second inputs of the first and second block The memory s, the outputs of the first and fourth and second and third multipliers are connected respectively to the first and second inputs 1CH of the first and second accumulating adders, the outputs of the first and second accumulating adders are connected to the inputs of the first and second squaring blocks respectively, the outputs of which are respectively connected the first and second inputs of the second adder, the output of which is connected to the quad, the first output of the control unit is connected to the control input of the analog-digital conversion unit, the second you the stroke is connected to the control inputs of the first, second, and third registers; the third output is connected to the control inputs of the first and second memory blocks.

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Editor N. Dankulich

Compiled by N, Mikhalev Tehred M. Khodanych

Order 4818/45 Circulation 728 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Production and printing company, Uzhgorod, Projecto st., 4

7

Proofreader A. Obruchar

Claims (1)

Claim A digital meter of symmetrical components comprising an analog-to-digital conversion unit, a first accumulating adder, a quadrator, and a control unit, different. I mean, in order to improve accuracy and noise immunity, two memory blocks, three registers, two subtractors, two adders, four multipliers, a second accumulating adder, the first and second squaring blocks are introduced into it, and the outputs of the analog-to-digital conversion unit connected respectively to the first inputs of the registers, the output of the first register is connected to the first input of the first subtracter, the output of the second register is connected to the first inputs of the first adder and the second subtractor, the second inputs of which are connected to the output of the tre register, the output of the first adder is connected to the second input of the first subtractor, the outputs of the first and second subtracters are connected respectively to the first inputs of the first, second, third and fourth multipliers, the second inputs of the first and second and third and fourth multipliers are connected respectively to the first and second inputs of the first and the second memory blocks, the outputs of the first and fourth and second and third multipliers are connected respectively to the first and second inputs of the first and second accumulating adders, the outputs of the first and the second accumulating adders are connected to the inputs of the first and second squaring units, respectively, the outputs of which are respectively connected to the first and second inputs of the second adder, the output of which is connected to the quadrator, the first output of the control unit is connected to the control input of the analog-to-digital conversion unit, the second output connected to the control inputs of the first, second and third registers, the third output is connected to the control inputs of the first and second memory blocks. 12.55964 FIG. 5 Third exit // second exit First way out iishshlm t tgi t b i l t -L-. t fig b fig. 7