SU1248032A1 - Pulser - Google Patents

Abstract

The device relates to the field of impulse technology. A voltage controlled oscillator is used in frequency synthesizers. The aim of the invention is to increase the stability of the repetition period of the generation pulses by eliminating the dependence of the processes in the timing circuits of the generator on the supply voltage. For this, a device containing a differential receiver 1c with open smitter outputs, resistors 4, 5, a clock capacitor 7, DC sources 2 and a controlled current 3, discharging an inverter 8 are input. The controlled current source 3 consists of a reference source voltage and current source. The reference voltage source is formed by resistors 9, 10, transistor 11 in diode switching on. The transistor 12c has a high output impedance and is a current source. The source of direct current 2 is implemented in a similar way. The technical advantage of this device is the ability to change the repetition period by an external voltage control signal. In the case of implementation on an ECL chip, if the control voltage is changed within 0-EV, the pulse-following period changes more than 15 times without degrading the output signal: pa. The maximum frequency of the output signal is 140 MHz. 2 Il. (L d / move

Description

The invention relates to a pulse technique and can be used as part of a frequency synthesizer.

The aim of the invention is to increase the Stability of the repetition period of geyeronable pulses by eliminating the dependence of the processes in the generator's timed circuits on the supply voltage.

Fig. 1 is a schematic diagram of the proposed generator and an example of the implementation of a current source controlled by voltage; On ф г, 2 -, time diagrams of work of the offered generator.

The voltage controlled oscillator (Fig. 1) contains a differential receiver 1 s, open emitter outputs, between the direct and inverse inputs of which and the power bus connected sources of constant 2 and controlled 3 currents. A series of resistors 4 and 5 is connected between the forward output of the differential receiver 1 and the inverse opening of the emitter output of the inverter 6, the common point of the resistors 4 and 5 is connected to the forward input of the differential receiver 1. Timed condenser 7 is connected between the common bus and the inverse an open emitter output of the discharging inverter 8, the input of which is connected to the inverse output of the differential receiver 1, which is the generator output. In addition, the inverted input of the differential receiver 1 is connected to the inverted output of the discharge inverter 8,

The voltage controlled oscillator operates as follows.

At the initial moment of time, the capacitor is discharged to the level 1 present at the open emitter output of the discharge inverter 8. At the beginning of the timing process, the differential receiver 1 switches to the O state, 1 is formed at its inverse open emitter output and the bit the inverter 8 switches to state O. This causes the timing capacitor 7 to start charging from the source 3 of the controlled current, since the emitter output of the inverter 8 is locked, during the timing process the threshold direct voltage on the forward input differential receiver 1 is determined

voltage level 1 at the open emitter output of the inverter. 6 minus the voltage drop from the current of the DC source 2 at the resistor 5, since the zmitter direct output of the differential receiver 1 is locked. When the voltage on the clock capacitor 7 (the inverted input of the differential receiver 1) reaches the threshold value set at the direct input, the differential receiver 1 switches to state 1. In this state, the threshold voltage at its direct input decreases to 5 determined by the voltage level 1 minus the voltage drop across the resistors 4 and 5 when they are parallel connected from the source current, 2 dc, as the xmitter direct output of the differential receiver 1 opens. There is a regenerative process in the structure formed by the differential receiver I, inverter 6, resistors 4

0

5 and 5 and DC source 2. At the open emitter output of the discharge inverter 8, a level 1 is formed, and through its low output impedance, a fast discharge of the d-chroning capacitor 7 occurs up to the initial voltage 1. This completes the process of forming one repetition period of the output pulses

A change in the current of the controlled current source changes the charging time of the timing capacitor 7 and, consequently, the total repetition period of the output pulses of the voltage controlled oscillator.

The controlled current source 3 (Fig. 1) consists of a voltage source, formed by resistors 9 and 10, a transistor 11 in the diode switching on j, and the current source itself, the function of which transistor 12 has a high output impedance. The value of the current of the controlled current source is determined as the difference of the constant component flowing through the resistor 5 to the power supply bus and the variable component flowing through the resistor 6 from the source of the control voltage U.

A source

2 DC is implemented in a similar way.

31

When using the proposed pulse generator, it is possible to change the repetition period by an external control signal of the voltage g. When the power supply voltage changes within 5E + 5%, the change in the repetition period does not exceed 5%. The stability of the repetition period is 9 times higher than that of a prototype device. In the case of implementation on an ECL chip, when the control voltage is changed within 0-Ep, the pulse repetition period changes by more than 15 times without degrading the shape of the output signal; 140 MHz output frequency max.

Claims (1)

Invention Formula A pulse generator containing a differential receiver with open emitter outputs, a chain of two series-connected resistors, the first output of which is connected 480324 with a direct output of the differential receiver, a common resistor output is connected to the ijHoro receiver's direct input differential, and a timing capacitor connected to the inverse differential receiver input and a common bus, so that, in order to increase the repetition period stability generated pulses are entered into it sources of direct and controlled currents, the first inverter with an open emitter output, which is connected to the second end of the circuit of two successively connected resistors, the second inverter with an open emitter output, which is connected to the inverse input of the differential receiver, the inverse output of which is the device stroke and connected to the input of the second inverter, with the sources of direct and controlled currents being connected, respectively, between the power bus and the forward and inverse inputs of the differential receiver but. f ff / VOt} Maud l ffSe / MA / i / 6jfO / 7 / 6A / fod 2 Compiled by A. Lizorkin Editor A. Lezhnin Tehred E. Chizhmar Proofreader B. Butt 4140/57 Circulation 816 Subscription VNIIPI USSR State Committee Inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab. 4/5 Production and printing company, Uzhgorod, st. Project, 4