SU1107115A1 - Information input device - Google Patents

Abstract

DEVICE FOR INPUT OF INFORMATION, containing input sensors, time generator, multiplexer, first and second triggers, address counter, outputs connected to multiplexer address inputs, information inputs of which are connected to sensor outputs, characterized in that, in order to increase the reliability of the input information, reduce the influence of interference, the first and second memory blocks, the reversible counter, the first, second, third and fourth elements AND, the comparison circuit, the OR element, the outputs of the counter the addresses are connected to the inputs of the first and second memory blocks and are outputs of the device interrupt address, one of the information outputs of the second memory block is connected to the D input of the second trigger, and the remaining information outputs of the second memory block are connected to information inputs of the reversible counter, outputs which are connected to the inputs of the OR element, to the information inputs of the second memory block and to the first inputs of the comparison circuit, to the second inputs of which are connected the outputs; the first memory block, the output of the comparison circuit is connected to the first input of the first element I and to the first input of the second element I, the output of which is connected to the R input of the second trigger, the inverse output of which is connected to one of the information inputs of the second memory memory with C input the first trigger whose R input is the reset input of the device, the forward output of the first trigger is the output of the device interrupt request, the inverse output of the first trigger is connected to the stop input of the time interval former , the output of the OR element is connected to the first input of the third element AND and the inverse input of the fourth element AND, the output of which is connected to the 5 input of the second trigger, O the direct output of the multiplexer is connected to J with the second input of the first element AND whose output is connected to the summing input of the reverse counter, inverse output multiplexer connects to the second input of the third element And, the output of which is connected to the subtractive input of the reversible counter, the first output of the time interval former is connected to the summing input tchika address input and reading the second memory unit, which records a sixth input coupled to the output of the time slot, the second output of which is connected to the input of a reversing Named schetchika.i C-input of the second flip-flop, a third you

Description

The 1SOD shaper of time slots is connected to the third inputs of the first and third elements AND, the fourth output of the shaper of time intervals is connected to the G input of the first trigger, the fifth output of the time mixer is connected to the second input of the second and first direct inputs of the fourth AND element, the second right my last input is connected to the direct output of the multiplexer.

The invention relates to automation and measurement technology and can be used in systems for metering and controlling energy consumption. A device for inputting information is known, which contains series-connected sensor signals, analog integrators, comparators of the SP levels. In this device, to suppress the impulse noise, cause the splitting of the useful signal and have a shorter duration in relation to it, use the method of analog integration. In this case, for each sensor it is necessary to have a separate integrating circuit, which leads to a significant increase in equipment and labor input for commissioning and operation in multichannel devices. The instability of the nominal values of the integrating elements leads to a decrease in the reliability of receiving information. The closest solution to the present invention is a device for realizing a discrete-integral method of registering telegraphic packages, comprising a signal sensor, a time interval generator, a multiplexer, a coincidence circuit, an address counter, the first and second triggers generator, impulse drivers, the address counter outputs are connected with the address inputs of the multiplexer, whose information inputs are connected to the outputs of the sensors, the output of the generator is connected to the first trigger of the first trigger through the first driver and the second outputs of which through the drivers are connected respectively to the input of the matching circuit, the input of the synchronization circuit, the second input of the coincidence circuit is connected to the output of the second trigger 12}. However, the known device does not provide zadcity useful signal from interference, causing the effect of crushing. The purpose of the invention is to increase the reliability of information input by reducing the influence of interference. The goal is achieved by the fact that the input device containing the input sensors, the multiplexer, the first and second triggers, the time interval generator, the address counter, the outputs are connected to the multiplexer addresses, the information inputs of which are connected to the sensor outputs are additionally entered the first and second memory blocks, the reversible counter, the comparison circuit, the first, second, third and fourth elements AND, the comparison circuit, the OR element, the outputs of the address counter are connected to the address inputs of the w p The first and second memory blocks are the interrupt address outputs of the device, one of the information outputs of the second memory block is connected to an input of the second trigger, and the remaining information outputs of the second memory block are connected to information inputs of a reversible counter, the outputs of which are connected to the inputs of the OR element, with the information inputs of the second memory block and with the first inputs of the comparison circuit, to the second inputs of which the outputs of the first memory block are connected, the output of the comparison circuit is connected to the first input of the first terminal The element I and the first input of the second element I, whose output is connected to the R-input of the second trigger, the inverse output of which is connected to one of the information inputs of the second memory block and to the C input of the first trigger, whose R input is the reset input interrupt the device, the direct output to the first trigger is the output of the interrupt request of the device, the inverse output of the first trigger is connected to the stop input of the time interval generator, the output of the OR element is connected to the first input of the third And element and the inverse I the house of the fourth element And, the output of which is connected to the S-input of the second trigger, the direct output of the multiplexer is connected to the second input of the first element And, the output of which is connected to the summing input of the reversible counter, the inverse output of the multiplexer And, the output which is connected to the subtracting input of the reversible counter, the first output of the time interval generator is connected to the summation of the input of the address counter and to the read input of the second memory block, the recording input of which is connected to gear the second output of the time interval former, the second output of which is connected to the input of the reversible counter and the C input of the second trigger, the third output of the time interval former is connected to the third inputs of the first and third elements, and the fourth output of the time interval former is connected to the D-input the first trigger, the fifth output of the time interval generator is connected to the second input of the second and the first direct input of the fourth AND elements, the second direct input of the last is connected to the direct output of the mull tipleksora. FIG. 1 shows the principle of operation of the proposed method for the i-ro channel; in fig. 2 is a block diagram of the device; in fig. 3 is a diagram of the device operation. The device (Fig. 2) contains input sensors, v ,, multiplexer 2, counter 3 addresses, third element 4 AND, first element 5 AND, first block 6 of memory, element 7 OR, comparison circuit, reversible counter 9, second block 10 memory, the first trigger 11, the second trigger 12, the fourth and second elements 13 and 14 And, respectively, shaper 15 time intervals, exit 16 interrupt request, reset input 17, A - address output. The first block 6 and the second memory block 10 are respectively a programmable ROM and a random access memory (RAM). In the proposed device, using the method of discrete integration of input signals from sensors, the extraction of significant motives (G), i.e. transition from one. The signal is equal to another, for each i-ro channel, it is produced by comparing the difference between the integral values of the signal levels and the specified noise immunity factor, M-. The value of the noise immunity coefficients M is made on the basis of prior data obtained by means of a statistical analysis of the signals with the duration of the unit (f) zero (Sd) factors for each V sensor M (, 9) V, npHj; f (,; М (0.5–0.9), with where Tcr is the quantization expulsion period when cycling the sensors (Fig. 1) to each of them corresponds to the noise immunity coefficient Mi, the current value of the difference R. the integral values of the applied levels. If at the time of the survey, the sensor signal has a unit level, then a unit is added to the difference p, if the level is zero, then the unit subtracts the difference P. The current value obtained is compared with the corresponding noise immunity value M- and with zero, the fact that the difference p reaches the value M is remembered in As a single signal level detection (and further summation of the unit to the difference P of the integral levels does not occur.) The fact that the difference reached the P-value zero is remembered as a case of detection of the zero signal level, and further subtraction of the integral levels from the PJ difference does not occur Thus, the distorted signal is disturbed by the signal in the unitary code. The information in the unitary code from the sensors goes to the inputs of the multiplexer 2, the first synchro imperial 18 15 a unit is added to counter 3 and a control signal is supplied for reading in RAM 10. From the output of counter 3, the address of the sensor (and its corresponding memory cells in the PIZU and RAM) goes to the address inputs of the multiplexer 2, PROM 6, RAM 10 and output of address A. Information S11 from the selected sensor is located on the forward and inverse outputs of multiplexer 2, and information from the selected memory cells of RAM 10 and GSHZ6 on their respective outputs Information from RAM 10 by the second synchro-v pulse 19 in the imaging unit 15 is reversed counter 9 and trigger 12, in the case of The contents of counter 9 correspond to 1 1, the noise immunity coefficient M recorded in the i-th cell of the HSOR 6, output from the comparison circuit 8 shows the signal to elements 5 AND 14 and I. From element 7 OR a signal is output if the contents of the counter 9 are not equal to zero. the third sync pulse GO of the imaging unit 15 through elements 4 and 5 and the unit of the contents of counter 9 will be added or subtracted depending on the presence or absence of a signal from the selected counter 1 and the absence or presence of signals at the outputs of circuit 8 element 7 and OR, respectively. It can be seen from the operation of elements 4 and 5 I that the unit in counter 9 (regardless of the presence or absence of a signal from the selected sensor) will not be added if its content is equal to the corresponding noise immunity value M., n will be deducted if the content is equal the clamp counter 9 is zero. The fourth sync pulse 21 of driver 15 is fed to input D of trigger 11, allowing the trigger to be set to one state by a positive front on input C, Fifth sync pulse 22 of driver 15 trigger 12 is set to one or zero This state is dependent on the presence of the enabling signal according to the scheme 8 comparison or absence of the enabling signal from the element 7 OR, respectively. If the contents of counter 9 are equal to the contents of the i-th cell of the EPROM 6 (containing the corresponding noise immunity factor M-), then the trigger 12 is set to the zero state of the PB input to P, and if the content of the counter 9 is zero, to the single state at input S, At This results in two further variants of the device operation, depending on the direction of switching the trigger 12 from the zero state to one and vice versa. When switching trigger 1. from the zero state to a single trigger 11 remains in the initial state (namely, in the zero state). Therefore, the sixth sync pulse 23 of the imaging unit 15 is recorded in the contents of the counter 9 and the trigger 12 into the corresponding memory cell of the RAM 10 (Fig. 3a) and the device proceeds to polling the next sensor. When the trigger 12 is switched from one state to a zero one, the trigger 11 is switched to a single one. With this signal from the inverse. The trigger output 11 stops the further operation of shaper 15 (FIG. 36), and from the direct output of trigger 11, an interrupt signal 16 is sent to a computing device to process the received information at address A from the output of counter 3 addresses. After receiving the incoming information, the computing device drops the reset signal to the input 17, which sets the trigger 11 to zero position. The shaper 15 resumes its operation from the interrupted place and sixth 1 by the synchronous pulse 23 to the RAM 10 records information from the counter 9 and the trigger 12, Next the device proceeds to poll the next sensor. If in the presence of a signal from element 13 And trigger 12 was already in a single state, then switching to one state does not occur (respectively, the generation of the interruption signal does not occur in the computing device) and the six clock signal 23 records the contents of counter 9 and trigger 12 into the corresponding the memory cell of RAM 10 (Fig. 3A) and the device continues its operation from generating the first clock pulse of the driver 15 to interrogate the next sensor. Thus, information is received from sensors in the unitary code for each of the channels under conditions of strong interference, with each sensor being assigned its own value of the noise immunity coefficient (in accordance with the parameters of the signals on the data channels) and the amount of equipment is significantly reduced.

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Claims (1)

. INFORMATION INPUT DEVICE, comprising input sensors, a time interval generator, a multiplexer, first and second triggers, an address counter whose outputs are connected to the address inputs of the multiplexer, the information inputs of which are connected to the outputs of the sensors, characterized in that, in order to increase the reliability of the input information by reducing the influence of interference, the first and second memory blocks, reversible, are introduced into it. · counter, first, second, third and fourth elements AND, comparison circuit, element OR, counter outputs The addresses are connected to the address inputs of the first and second memory blocks and are the outputs of the device interrupt address, one of the information outputs of the second memory block is connected to the D input of the second trigger, and the remaining information outputs of the second memory block are connected to the information inputs of the reverse counter, the outputs of which are connected with the inputs of the OR element, with the information inputs of the second memory block and with the first inputs of the comparison circuit, the second inputs of which are connected to the outputs of the first memory block, the output of the circuit The input is connected to the first input of the first element And and to the first input of the second element And, the output of which is connected to the R-input of the second trigger, the inverse output of which is connected to one of the information inputs of the second memory unit and to the C-input of the first trigger, whose R-input a reset input of the interrupt device, a direct output of the first flip-flop is the output of the interrupt request device, a first flip-flop inverse output coupled to an input driver stop times · ⁴ GOVERNMENTAL intervals output of OR .soedinen first WMOs ohm of the third element And and the inverse input of the fourth element And, the output of which is connected to the S-input of the second trigger, the direct output of the multiplexer is connected to the second input of the first element And, the output of which is connected to the summing input of the reverse counter, the inverse output of the multiplexer is connected to the second input of the third element And, the output of which is connected to the subtracting input of the reversible counter, the first output of the time interval former is connected to the summing input of the address counter and to the reading input of the second memory block, od recording which is connected to a sixth output of the time slot, the second output of which is connected to the input entry reversing schetchika.i C-input of the second flip-flop, a third vySU. "J 107 115> the code of the time interval generator is connected to the third inputs of the first and third elements AND, the fourth output of the time interval generator is connected to the G input of the first trigger, the fifth output of the time interval generator is connected to the second input of the second and first direct input of the fourth element And, the second direct input the latter is connected to the direct output of the multiplexer.