SU1084790A1 - Device for raising to power and extracting roots - Google Patents

Abstract

A DEVICE FOR CONSTRUCTING IN DEGREE AND ROOT EXTRACTION, containing a reversible counter, the first and second accumulating adders, characterized in that, with the heating of the field of application by enabling the reproduction of power functions with any fractional exponent, the generator of the phase reference frequency, the trigger, pulse generator, adder-subtractor, five switches and a counter, with the inputs of the first group of the first switch connected respectively to the inputs of the first coefficient Eat the device degrees, the inputs of the second group of the first switch are connected respectively to the inputs of the second coefficient of the device degree indicator, the outputs of the first switch are connected respectively to the information inputs of the first accumulating adder, the reset input of which is connected to the reset input of the second nalap. and the output of the pulse generator, the input of which is connected to the trigger output, with the control inputs of all the switches and the control input of the adder ychitatel, the first and second data inputs of which are connected respectively to the outputs of the second nakaplivayu-; the second adder and the second switch, the first information input of which is connected to the first information input of the third switch and the information input of the device, the second information input of the second switch connected to the first information input of the fourth switch and you (/) the reference frequency generator, the second information input of the third switch is connected with the second information input of the fourth switch and the output of the adder-subtractor, the inverse outputs of the counter are connected respectively with the information the ion inputs of the second accumulating summa00 4 CO pa, the clock input of which is connected to the output of the fourth switch and the clock input of the first accumulating adder, the output of which is connected to the information input of the fifth switch, the first and second outputs of which are connected respectively to the summing and subtracting inputs of the reversible counter, the input of which is connected to the reset input of the trigger, the information input of which is connected to the input of the device mode setting, the output of the third switch is connected to the clock counter input.

Description

The invention relates to automation, computing and measurement technology and can be used as a specialized calculator included in automation, control and monitoring devices.

A pulse-frequency device for raising to a power is known that contains a binary divider, a period circuit, a control circuit, a multiplier, two reversible counters of the AND and OR circuit, a degree counter, and keys of the degree to be raised fL.

The drawbacks of the device are its complexity and the impossibility of raising power functions with a fractional exponent.

The closest in technical essence to the present invention is a device for raising to a power and extracting a root, containing a reversible counter, the first and second accumulating adders 2J.

However, the known device is characterized by complexity, an increase in hardware costs with an increase in the exponent and the impossibility of reproducing power functions with any fractional exponent.

The purpose of the invention is to expand the field of application by making it possible to reproduce power functions with any fractional exponent.

I.

The goal is achieved in that the device for raising and extracting a root containing a reversible counter, first and second accumulating adders, an input reference frequency generator, a trigger, a pulse driver, an adder-subtractor, five switches and a counter, with the inputs of the first group the first switch is connected respectively to the inputs of the first coefficient of the exponent of the device; the inputs of the first group of the first switch are connected respectively from the input w of the second coefficient of the article st The device, the outputs of the first switch are connected respectively to the information inputs of the first accumulator sz mmator, the reset input of which is connected to the reset input of the second accumulating adder, the installation input of 1 counter and the output of the pulse former, the input of which is connected to the trigger output, with control inputs of all switches and a control input of the summator, the first and second information inputs of which are connected respectively to the outputs of the second accumulating adder and the second com the first information input of which is connected to the first information input of the third switch and the information input of the device, the second information input of the second switch is connected to the first information input of the fourth switch and the output of the reference frequency generator, the second information input of the third switch is connected to the second information input of the fourth switch and output adder-subtractor, inverse outputs: the odes of the counter are connected respectively to the information inputs of the second accumulator adder, the clock input of which is connected to the output of the fourth switch and clock input of the first accumulating adder, the output of which is connected to the information input of the loop switch, the first and second outputs of which are connected respectively to the summing and subtracting inputs of the reversible counter, the output of which is connected to the trigger reset input The information input of which is connected to the input of the device mode setting, the output of the third switchboard is connected to the clock input of the meter.

FIG. 1 shows a block diagram of a device for exponentiation and root extraction; FIG. 2 - one of the possible implementation options, the subtractor; in fig. 3 and 4 - block diagrams of switches.

The device for exponentiation and extraction of the root (Fig. 1) contains information input 1, input 2 specifies the device mode, accumulating adders 3 and 4, counter 5, reversing counters 6, generator 7 of the reference frequency, driver 8 pulses, trigger 9 , adder-subtractor to with information inputs 11 and 12, control input 13 and output 14, switch 15 with input 16, control khcim input

17 and outputs 18 and 19, switches 20-22 with inputs 23-24, 25-26, 27-28 controlling inputs 29-31 and outputs 32-34, respectively, and switch 35 with groups 36 and 37.

The adder-subtractor 10 (figure 2) contains a trigger 38, delay elements 39 and 40, elements AND 41-43, elements NOT 44 and element OR 45.

The switch 15 (fig.Z) contains the element NOT 46 and the elements And 47 and 48.

Switches 20-22 (figure 4) contain the element NOT 49 and the elements And 50 and 51 and the element OR 52.

The adder-subtractor 10 (figure 2) works as follows.

In the initial position, the trigger 38 is in the unit state, or it is set into it by the first impulse from the input 12. In the summation mode at the control input 13 there is zero potential, and the output element HE 44 is unitary. Impulse sequences with inputs 12 and

11 through the elements And 43 and 42 respectively arrive at the element OR 45 The delay element 39 eliminates the possibility of imposing pulses, inputs wx to the inputs 12 and 11. In the subtraction mode at the control input 13 the unit potential and at the output of the element 44 is zero. Impulse sequence with input

12 through the elements And 43 and OR 45 passes to the output 14. When the pulse is impacted, the input to the 11th trigger

38 is set to the zero state, prohibiting the passage of the next pulse from the input 12 through the element 43. This pulse will again set the trigger 38 into the unit state. a signal that is repeated at the output of the delay element 40 after some time, already after the end of the pulse at input 12. Thus, from the pulse sequence,

input to input 12 is subtracted

one pulse.

: Operation of switches 15 and 21-22

/ shown on r. 3 and 4 respectively.

;BUT.

Device for exponentiation and root extraction (Fig. 1)

I works as follows.

I In the initial state accumulating adders 3 and 4, trigger 9.

The progress of the vehicle in the zero state, the counters 5 in the unit state (i.e., zero potentials at its inverse outputs), at the outputs of the switch 35 the code O of the input group 36 is set at a control input with a zero potential.

The pulse sequence x from input 1 through switch 21 arrives at the INPUT of counter 5. Each pulse of the sequence y arriving at the clock input of accumulating adder 3 transfers the number m - x (where m is the conversion factor of counter 5) formed on the inverse outputs of counter 5, into accumulating adder 3, where this number is added to the previous code value in accumulating adder 3 ,. If the total value of the number written in accumulating adder 3 exceeds its capacity t, then it will overflow and the output of accumulating adder 3 will receive a pulse i through the adder 10, working at that time and through Switch 20 will again arrive at the clock input of the accumulating cyMMaiTopa 3.

The increment dy of the pulse sequence y at the output of the totalizer 10 and the input of the accumulator cc of the adder 3 will be determined by the increment dx and dz of the pulse sequences X at the inputs t and 7; at the output of accumulating adder 3

(one)

dy dx + dz

The increment dz is determined by the increment dy:

j m - X.

(2) dz - “dy

m

Having decided together expressions (1) and (2), we write down the value of the number q, which corresponds to the number of pulses received at the input of accumulating adder 3:

(3)

m Inx

; The pulses of the pulse sequence are also sent to the clock.

- INPUT accumulating adder 4. Each pulse transfers to the accumulating adder 4 the number O set

Ix 1 switch 35 at its inputs, and sums this number with the previous one, recorded in the accumulating code. If C5 value exceeds Vn (where is, is the capacity of adder 4), then it will overflow and at the output a Wits pulse, which through the switch 15 will go to the reversible counter 6. The number of pulses 9l of the output of the accumulating adder 4 received to the summing input of the reversible counter 6 , is equal to W. W. In view of expression (3) At the end of the input pulse sequence X, input 2 receives a control pulse, which sets trigger 9 to one state. When the potential at the output of the flip-flop 9 goes from zero to one, a short pulse appears at the output of the pulse former 8 pulses, which accumulates accumulating adders 3 and 4 and sets the counter 5 to one state. The unit potential at the control input of the switch 35 At its outputs, a code of the number b from the group of inputs 37 is set. Next, from the generator 7, the pulse sequence ul through the switch 20 enters the clock input of the accumulating adders 3 and 4 over the switch 22 to the input 12 of the adder 10 melting now in subtraction mode. The increment dv of the pulse sequence V at the output 14 of the adder of the subtractor 10 is determined by the difference of the increments dyj of the pulse sequence y and du of the pulse sequence and / at the output of the accumulating adder 3, which is caused by the increment of dv dy2 du Given that the inverse outputs of counter 5 are formed an additional code of the number of pulses V can be written down the relationship between the increments du and Resh together the equations (6) and (7), taking into account the pre-changes in the variables tj and y, we obtain the value of the number V formed in the counter 5: With a sequence of y, arriving at the clock input of accumulating adder 4, each impulse rewrites into it the code of the number b set at the inputs of accumulating adder 4 and sums this code with the previous code value written in accumulating cumulator 4. If the total value exceeds the main then the accumulating adder overflows and the output of the whits pulse is at its output. From these pulses a pulse sequence p is formed. It is connected to the pulse sequence by the following relation: P Y2. (9) The pulse sequence p goes through the switch 15 to the subtracting input of the reversible counter 6. When the impulse sequence p reaches the value of y, the reversible counter 6 will be zeroed and a pulse from its output will zero the trigger 9 to the zero state, which will prohibit the further passage of the pulse sequence ul through the switches 20 and 22. At this point, the operation of the device stops. Considering equality. Ip, as well as expression (9), we can write 71 w, Resh jointly equations (5), (8) and (10), we write the V number recorded in the counter 5 after the device finishes operation. Thus, the introduction of the above nodes into the device and a change in the connections allows one to additionally reproduce power functions with any fractional exponent and leads to a significant simplification of the device. .

1

2

Claims (1)

CONSTRUCTION DEVICE IN THE DEGREE AND EXTRACTION OF THE ROOT, containing a reversible counter, the first and second accumulating adders, characterized in that, in order to expand the scope by obtaining the possibility of reproducing power functions with any fractional exponent, a phase reference frequency generator, a trigger, and a pulse shaper are introduced into it , adder-subtractor, five switches and a counter, and the inputs of the first group of the first switch are connected respectively to the inputs of the first coefficient of the exponent of the device, inputs the second group of the first switch are connected respectively to the inputs of the second coefficient of the exponent of the device, the outputs of the first switch are connected, respectively, to the information inputs of the first accumulating adder, the reset input of which is connected to the reset input of the second accumulating adder, with the installation input to 1 counter and the output of the pulse shaper , the input of which is connected to the trigger output, with the control inputs of all the switches and the control input of the adder-subtracter, the first and second information the inputs of which are connected respectively to the outputs of the second accumulating adder and the second switch, the first information input of which is connected to the first information input of the third switch and the information input of the device, the second information input of the second switch is connected to the first information input of the fourth switch and the output of the reference frequency generator, the second information input of the third switch is connected to the second information input of the fourth switch and the output of the adder-subtract Inverted counter outputs are connected respectively to the information inputs of the second accumulating adder, the clock input of which is connected to the output of the fourth switch and to the clock input of the first accumulating adder, the output of which is connected to the information input of the fifth switch, the first and second outputs of which are connected respectively to the summing and subtracting the inputs of the reverse counter, the input of which is connected to the trigger reset input, the information input of which is connected to the input of the set mode oystva, the output of the third switch soediven to a clock input of the counter. 1084790 i