SU1049976A1 - Programmable read-only memory - Google Patents

Abstract

POLUPSKHGGOYANNOE memory comprising storage having an input connected to the output of the numerical entries and read currents to the outputs of formers discharge the recording currents whose inputs are connected to outputs of the register, one of the inputs of which are connected to the outputs of sense amplifiers, which are connected to .The inputs one of the outputs of the drive, and the inputs formy: f -ff -.-. r,., ... -....: ... L, sg Cl -L: -.- .., I iS .- . / 11-- V.- - - оf - I SS.,; The numeric recording current generators, one of the inputs of the numeric counting current drivers, and other inputs of the number register are one of the device inputs, characterized in that, in order to increase the device speed, the OR element, the trigger, the key, the signal conditioner, NOT, adder, pulse generator and additional read amplifier, the input of which is connected to another output of the accumulator, and the output through the element is NOT connected to the first input of the adder, the second input of which is connected to the output of the generator ora pulses, and the output is connected to the input of the signal conditioner, the output of which is connected to one of (L trigger inputs, the output of which is connected to the input of the key, the output of which is connected to the first input of the OR element, the output of which is connected to the other inputs of the numeric current generators, wherein the control input of the key, the trigger inputs and the second input of the element: OR are the other inputs of the device.

Description

1049976J

The invention relates to a calculator. The goal is achieved by

Technique and is intended for use in a semi-permanent sys- tem setting in digital computing machines, which contains a weaver, the inputs with increased requirements for the fast one connected to the outputs for forming an action as a storage device and read and replaceable information. A semi-permanent memory device is known that contains accumulation: g: or on multihole ferrite elements, linear write and read current generators, a numeric register connected to the outputs of the read amplifiers connected to the raster reading lines l. A disadvantage of this device is that it does not provide for an increase in speed when reading, while maintaining high information reliability due to the combination of the data after preliminary destruction. Closest to the invention, in technical terms, is a semi-mechanical storage device containing a drive made on microbiax-type elements, linear current and counting drivers, read amplifiers connected to the numerical part of the drive 21. A disadvantage of the known semi-permanent storage device with an electric change of information is the lack of the possibility of preparing numeric ones. accumulator rulers for reading immediately after writing information to them. The preparation of numerical rulers in such a device can be carried out by means of destruction only immediately before reading to obtain stable impuses; 1 reading signal, which is necessary for creating optimal modes of operation of read amplifiers. Taking into account the fact that in most cases the same information is counted many times and that the recording speed of information in such devices is much lower, the requirements (information can be recorded only once), such an organization of devices, i.e., devices without destruction after recording, it is not advisable, since this can lead not only to a decrease in speed, but also to a decrease in the overall speed. The purpose of the invention is to increase the speed of a semi-permanent storage device and its information reliability: when reading, the recorders of numerical write and read currents and to the outputs of the drivers of write write currents, the inputs of which are connected to the outputs of the number register, one of the inputs of which are connected to the outputs of the read amplifiers , the inputs of which are connected to one of the accumulator outputs, the inputs of the numerical current formers, the records, derived from the formers of the numerical read currents and other inputs of the register Isla are one of the device inputs, an OR element, a trigger, a key, a signal conditioner, a NOT element, an adder, a pulse generator, and an additional amplifier, whose input is connected to another output of the accumulator, are entered, and the output is NOT connected to the first input of the adder, the second input of which is connected to the output of the pulse generator, and the output is connected to the input of the signal conditioner ,. the output of which is connected to one of the trigger inputs, the output of which is connected to the input of the key, the output of which is connected to the first input of the OR element, the output of which is connected to other inputs of the numeric current generator, with the control input of the key, the trigger input and the second input of the OR element other inputs, devices. The drawing shows a structural diagram of a half-empty memory device. The device contains a drive 1, shapers 2 numeric write currents, shapers 3 read numerical currents, shapers of 4 write write currents, 5 register numbers, 5 amplifiers 6, device inputs 7, OR element 8, key 9, trigger 10, shaper 11 signals , an additional read amplifier 12, a HE element 13, an adder 14, and a pulse generator 15. The device operates as follows. In the recording mode, the signal received at odiniz. inputs 7, the code of the number previously recorded in register 5 is analyzed. Depending on the number code, t, e. from code 1 or O, the formulators are positive. corresponding to the bit-reading lines of accumulator 1, the corresponding bit-current write currents flow, which must start in time a little before the write currents of the formers 2, and finish them a little bit later, which requires reliable recording of information. Thus, with some delay in time relative to the start of the formers 4, the corresponding driver 2 is started, which produces different polarity recording currents. As a result, information is required in accumulator 1 at the corresponding address & & a, and the corresponding generator 3 is started at the check digit of this address. After the end of the recording, the driver 3 is started due to the fact that a control signal is received on the destruction, which sets the trigger 10 to the position that corresponds to the public key 9. From now on, the key 9 sends clocks to the element OR 8, and consequently, to start the drivers 3. a-account of this is the destruction of 1 in the check bit of the given address, and consequently, in each bit of the numerical line. This process continues until 1 in the test bit reaches the required magnitude in amplitude.

The clock pulse passes through the key 9 and starts the driver 3

until the inverted reading signal from amplifier 12 reaches

If the total voltage pulse reaches a predetermined trigger threshold of the driver 11, a control signal is generated at the output of the driver 11, which is outputted by the device and serves as the end of failure signal. The same signal is fed to the input of the trigger 10, which is tilted to its original state, the key 9 is closed, and the clock pulses are no longer received through the element OR 8 to start the driver 3.

The mode of sharing in the proposed device, e flows as in the known. One of the inputs 7 receives a control signal at the input of the element OR 8. The signal from the output of the element OR 8 triggers the corresponding shaper 3, a single unipolar current is generated. The amplifiers 6 receive the corresponding read signals, which after amplification are fed to the register 5. Thus , the read time is not, includes the required paalA time of the train, during which the read amplifiers must be closed and the read signals are not perceived, which prevents the code from normal operation of the amplifier she has 6 readings.

The technical and economic advantage of the proposed device in comparison with the known one is in its higher speed.

Claims (1)

A SEMI-STORED REMEMBERING DEVICE, containing a drive, the inputs of which are connected to the outputs of the drivers of numerical write and read currents and to the outputs of the drivers of bit write currents, the inputs of which are connected to the outputs of the number register, one of whose inputs is connected to the outputs of the reading amplifiers, the inputs of which are connected to one of drive outputs, and the inputs of the drivers of numerical write currents, one of the inputs of the drivers of digital read currents and other inputs of the number register are one of the inputs device, characterized in that, in order to improve the performance of the device, an OR element, a trigger, a key, a signal shaper, an element * NOT, an adder, a pulse generator and an additional reading amplifier are inserted into it, the input of which is connected to another drive output, and the output through the element is NOT connected to the first input of the adder, the second input of which is connected to the output of the pulse generator, and the output is connected to the input of the signal shaper, the output of which is connected to one of the inputs of the trigger, the output of which is connected to the input m key, the output of which is connected to a first input of OR gate whose output is connected to the other input of the numerical readout currents, wherein the control input of the key inputs of the flip-flop and a second input member OR are other inputs. 4 ^ with SO m s> ♦ 1049976