SG93907A1 - Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-gate eeprom - Google Patents

Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-gate eeprom

Info

Publication number
SG93907A1
SG93907A1 SG200006571A SG200006571A SG93907A1 SG 93907 A1 SG93907 A1 SG 93907A1 SG 200006571 A SG200006571 A SG 200006571A SG 200006571 A SG200006571 A SG 200006571A SG 93907 A1 SG93907 A1 SG 93907A1
Authority
SG
Singapore
Prior art keywords
gate
split
memory cell
threshold voltage
voltage control
Prior art date
Application number
SG200006571A
Other languages
English (en)
Inventor
Gerber Don
Shields Jeff
Suda David
Original Assignee
Microchip Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microchip Tech Inc filed Critical Microchip Tech Inc
Publication of SG93907A1 publication Critical patent/SG93907A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66537—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a self aligned punch through stopper or threshold implant under the gate region

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
SG200006571A 1999-11-12 2000-11-13 Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-gate eeprom SG93907A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US43972199A 1999-11-12 1999-11-12

Publications (1)

Publication Number Publication Date
SG93907A1 true SG93907A1 (en) 2003-01-21

Family

ID=23745860

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200006571A SG93907A1 (en) 1999-11-12 2000-11-13 Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-gate eeprom

Country Status (4)

Country Link
KR (1) KR100476025B1 (zh)
CN (1) CN1309426A (zh)
SG (1) SG93907A1 (zh)
TW (1) TW472388B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104538364B (zh) * 2014-12-25 2018-01-26 上海华虹宏力半导体制造有限公司 稳定闪存单元字线阈值电压的方法
CN104538361B (zh) * 2014-12-25 2017-08-25 上海华虹宏力半导体制造有限公司 控制闪存单元阈值电压的方法
CN112614841A (zh) * 2020-12-16 2021-04-06 上海华力微电子有限公司 分裂栅闪存单元

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998029907A2 (en) * 1997-01-02 1998-07-09 Caywood John M Low voltage single supply cmos electrically erasable read-only memory
US5836772A (en) * 1994-09-29 1998-11-17 Macronix International Co., Ltd. Interpoly dielectric process
US5856221A (en) * 1995-06-30 1999-01-05 Sgs Thomson Microelectronics Process for forming an integrated circuit comprising non-volatile memory cells and side transistors of at least two different types, and corresponding IC

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59114869A (ja) * 1982-12-21 1984-07-03 Nec Corp 多結晶シリコンの浮遊ゲ−トを有する不揮発性半導体記憶装置
JPH02205361A (ja) * 1989-02-04 1990-08-15 Oki Electric Ind Co Ltd 不揮発性半導体装置
KR100187748B1 (ko) * 1989-06-02 1999-06-01 윌리엄 비. 켐플러 전기적으로 소거가능하고, 전기적으로 프로그램 가능한 판독전용 메모리 셀 및 이의 제조방법
EP0463511B1 (en) * 1990-06-28 1999-03-24 National Semiconductor Corporation Method of producing a split gate EPROM cell using polysilicon spacers
JP3109379B2 (ja) * 1993-05-11 2000-11-13 日本鋼管株式会社 不揮発性メモリセル及びその閾値の調整方法、トランジスタの閾値の調整方法並びに不揮発性記憶装置及びその動作方法
US6432761B1 (en) * 1999-10-01 2002-08-13 Microchip Technology Incorporated Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-EEPROM

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5836772A (en) * 1994-09-29 1998-11-17 Macronix International Co., Ltd. Interpoly dielectric process
US5856221A (en) * 1995-06-30 1999-01-05 Sgs Thomson Microelectronics Process for forming an integrated circuit comprising non-volatile memory cells and side transistors of at least two different types, and corresponding IC
WO1998029907A2 (en) * 1997-01-02 1998-07-09 Caywood John M Low voltage single supply cmos electrically erasable read-only memory

Also Published As

Publication number Publication date
KR100476025B1 (ko) 2005-03-10
CN1309426A (zh) 2001-08-22
KR20010070213A (ko) 2001-07-25
TW472388B (en) 2002-01-11

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