SG93853A1 - Method for improving adhesion to copper - Google Patents
Method for improving adhesion to copperInfo
- Publication number
- SG93853A1 SG93853A1 SG9906302A SG1999006302A SG93853A1 SG 93853 A1 SG93853 A1 SG 93853A1 SG 9906302 A SG9906302 A SG 9906302A SG 1999006302 A SG1999006302 A SG 1999006302A SG 93853 A1 SG93853 A1 SG 93853A1
- Authority
- SG
- Singapore
- Prior art keywords
- copper
- improving adhesion
- adhesion
- improving
- Prior art date
Links
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title 1
- 229910052802 copper Inorganic materials 0.000 title 1
- 239000010949 copper Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76888—By rendering at least a portion of the conductor non conductive, e.g. oxidation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53233—Copper alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Chemical Vapour Deposition (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/231,618 US6271595B1 (en) | 1999-01-14 | 1999-01-14 | Method for improving adhesion to copper |
Publications (1)
Publication Number | Publication Date |
---|---|
SG93853A1 true SG93853A1 (en) | 2003-01-21 |
Family
ID=22869987
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG9906302A SG93853A1 (en) | 1999-01-14 | 1999-12-09 | Method for improving adhesion to copper |
Country Status (7)
Country | Link |
---|---|
US (2) | US6271595B1 (ja) |
JP (1) | JP3379087B2 (ja) |
KR (1) | KR100355637B1 (ja) |
CN (1) | CN1138304C (ja) |
GB (1) | GB2345790B (ja) |
SG (1) | SG93853A1 (ja) |
TW (1) | TW452929B (ja) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4554011B2 (ja) * | 1999-08-10 | 2010-09-29 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
US6734559B1 (en) | 1999-09-17 | 2004-05-11 | Advanced Micro Devices, Inc. | Self-aligned semiconductor interconnect barrier and manufacturing method therefor |
US6573179B1 (en) | 2000-02-01 | 2003-06-03 | Advanced Micro Devices, Inc. | Forming a strong interface between interconnect and encapsulation to minimize electromigration |
US6492267B1 (en) * | 2000-02-11 | 2002-12-10 | Micron Technology, Inc. | Low temperature nitride used as Cu barrier layer |
US6596631B1 (en) * | 2000-07-26 | 2003-07-22 | Advanced Micro Devices, Inc. | Method of forming copper interconnect capping layers with improved interface and adhesion |
DE10042948C2 (de) * | 2000-08-31 | 2002-07-18 | Infineon Technologies Ag | Integriertes Bauelement und Verfahren zu dessen Herstellung |
US6518167B1 (en) | 2002-04-16 | 2003-02-11 | Advanced Micro Devices, Inc. | Method of forming a metal or metal nitride interface layer between silicon nitride and copper |
US7262133B2 (en) * | 2003-01-07 | 2007-08-28 | Applied Materials, Inc. | Enhancement of copper line reliability using thin ALD tan film to cap the copper line |
JP3694512B2 (ja) * | 2003-04-18 | 2005-09-14 | 沖電気工業株式会社 | 半導体装置の製造方法 |
US7727880B1 (en) | 2004-11-03 | 2010-06-01 | Novellus Systems, Inc. | Protective self-aligned buffer layers for damascene interconnects |
US7727881B1 (en) | 2004-11-03 | 2010-06-01 | Novellus Systems, Inc. | Protective self-aligned buffer layers for damascene interconnects |
US7704873B1 (en) | 2004-11-03 | 2010-04-27 | Novellus Systems, Inc. | Protective self-aligned buffer layers for damascene interconnects |
US7396759B1 (en) * | 2004-11-03 | 2008-07-08 | Novellus Systems, Inc. | Protection of Cu damascene interconnects by formation of a self-aligned buffer layer |
EP1815507A4 (en) * | 2004-11-08 | 2010-10-06 | Tel Epion Inc | COPPER INTERCONNECTION WIRING AND METHOD OF FORMING THE SAME |
US20070184656A1 (en) * | 2004-11-08 | 2007-08-09 | Tel Epion Inc. | GCIB Cluster Tool Apparatus and Method of Operation |
US20070238309A1 (en) * | 2006-03-31 | 2007-10-11 | Jun He | Method of reducing interconnect line to line capacitance by using a low k spacer |
US7473626B2 (en) * | 2006-04-11 | 2009-01-06 | International Business Machines Corporation | Control of poly-Si depletion in CMOS via gas phase doping |
US7816789B2 (en) * | 2006-12-06 | 2010-10-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Germanium-containing dielectric barrier for low-k process |
US7915166B1 (en) | 2007-02-22 | 2011-03-29 | Novellus Systems, Inc. | Diffusion barrier and etch stop films |
EP2065927B1 (en) * | 2007-11-27 | 2013-10-02 | Imec | Integration and manufacturing method of Cu germanide and Cu silicide as Cu capping layer |
US7648899B1 (en) | 2008-02-28 | 2010-01-19 | Novellus Systems, Inc. | Interfacial layers for electromigration resistance improvement in damascene interconnects |
US7858510B1 (en) | 2008-02-28 | 2010-12-28 | Novellus Systems, Inc. | Interfacial layers for electromigration resistance improvement in damascene interconnects |
US8268722B2 (en) * | 2009-06-03 | 2012-09-18 | Novellus Systems, Inc. | Interfacial capping layers for interconnects |
US8039966B2 (en) * | 2009-09-03 | 2011-10-18 | International Business Machines Corporation | Structures of and methods and tools for forming in-situ metallic/dielectric caps for interconnects |
CN103582932B (zh) | 2011-06-03 | 2017-01-18 | 诺发系统公司 | 用于互连的包含金属和硅的盖层 |
CN103531530A (zh) * | 2012-07-05 | 2014-01-22 | 中芯国际集成电路制造(上海)有限公司 | 互连中铜表面处理的方法 |
US20140117545A1 (en) * | 2012-10-26 | 2014-05-01 | Globalfoundries Singapore Pte. Ltd | Copper hillock prevention with hydrogen plasma treatment in a dedicated chamber |
US9988713B2 (en) | 2013-03-12 | 2018-06-05 | Arizona Board Of Regents On Behalf Of Arizona State University | Thin film devices and methods for preparing thin film devices |
US9147605B2 (en) | 2013-06-14 | 2015-09-29 | Arizona Board Of Regents On Behalf Of Arizona State University | Thin film devices and low temperature process to make thin film devices |
US9559249B2 (en) | 2014-07-22 | 2017-01-31 | Arizona Board Of Regents | Microwave-annealed indium gallium zinc oxide films and methods of making the same |
US9673091B2 (en) | 2015-06-25 | 2017-06-06 | Globalfoundries Inc. | Structure for BEOL metal levels with multiple dielectric layers for improved dielectric to metal adhesion |
US9633896B1 (en) | 2015-10-09 | 2017-04-25 | Lam Research Corporation | Methods for formation of low-k aluminum-containing etch stop films |
US10763168B2 (en) | 2017-11-17 | 2020-09-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure with doped via plug and method for forming the same |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0419763A1 (en) * | 1989-09-29 | 1991-04-03 | International Business Machines Corporation | A stable interconnection metallization for VLSI devices including copper |
EP0472804B1 (en) * | 1990-08-01 | 1997-07-30 | International Business Machines Corporation | Copper germanium compounds capable of being produced at low temperature |
US5855993A (en) * | 1992-04-24 | 1999-01-05 | International Business Machines Corporation | Electronic devices having metallurgies containing copper-semiconductor compounds |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3765956A (en) | 1965-09-28 | 1973-10-16 | C Li | Solid-state device |
US5324684A (en) | 1992-02-25 | 1994-06-28 | Ag Processing Technologies, Inc. | Gas phase doping of semiconductor material in a cold-wall radiantly heated reactor under reduced pressure |
US5420069A (en) * | 1992-12-31 | 1995-05-30 | International Business Machines Corporation | Method of making corrosion resistant, low resistivity copper for interconnect metal lines |
DE4400200C2 (de) | 1993-01-05 | 1997-09-04 | Toshiba Kawasaki Kk | Halbleitervorrichtung mit verbesserter Verdrahtungsstruktur und Verfahren zu ihrer Herstellung |
US5391517A (en) * | 1993-09-13 | 1995-02-21 | Motorola Inc. | Process for forming copper interconnect structure |
US5633047A (en) | 1994-02-22 | 1997-05-27 | International Business Machines Corporation | Electronic devices having metallurgies containing copper-semiconductor compounds |
US5447887A (en) | 1994-04-01 | 1995-09-05 | Motorola, Inc. | Method for capping copper in semiconductor devices |
US5489550A (en) | 1994-08-09 | 1996-02-06 | Texas Instruments Incorporated | Gas-phase doping method using germanium-containing additive |
US6153523A (en) * | 1998-12-09 | 2000-11-28 | Advanced Micro Devices, Inc. | Method of forming high density capping layers for copper interconnects with improved adhesion |
US6143657A (en) * | 1999-01-04 | 2000-11-07 | Taiwan Semiconductor Manufacturing Company | Method of increasing the stability of a copper to copper interconnection process and structure manufactured thereby |
US6046108A (en) * | 1999-06-25 | 2000-04-04 | Taiwan Semiconductor Manufacturing Company | Method for selective growth of Cu3 Ge or Cu5 Si for passivation of damascene copper structures and device manufactured thereby |
-
1999
- 1999-01-14 US US09/231,618 patent/US6271595B1/en not_active Expired - Fee Related
- 1999-10-29 TW TW088118744A patent/TW452929B/zh not_active IP Right Cessation
- 1999-11-22 GB GB9927378A patent/GB2345790B/en not_active Expired - Fee Related
- 1999-12-09 SG SG9906302A patent/SG93853A1/en unknown
- 1999-12-10 CN CNB991261070A patent/CN1138304C/zh not_active Expired - Lifetime
-
2000
- 2000-01-03 KR KR1020000000007A patent/KR100355637B1/ko not_active IP Right Cessation
- 2000-01-14 JP JP2000005345A patent/JP3379087B2/ja not_active Expired - Fee Related
-
2001
- 2001-05-07 US US09/849,530 patent/US6821890B2/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0419763A1 (en) * | 1989-09-29 | 1991-04-03 | International Business Machines Corporation | A stable interconnection metallization for VLSI devices including copper |
EP0472804B1 (en) * | 1990-08-01 | 1997-07-30 | International Business Machines Corporation | Copper germanium compounds capable of being produced at low temperature |
US5855993A (en) * | 1992-04-24 | 1999-01-05 | International Business Machines Corporation | Electronic devices having metallurgies containing copper-semiconductor compounds |
Also Published As
Publication number | Publication date |
---|---|
GB2345790A (en) | 2000-07-19 |
GB9927378D0 (en) | 2000-01-19 |
US6271595B1 (en) | 2001-08-07 |
KR100355637B1 (ko) | 2002-10-11 |
JP3379087B2 (ja) | 2003-02-17 |
US20010023987A1 (en) | 2001-09-27 |
KR20000053368A (ko) | 2000-08-25 |
US6821890B2 (en) | 2004-11-23 |
CN1269606A (zh) | 2000-10-11 |
CN1138304C (zh) | 2004-02-11 |
JP2000208513A (ja) | 2000-07-28 |
GB2345790B (en) | 2003-12-10 |
TW452929B (en) | 2001-09-01 |
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