SG143229A1 - Methods of thin film process - Google Patents

Methods of thin film process

Info

Publication number
SG143229A1
SG143229A1 SG200718318-9A SG2007183189A SG143229A1 SG 143229 A1 SG143229 A1 SG 143229A1 SG 2007183189 A SG2007183189 A SG 2007183189A SG 143229 A1 SG143229 A1 SG 143229A1
Authority
SG
Singapore
Prior art keywords
dielectric layer
methods
thin film
space
film process
Prior art date
Application number
SG200718318-9A
Inventor
Nitin K Ingle
Jing Tang
Yi Zheng
Zheng Yuan
Zhenbin Ge
Xinliang Lu
Chien-Teh Kao
Vikash Banthia
Mei Chang
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US86906606P priority Critical
Priority to US11/947,674 priority patent/US7939422B2/en
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of SG143229A1 publication Critical patent/SG143229A1/en

Links

Abstract

METHODS OF THIN FILM PROCESS A method for forming a semiconductor structure includes forming a plurality of features across a surface of a substrate, with at least one space being between two adjacent features. A first dielectric layer is formed on the features and within the at least one space. A portion of the first dielectric layer interacts with a reactant derived from a first precursor and a second precursor to form a first solid product. The first solid product is decomposed to substantially remove the portion of the first dielectric layer. A second dielectric layer is formed to substantially fill the at least one space.
SG200718318-9A 2006-12-07 2007-12-04 Methods of thin film process SG143229A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US86906606P true 2006-12-07 2006-12-07
US11/947,674 US7939422B2 (en) 2006-12-07 2007-11-29 Methods of thin film process

Publications (1)

Publication Number Publication Date
SG143229A1 true SG143229A1 (en) 2008-06-27

Family

ID=39615578

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200718318-9A SG143229A1 (en) 2006-12-07 2007-12-04 Methods of thin film process

Country Status (1)

Country Link
SG (1) SG143229A1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0658928A1 (en) * 1993-12-16 1995-06-21 International Business Machines Corporation Method of plasma etching silicon dioxide, selectively to silicon nitride and polysilicon
WO2000013225A1 (en) * 1998-08-31 2000-03-09 Applied Materials, Inc. A process for back-etching polysilicon and application to the fabrication of a trench capacitor
US6335261B1 (en) * 2000-05-31 2002-01-01 International Business Machines Corporation Directional CVD process with optimized etchback
US7078312B1 (en) * 2003-09-02 2006-07-18 Novellus Systems, Inc. Method for controlling etch process repeatability

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0658928A1 (en) * 1993-12-16 1995-06-21 International Business Machines Corporation Method of plasma etching silicon dioxide, selectively to silicon nitride and polysilicon
WO2000013225A1 (en) * 1998-08-31 2000-03-09 Applied Materials, Inc. A process for back-etching polysilicon and application to the fabrication of a trench capacitor
US6335261B1 (en) * 2000-05-31 2002-01-01 International Business Machines Corporation Directional CVD process with optimized etchback
US7078312B1 (en) * 2003-09-02 2006-07-18 Novellus Systems, Inc. Method for controlling etch process repeatability

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