SG10201501716WA - Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus - Google Patents
Semiconductor device and method of forming semiconductor die with active region responsive to external stimulusInfo
- Publication number
- SG10201501716WA SG10201501716WA SG10201501716WA SG10201501716WA SG10201501716WA SG 10201501716W A SG10201501716W A SG 10201501716WA SG 10201501716W A SG10201501716W A SG 10201501716WA SG 10201501716W A SG10201501716W A SG 10201501716WA SG 10201501716W A SG10201501716W A SG 10201501716WA
- Authority
- SG
- Singapore
- Prior art keywords
- active region
- external stimulus
- semiconductor device
- region responsive
- semiconductor die
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14618—Containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14698—Post-treatment for the devices, e.g. annealing, impurity-gettering, shor-circuit elimination, recrystallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/02002—Arrangements for conducting electric current to or from the device in operations
- H01L31/02005—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1876—Particular processes or apparatus for batch treatment of the devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12043—Photo diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Solid State Image Pick-Up Elements (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201161535301P | 2011-09-15 | 2011-09-15 | |
US13/545,887 US9564413B2 (en) | 2011-09-15 | 2012-07-10 | Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus |
Publications (1)
Publication Number | Publication Date |
---|---|
SG10201501716WA true SG10201501716WA (en) | 2015-05-28 |
Family
ID=47879924
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG2012058285A SG188713A1 (en) | 2011-09-15 | 2012-08-06 | Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus |
SG10201501716WA SG10201501716WA (en) | 2011-09-15 | 2012-08-06 | Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG2012058285A SG188713A1 (en) | 2011-09-15 | 2012-08-06 | Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus |
Country Status (4)
Country | Link |
---|---|
US (2) | US9564413B2 (en) |
CN (1) | CN103000574B (en) |
SG (2) | SG188713A1 (en) |
TW (1) | TWI620271B (en) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102013114907A1 (en) * | 2013-12-27 | 2015-07-02 | Pac Tech-Packaging Technologies Gmbh | Method for producing a chip module |
US9527723B2 (en) | 2014-03-13 | 2016-12-27 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming microelectromechanical systems (MEMS) package |
US10718826B2 (en) * | 2014-12-02 | 2020-07-21 | Texas Instruments Incorporated | High performance fluxgate device |
CN104716116A (en) * | 2014-12-19 | 2015-06-17 | 华天科技(西安)有限公司 | Embedded type sensor chip packaging structure and manufacturing method thereof |
CN105845635B (en) * | 2015-01-16 | 2018-12-07 | 恒劲科技股份有限公司 | Electron package structure |
CN105990269B (en) * | 2015-03-06 | 2019-03-05 | 吴勇军 | A kind of fingerprint recognition chip-packaging structure and its packaging method |
CN104701254B (en) * | 2015-03-16 | 2017-10-03 | 深圳市华星光电技术有限公司 | A kind of preparation method of low-temperature polysilicon film transistor array base palte |
CN104812165A (en) * | 2015-05-08 | 2015-07-29 | 林梓梁 | Embedded circuit board SMD (Surface Mounted Device) structure and production method thereof |
WO2017056697A1 (en) * | 2015-09-30 | 2017-04-06 | 日立オートモティブシステムズ株式会社 | Inertia sensor |
KR20170111827A (en) * | 2016-03-29 | 2017-10-12 | 삼성전자주식회사 | Electronic device including display and camera |
US9659911B1 (en) * | 2016-04-20 | 2017-05-23 | Powertech Technology Inc. | Package structure and manufacturing method thereof |
US10522505B2 (en) | 2017-04-06 | 2019-12-31 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method for manufacturing the same |
CN108735695A (en) * | 2017-04-18 | 2018-11-02 | 凤凰先驱股份有限公司 | Package substrate and its preparation method |
CN107481992A (en) * | 2017-09-06 | 2017-12-15 | 中芯长电半导体(江阴)有限公司 | The encapsulating structure and method for packing of fingerprint recognition chip |
CN107634076A (en) * | 2017-09-06 | 2018-01-26 | 中芯长电半导体(江阴)有限公司 | Cmos image sensor fan-out package structure and preparation method thereof |
CN107644845A (en) * | 2017-09-06 | 2018-01-30 | 中芯长电半导体(江阴)有限公司 | The encapsulating structure and method for packing of fingerprint recognition chip |
CN109585403B (en) * | 2017-09-29 | 2020-09-25 | 恒劲科技股份有限公司 | Sensor package and method of making the same |
TWI666743B (en) * | 2017-09-29 | 2019-07-21 | 英屬開曼群島商鳳凰先驅股份有限公司 | Sensor package and method of manufacturing the same |
CN109698208B (en) * | 2017-10-20 | 2023-06-30 | 新加坡有限公司 | Image sensor packaging method, image sensor packaging structure and lens module |
CN109729242B (en) * | 2017-10-27 | 2020-10-02 | 宁波舜宇光电信息有限公司 | Camera module, expansion wiring packaging photosensitive assembly thereof, jointed board assembly and manufacturing method |
CN109872986B (en) * | 2017-12-04 | 2023-07-04 | 新加坡有限公司 | Packaging structure of optical sensor and packaging method of optical sensor |
CN109979951B (en) * | 2017-12-28 | 2021-04-16 | 宁波舜宇光电信息有限公司 | Photosensitive assembly and manufacturing method thereof |
CN108198791A (en) * | 2018-01-29 | 2018-06-22 | 中芯长电半导体(江阴)有限公司 | The encapsulating structure and packaging method of fingerprint recognition chip |
KR102016495B1 (en) * | 2018-01-31 | 2019-10-21 | 삼성전기주식회사 | Fan-out sensor package |
US11295972B2 (en) | 2018-06-12 | 2022-04-05 | Korea Advanced Institute Of Science And Technology | Layout structure between substrate, micro-LED array and micro-vacuum module for micro-LED array transfer using micro-vacuum module, and method for manufacturing micro-LED display using the same |
US20190378749A1 (en) * | 2018-06-12 | 2019-12-12 | Korea Advanced Institute Of Science And Technology | Micro-vacuum module for semiconductor device transfer and method for transferring semiconductor device using the micro-vacuum module |
JP7128697B2 (en) * | 2018-09-19 | 2022-08-31 | ファスフォードテクノロジ株式会社 | Die bonding apparatus and semiconductor device manufacturing method |
CN109616466A (en) * | 2018-09-21 | 2019-04-12 | 芯光科技新加坡有限公司 | Fingerprint encapsulation module, packaging method, display module |
US10617009B1 (en) * | 2019-07-31 | 2020-04-07 | Google Llc | Printed circuit board connection for integrated circuits using two routing layers |
CN215644456U (en) * | 2020-03-27 | 2022-01-25 | 意法半导体有限公司 | Semiconductor device with a plurality of transistors |
US11742437B2 (en) * | 2020-03-27 | 2023-08-29 | Stmicroelectronics Ltd | WLCSP with transparent substrate and method of manufacturing the same |
US11735554B2 (en) * | 2020-08-14 | 2023-08-22 | Sj Semiconductor (Jiangyin) Corporation | Wafer-level chip scale packaging structure having a rewiring layer and method for manufacturing the wafer-level chip scale packaging structure |
Family Cites Families (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6627983B2 (en) | 2001-01-24 | 2003-09-30 | Hsiu Wen Tu | Stacked package structure of image sensor |
KR100940943B1 (en) | 2001-08-24 | 2010-02-08 | 쇼오트 아게 | Method for producing electronics components |
SG104291A1 (en) | 2001-12-08 | 2004-06-21 | Micron Technology Inc | Die package |
US7388294B2 (en) * | 2003-01-27 | 2008-06-17 | Micron Technology, Inc. | Semiconductor components having stacked dice |
US7141884B2 (en) | 2003-07-03 | 2006-11-28 | Matsushita Electric Industrial Co., Ltd. | Module with a built-in semiconductor and method for producing the same |
US7372151B1 (en) * | 2003-09-12 | 2008-05-13 | Asat Ltd. | Ball grid array package and process for manufacturing same |
US7294897B2 (en) | 2004-06-29 | 2007-11-13 | Micron Technology, Inc. | Packaged microelectronic imagers and methods of packaging microelectronic imagers |
JP2006128625A (en) | 2004-09-30 | 2006-05-18 | Oki Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
JP2006120935A (en) * | 2004-10-22 | 2006-05-11 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
TWI303864B (en) | 2004-10-26 | 2008-12-01 | Sanyo Electric Co | Semiconductor device and method for making the same |
US20060102974A1 (en) | 2004-11-12 | 2006-05-18 | Chen Neng C | Contact image capturing structure |
EP1964181B1 (en) | 2005-12-22 | 2019-08-14 | (CNBM) Bengbu Design & Research Institute for Glass Industry Co., Ltd. | Photovoltaic device and method of encapsulating |
US20090090412A1 (en) * | 2005-12-22 | 2009-04-09 | Hermann Calwer | Photovoltaic device and method for encapsulating |
SG133445A1 (en) | 2005-12-29 | 2007-07-30 | Micron Technology Inc | Methods for packaging microelectronic devices and microelectronic devices formed using such methods |
US7675157B2 (en) * | 2006-01-30 | 2010-03-09 | Marvell World Trade Ltd. | Thermal enhanced package |
US7514775B2 (en) | 2006-10-09 | 2009-04-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Stacked structures and methods of fabricating stacked structures |
TWI313050B (en) | 2006-10-18 | 2009-08-01 | Advanced Semiconductor Eng | Semiconductor chip package manufacturing method and structure thereof |
US7605477B2 (en) | 2007-01-25 | 2009-10-20 | Raytheon Company | Stacked integrated circuit assembly |
US7919410B2 (en) * | 2007-03-14 | 2011-04-05 | Aptina Imaging Corporation | Packaging methods for imager devices |
TWI332790B (en) | 2007-06-13 | 2010-11-01 | Ind Tech Res Inst | Image sensor module with a three-dimensional dies-stacking structure |
KR100881400B1 (en) * | 2007-09-10 | 2009-02-02 | 주식회사 하이닉스반도체 | Semiconductor package and method of manufactruing the same |
US7777351B1 (en) * | 2007-10-01 | 2010-08-17 | Amkor Technology, Inc. | Thin stacked interposer package |
JP5028486B2 (en) | 2007-12-25 | 2012-09-19 | 株式会社フジクラ | Manufacturing method of semiconductor device |
US7851246B2 (en) * | 2007-12-27 | 2010-12-14 | Stats Chippac, Ltd. | Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device |
SG155793A1 (en) * | 2008-03-19 | 2009-10-29 | Micron Technology Inc | Upgradeable and repairable semiconductor packages and methods |
US9559046B2 (en) | 2008-09-12 | 2017-01-31 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming a fan-in package-on-package structure using through silicon vias |
US7888181B2 (en) * | 2008-09-22 | 2011-02-15 | Stats Chippac, Ltd. | Method of forming a wafer level package with RDL interconnection over encapsulant between bump and semiconductor die |
US9257356B2 (en) | 2008-12-10 | 2016-02-09 | Stats Chippac, Ltd. | Semiconductor device and method of forming an IPD beneath a semiconductor die with direct connection to external devices |
TWI499024B (en) * | 2009-01-07 | 2015-09-01 | Advanced Semiconductor Eng | Package-on-package device, semiconductor package and method for manufacturing the same |
US9299648B2 (en) | 2009-03-04 | 2016-03-29 | Stats Chippac Ltd. | Integrated circuit packaging system with patterned substrate and method of manufacture thereof |
US8034662B2 (en) | 2009-03-18 | 2011-10-11 | Advanced Micro Devices, Inc. | Thermal interface material with support structure |
US7923290B2 (en) | 2009-03-27 | 2011-04-12 | Stats Chippac Ltd. | Integrated circuit packaging system having dual sided connection and method of manufacture thereof |
US8119447B2 (en) | 2009-06-17 | 2012-02-21 | Stats Chippac Ltd. | Integrated circuit packaging system with through via die having pedestal and recess and method of manufacture thereof |
JP5448184B2 (en) | 2009-06-18 | 2014-03-19 | 株式会社パイオラックス | Spring assembly and manufacturing method thereof |
KR101680082B1 (en) * | 2010-05-07 | 2016-11-29 | 삼성전자 주식회사 | Wafer level package and methods for fabricating the same |
US8736065B2 (en) | 2010-12-22 | 2014-05-27 | Intel Corporation | Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming the same |
-
2012
- 2012-07-10 US US13/545,887 patent/US9564413B2/en active Active
- 2012-08-03 TW TW101127965A patent/TWI620271B/en active
- 2012-08-06 SG SG2012058285A patent/SG188713A1/en unknown
- 2012-08-06 SG SG10201501716WA patent/SG10201501716WA/en unknown
- 2012-09-14 CN CN201210339868.5A patent/CN103000574B/en active Active
-
2016
- 2016-12-29 US US15/394,337 patent/US10217873B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US9564413B2 (en) | 2017-02-07 |
SG188713A1 (en) | 2013-04-30 |
US10217873B2 (en) | 2019-02-26 |
TW201312692A (en) | 2013-03-16 |
CN103000574B (en) | 2017-04-12 |
CN103000574A (en) | 2013-03-27 |
US20170110599A1 (en) | 2017-04-20 |
US20130069252A1 (en) | 2013-03-21 |
TWI620271B (en) | 2018-04-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG10201501716WA (en) | Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus | |
SG10201504780PA (en) | Semiconductor device and method of formingextended semiconductor device with fan-outinterconnect structure to reduce complexity ofsubstrate | |
SG10201601160XA (en) | Semiconductor device and method of forming dual-sidedinterconnect structures in fo-wlcsp | |
EP2804214A4 (en) | Semiconductor device and method of manufacturing thereof | |
EP2898532A4 (en) | Gate contact structure over active gate and method to fabricate same | |
EP2824696A4 (en) | Semiconductor device and method of manufacture thereof | |
TWI560881B (en) | Semiconductor device and method of fabricating high voltage semiconductor device | |
SG10201510232QA (en) | Semiconductor device and method of forming an embedded sop fanoutpackage | |
TWI563545B (en) | Method of making an insulated gate semiconductor device and structure | |
HK1198303A1 (en) | Semiconductor device and method of manufacturing the same | |
SG2013050265A (en) | Semiconductor device and method of forming wire studs as vertical interconnect in fo-wlp | |
SG10201705508RA (en) | Semiconductor device and method of using leadframe bodies to form openings through encapsulant for vertical interconnect of semiconductor die | |
EP2737525A4 (en) | Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication | |
GB201419623D0 (en) | Semiconductor devices having fin structures and methods of forming semiconductor devices having fin structures | |
EP2755227A4 (en) | Nitride semiconductor structure and method of fabricating same | |
EP2804216A4 (en) | Semiconductor device and method of manufacturing thereof | |
SG10201402301RA (en) | Semiconductor device and method of formingpad layout for flipchip semiconductor die | |
SG11201503763PA (en) | Wire-bonding apparatus and method of manufacturing semiconductor device | |
SG11201503849YA (en) | Wire-bonding apparatus and method of manufacturing semiconductor device | |
PL2414567T3 (en) | Semipolar semiconductor and its method of production | |
SG11201401522XA (en) | Selective dehydration of alcohols to dialkylethers and integrated alcohol-to-gasoline processes | |
HK1204506A1 (en) | Semiconductor device and manufacturing method of semiconductor device | |
EP2725619A4 (en) | Semiconductor device and method of manufacturing same | |
GB2488401B (en) | Method of manufacturing semiconductor device structure | |
HK1198783A1 (en) | Method of manufacturing semiconductor device and semiconductor device |