SE540483C2

SE540483C2 - A hybrid modular multilevel converter

Info

Publication number: SE540483C2
Application number: SE1551618A
Authority: SE
Inventors: Nami Alireza; ILVES Kalle; Rahimo Munaf
Original assignee: Abb Schweiz Ag
Priority date: 2015-12-10
Filing date: 2015-12-10
Publication date: 2018-09-25
Also published as: SE1551618A1

Abstract

A modular multilevel converter converting between alternating current (AC) and direct current (DC) comprises a first and a second terminal and at least one phase leg connected between the first and second terminals, each phase leg comprising a number of cells having energy storage elements and at least one bypass switch, where the bypass switch is a thyristor based bypass switch connected in parallel with a string of cells in the phase leg, the string comprising at least one cell. There is also a control unit configured to selectively control the cells to insert their energy storage elements in the phase leg in order to form a waveshape (WS) and control the bypass switch to conduct when all the cells of the string are to be bypassed in the forming of the waveshape (WS).

Description

A HYBRID MODULAR MULTILEVEL CONVERTER FIELD OF INVENTION The present invention generally relates to multilevel converters. More particularly the present invention relates to a modular multilevel converter as well as to a method and computer program product for controlling a modular multilevel converter.

BACKGROUND It is widely known that the ideal condition for a DC/AC/DC system used in Power System applications such as High Voltage Direct Current (HVDC) and Flexible Alternating Current Transmission System (FACTS) would be the use of a 2-level topology having a power electronic device blocking the full DC link voltage and switching at very high frequency, thus limiting the need of a filtering circuit (i.e. smaller magnetic components) since the resulting sine waveform is a modulated one at very high frequency.

On the other hand such a device, when the blocking voltage for a DC link is hundreds of kilovolt as in a HVDC plant, is not available and the consequence is that the actual technologies use the series connection of many high voltage devices (max ratings below tokV). Thereby a number of related issues have to be addressed, such as unbalanced voltage sharing, control, increased conduction losses due to the sum up of the ON state resistance of each device, consequent limitation in operating frequency to below the kHz and so on.

Thyristor based Line Commutated Converters (LCC) have the capability of transmitting thousands of megawatts of power and are very efficient.

While the approach has many advantages there are a number of technical limitations, due to lack of full controllability. That means that the converter cannot fulfil the future goals of, for example, providing a DC connection to offshore wind farms or being connected as part of a large scale DC grid.

The Modular Multilevel Converter (MMC) technology has helped in that respect, to achieve modular construction of the converters where each single block (cell) is responsible of building up one low voltage level of the resulting waveshape and having advantages of achieving specified level of harmonic distortion with very low switching frequency required from the switches. Thus the overall efficiency of the converter is much higher than for the six pulse voltage source converter (VSC) bridge, although still worse than for the LCC type converter. This technology, on the other hand, presents drawbacks related to the high energy storage size, the high number of devices to be used and not optimized type of devices.

It would in view of what is mentioned above therefore be of interest to add some of the benefits of the LCC to the MMC without limiting the controllability.

SUMMARY OF THE INVENTION The present invention is directed towards providing a modular multilevel converter that has improved efficiency while at the same time retaining controllability.

This object is according to a first aspect achieved through a modular multilevel converter configured to convert between alternating current (AC) and direct current (DC) and comprising a first and a second terminal, at least one phase leg connected between the first and second terminals, each phase leg comprising a number of cells having energy storage elements and at least one bypass switch, where the bypass switch is a thyristor based bypass switch connected in parallel with a string of cells in the phase leg, the string comprising at least one cell, and a control unit configured to control the converter.

This object is according to a second aspect achieved through a method of controlling a modular multilevel converter configured to convert between alternating current (AC) and direct current (DC) and comprising a first and a second terminal, at least one phase leg connected between the first and second terminals, each phase leg comprising a number of cells having energy storage elements and at least one bypass switch, where the bypass switch is a thyristor based bypass switch connected in parallel with a string of cells in the phase leg, said string comprising at least one cell, the method being performed in a control unit (12) of the modular multilevel converter comprising selectively controlling (32) the cells to insert their energy storage elements in the phase leg in order to form a waveshape, and controlling (28) the bypass switch to conduct when (26) all the cells of the string are to be bypassed in the forming of the waveshape.

The object is according to a third aspect achieved through a computer program product for controlling a modular multilevel converter configured to convert between alternating current (AC) and direct current (DC) and comprising a first and a second terminal, at least one phase leg connected between the first and second terminals, each phase leg comprising a number of cells having energy storage elements and at least one bypass switch, where the bypass switch is a thyristor based bypass switch connected in parallel with a string of cells in the phase leg, said string comprising at least one cell, the computer program product being provided on a data carrier comprising computer program code configured to cause a control unit for the modular multilevel converter to, when the computer program code is loaded into the control unit selectively control the cells to insert their energy storage elements in the phase leg in order to form a waveshape, and control the bypass switch to conduct when all the cells of the string are to be bypassed in the forming of the waveshape.

The invention has a number of advantages. It provides a higher efficiency together with a retained good controllability. It is flexible. It can be operated as a voltage source converter or as a current source converter. When used as a current source converter it increases the controllability of the converter and when used as a voltage source converter it improves the performance. Another advantage is that it reduces the ripple due to switching occurring on the energy storage elements of the cells. It also allows a greater flexibility in the handling of different types of faults.

BRIEF DESCRIPTION OF THE DRAWINGS The present invention will in the following be described with reference being made to the accompanying drawings, where fig. 1 schematically shows a modular multilevel converter where a thyristor switch connected in parallel with a string of cells can be used, fig. 2 shows a thyristor switch in parallel with a full-bridge cell, fig. 3 shows a block schematic of a control unit of the modular multilevel converter, fig. 4 shows how the full-bridge cell may be used for turning off a conducting thyristor switch for two opposing current directions, fig. 5 shows a flow chart of a number of method steps performed in a method for controlling voltage forming in a modular multilevel converter and being performed by the control unit, fig. 6 shows the control of cells and thyristor switches in the modular multilevel converter when forming a first stage of a waveshape, fig. 7 shows the control of cells and thyristor switches in the modular multilevel converter when forming a second stage of the waveshape, fig. 8 shows the control of cells and thyristor switches in the modular multilevel converter when forming a third stage of the waveshape, fig. 9 shows the control of cells and thyristor switches in the modular multilevel converter when forming a fourth section of the waveshape, fig. to shows a modular multilevel converter where each phase leg comprises a number of strings of cells, where each string comprises two cells and a thyristor switch is connected in parallel with such a string, fig. 11 shows how a full-bridge cell in a string comprising two or more cells may be used for turning off a thyristor switch for two opposing current directions, fig. 12 shows an alternative converter realization using cells and thyristor switches, and fig. 13 schematically shows a computer program product comprising a data carrier with computer program code for implementing functionality in the control unit.

DETAILED DESCRIPTION OF THE INVENTION In the following, a detailed description of preferred embodiments of the invention will be given.

Fig. 1 schematically shows a modular multilevel converter 10 in the form of a cell based voltage source converter 10. The converter 10 may be provided in a power transmission system, such as in a High Voltage Direct Current (HVDC) power transmission system or a Flexible Alternating Power Transmission System (FACTS). The converter operates to convert between alternating current (AC) and direct current (DC). The converter 10 in fig. 1 comprises a three-phase bridge made up of a number of phase legs. There are in this case three phase legs. There is thus a first phase leg PLi, a second phase leg PL2 and a third phase leg PL3. The phase legs are more particularly connected between a first DC terminal DC1and a second DC terminal DC2, where the mid points of the phase legs are connected to corresponding alternating current terminals ACA, ACB, ACC. A phase leg is in this example divided into two halves, a first upper half and a second lower half, where such a half is also termed a phase arm.

The first DC terminal DC1may be connected to a first pole of a DC power transmission system, and may therefore have a first potential Vdp that may be positive. The first pole may because of this also be termed a positive pole. A phase arm between the first DC terminal DC1and an AC terminal ACA, ACB and ACC may be termed a first phase arm or an upper phase arm, while a phase arm between the AC terminal and the second DC terminal DC2may be termed a second phase arm or a lower phase arm. The second DC terminal DC2may be connected to a second pole of the DC transmission system and may therefore also have a second potential Vdn that may be negative. The second pole may because of this also be termed a negative pole. As an alternative the second DC terminal DC2may be connected to ground.

The above described DC system may therefore be an asymmetric monopole DC system, a symmetric monopole DC system or a symmetric bipole DC system.

The phase arms of the voltage source converter 10 in the example in fig. 1 comprise cells. A cell is a unit that may be switched for providing a voltage contribution to the forming of a waveshape on the corresponding AC terminal. A cell then comprises one or more energy storage elements for this voltage contribution, which energy storage elements may for instance be in the form of capacitors. The cell may be switched to provide a voltage contribution corresponding to the voltage of the energy storage element or a zero voltage contribution. The cell thus comprises switches that control the voltage contribution from the energy storage element. Furthermore, at least some of the cells may have bipolar voltage contribution capabilities.

This means that the voltage contribution from a cell of this type, which may be a full-bridge cell, may have two different polarities.

At least some of the cells are with advantage connected in series or in cascade in a phase arm.

In the example given in fig. 1 there are five series-connected or cascaded cells in each phase arm. Thus the upper phase arm of the first phase leg PLi includes five cells C1p1, C2p1, C3p1, C4p1 and C5p1, while the lower phase arm of the first phase leg PLi includes five cells C1n1, C2n1, C3n1, C4n1 and C5n1. As the upper phase arm is connected to the first pole P1 it may also be considered to be a positive phase arm and as the lower phase arm may be connected to a second pole, it may be considered to be a negative phase arm. The upper phase arm is furthermore joined to the first AC terminal ACA via a first or upper arm reactor Laarm1, while the lower phase arm is joined to the same AC terminal ACA via a second or lower arm reactor Laarm2. In a similar fashion the upper phase arm of the second phase leg PL2 includes five cells C1p2, C2p2, C3p2, C4p2 and C5p2 while the lower phase arm of the second phase leg PL2 includes five cells C1n2, C2n2, C3n2, C4n2 and C5n2. Finally the upper phase arm of the third phase leg PL3 includes five cells C1p3, C2p3, C3P3, C4P3 and C5p3 while the lower phase arm of the third phase leg PL3 includes five cells C1n3, C2n3, C3n3, C4n3 and C5n3. The upper phase arms are furthermore joined to the corresponding secnd and third AC terminals ACB and ACC via corresponding first or upper arm reactors Lbarm1 and Lcarm1, respectively, while the lower phase arms are joined to the same AC terminal ACB and ACC via corresponding second or lower arm reactors Lbarm2 and Lcarm2, respectively.

The number of cells provided in fig. 1 is only an example. It therefore has to be stressed that the number of cells in a phase arm may vary. It is often favorable to have many more cells in each phase arm, especially in HVDC applications. A phase arm may for instance comprise hundreds of cells. There may however also be fewer.

Control of each cell in a phase arm is normally done through providing the cell with a control signal directed towards controlling the contribution of that cell to meeting a reference voltage. The reference voltage may be provided for obtaining a waveshape on the AC terminal of a phase leg, for instance a sine waveshape or a trapezoidal waveshape. In order to control the cells there is therefore a control unit 12.

The control unit 12 is provided for controlling all the phase arms of the converter. However, in order to simplify the figure only the control of the upper phase arm of the first phase leg PL is indicated in fig. 1.

The other phase arms are controlled in a similar manner in order to form output waveforms on the three AC terminals AC1, AC2 and AC3.

As mentioned above, the converter 10 may comprise full-bridge cells, i.e. cells with bipolar voltage contribution capability. Fig. 2 shows a full-bridge cell FBA that may be used in the converter.

The cell FBA is thus a full-bridge converter cell and includes an energy storage element, here in the form of a capacitor C, which is connected in parallel with a first string of switches S1 and S2. The energy storage element C provides a voltage Udm, and therefore has a positive and negative end, where the positive end has a higher potential than the negative end. The switches S1 and S2 in the first string are connected in series with each other, where each switch may be realized in the form of a switching element that may be an IGBT (Insulated Gate Bipolar Transistor) transistor together with an anti-parallel unidirectional conducting element. In fig. 3 the first switch S1 has a first transistor T1 with a first anti-parallel diode D1. The first diode D1 is connected between the emitter and collector of the transistor T1 and has a direction of conductivity from the emitter to the collector as well as towards the positive end of the energy storage element C. The second switch S2 has a second transistor T2 with a second anti-parallel diode D2. The second diode D2 is connected in the same way in relation to the energy storage element C as the first diode D1, i.e. conducts current towards the positive end of the energy storage element C. The first switch S1 is furthermore connected to the positive end of the energy storage element C, while the second switch S2 is connected to the negative end of the energy storage element C.

There is also a second string of series-connected switches S3 and S4. The second string of switches is here connected in parallel with the first string as well as with the energy storage element C. The second string includes a third switch S3, here provided through a third transistor T3 with antiparallel third diode D3 and a fourth switch S4, here provided through a fourth transistor T4 with anti-parallel fourth diode D4. The fourth switch S4 is furthermore connected to the positive end of the energy storage element C, while the third switch S3 is connected to the negative end of the energy storage element C. Both the diodes D3 and D4 furthermore have a direction of current conduction towards the positive end of the energy storage element C. The switches S3 and S4 in the second string are thus connected in series with each other. The switches are here also denoted cell switches. The switching elements may be implemented using Insulated Gate Bipolar Transistors (IGBTs). However, they may also be Bi-mode Insulated Gate Transistors (BiGTs) or other types of switching components.

This full-bridge cell FBA comprises a first cell connection terminal TE1 and a second cell connection terminal TE2, each providing a connection for the cell to a phase arm of a phase leg of the voltage source converter. In this full-bridge cell the first cell connection terminal TE1 more particularly provides a connection from the phase arm to the junction between the first and the second switches S1 and S2, while the second cell connection terminal TE2 provides a connection between the phase arm and a connection point between the third and fourth switches S3 and S4. The junction between the first and second switches S1 and S2 thus provides one cell connection terminal TE1, while the junction between the third and fourth switches S3 and S4 provides another cell connection terminal TE2. These cell connection terminals TE1 and TE2 thus provide points where the cell FBA can be connected to a phase arm of a phase leg. The first cell connection terminal TE1 thereby joins the phase arm with the connection point or junction between two of the series-connected switches of the first string, here the first and second switches S1 and S2, while the second cell connection terminal TE2 joins the phase arm with a connection point between two of the series connected switches of the second string, here between the third and fourth switches S3 and S4.

Finally it can be seen that there is a bypass switch connected in parallel with the cell FBA, between the first and second cell connection terminals TE1 and TE2, where the bypass switch is a thyristor based bypass switch TS that may be realized through two anti-parallel thyristors.

It is possible to use two phase controlled thyristors (PCTs), (which are each reverse blocking) in antiparallel or a bi-directional controlled thyristor (BCT) as a switch which has two integrated thyristors in antiparallel. For BCTs, devices with ratings between 2.8kV up to 6.5kV are available while for normal PCTs there is even a wider range up to 8.5kV. The thyristor switch may be connected in parallel with more than one cell. The thyristor switch can thus be connected in parallel with a string of cells (with at least one bipolar cell) according to the cell and thyristor voltage blocking capability. This can be freely chosen based on the design and loss optimization. Fig. 2 shows the simplest form of such a string comprising only one cell. The valve string voltage rating may be defined based on the number of series connected cells and may therefore be a function of the cells/device voltage rating and the quality of the output voltage. The voltage rating of the bypass switch may furthermore be optimized based on the number of such strings in a phase arm and the number of cells in the strings. The voltage rating of a bypass switch is thus set based on the number of strings in a phase arm, the number of cells in each string and the cell voltage rating. A suitable number of thyristors may be connected in series and/or parallel in order to obtain a desired rating.

It should be realized that as an alternative the bypass switch may be realized through two anti-parallel integrated gate-commutated thyristors (IGCT). In this case the cell does not have to be a full-bridge cell, but may in fact also be a half-bridge cell. In this case the strings do not have to comprise full-bridge cells.

Fig. 3 shows a block schematic of the control unit 12. As can be seen, the control unit 12 may comprise a conversion control element 14 for providing regular control where an AC voltage waveshape is formed, a thyristor switching control element 16 and a fault handling element 18. The conversion control element 14 more particularly uses at least one AC reference voltage for each phase leg in order to form a waveshape for use as a steady-state phase voltage. These AC voltage references are typically used in Pulse Width Modulation (PWM) control of the phase legs. The control unit 12 is with advantage implemented using a computer with computer program code comprising computer program instructions providing the above-mentioned elements. However, it may also be implemented using dedicated hardware circuits such as Field-Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC).

Fig. 4 shows how a conducting thyristor switch TS that is connected in parallel with a string ST of cells may be turned off, where the string in this case only comprises one full-bridge cell. The thyristor switch is turned off using the full-bridge cell of the string for different current conduction directions through the combination of thyristor switch and full-bridge cell. This turning off is handled by the thyristor switching control element 16 of the control unit 12. Here the current conduction paths are shown through thicker lines than non-conduction paths.

A turning on of a thyristor is not problematic and may be made htrough providing a signal to the gate of a thyristor. However, the turning off that cannot be made using such a control signal. In order to turn off a thyristor the full-bridge cell is used. Initially when the thyristor switch TS is conducting in a first current direction, there is a current running from the second cell connection terminal to the first cell connection terminal via a thyristor of the thyristor switch having a current conduction direction towards the first cell connection terminal. No current is passing through the cell switches. In this case also the cell of the string may be blocked. As can be seen in the middle of fig. 4, when a turning off is to be made, then it is possible to reverse bias the conducting thyristor through switching the first and third switches S1 and S3 of the full-bridge cell, which will apply a negative voltage across the thyristor and thereby it is turned off, and consequently also the thyristor switch TS is turned off, which will lead to the current running through these two switches S1 and S3 as well as through the cell capacitor instead of through the thyristor switch.

In a similar manner it can be seen that when there is a current running from the first cell connection terminal to the second cell connection terminal via a thyristor of the thyristor switch TS having a current conduction direction towards the second cell connection terminal, then it is possible to reverse bias the conducting thyristor through switching the second and fourth switches S2 and S4 of the full-bridge cell, and consequently also the thyristor switch TS is turned off, which will lead to the current running through these two switches S2 and S4 as well as through the cell capacitor instead of through the thyristor.

It can in this way be seen that the thyristor switch TS may be turned off using the full-bridge cell.

It should also be realized that if the bypass switch is realized using IGCTs then there is no need for the above mentioned control of the full-bridge cell control.

As described above, the thyristor switch is, in a phase leg of the converter to, connected in parallel with a string of cells comprising at least one cell and where at least one cell of the string may be a full bridge cell Fig. 2 and 4 show one special realization of this principle where the string only comprises one cell, which then has to be a full-bridge cell, when the thyristor based bypass switch comprises thyristors. As will be shown later a string may comprise more cells and in this case one cell has to be a fullbridge cell in order to obtain a thyristor switch turn off. However, the rest may be either full-bridge or half-bridge cells. The rest of the cells may thus comprise cells with unipolar voltage contribution capabilities. They may also be required to be able to provide a zero voltage contribution.

The functioning of the converter in fig. l with the thyristor switch and cell string combination of fig. 2 and 4, will now be described with reference also being made to fig. 5, which shows a flow chart of a number of method steps in a method for controlling voltage forming in a modular multilevel converter. This type of operation can easily be extended to other types of converter configurations. It can also be seen that it may be simplified through the use of a bypass switch that is based on IGCTs. The operation will be described in relation to one phase leg. It should however be realized that the same type of operation is performed for all three phase legs.

In steady state operation of the converter 10, the conversion control element 14 of the control unit 12 controls the cells of a phase leg to form a waveshape. The waveshape being formed may be a trapezoidal waveshape. However, also other shapes are possible, such as regular MMC wavshapes such as sine waveshapes. Thereby a number of cells are selected to be inserted into the phase leg for making the cell capacitors contribute in the forming of the waveshape. Typically a switching of the first and third switches or a switching of the second and fourth switches of a cell will result in the cell capacitor being made to contribute to the forming of the waveshape. In this respect a switching of the first and the fourth switch Si and S4 or of the second and third switch S2 and S3, will lead to the cell being bypassed. According to the principles of the invention, when all the cells of a string are to be bypassed, then the thyristor switch TS is turned on in order for the bypass current essentially to pass through the bypass switch instead of through the cell switches.

This type of operation is typically performed by the thyristor switching control element 16 of the control unit 12.

The method may start with the conversion control element 14 obtaining a waveshape reference, step 20. It then determines which cells are to be switched in order to form the waveshape. This may mean that some cells of a phase leg are to have the cell capacitor contribute to the forming of the waveshape, while others are bypassed.

This means that some of the cells in the upper and lower phase arm of a phase leg are having their cell capacitors contribute while others are not. This also means that at virtually every time instant that the wavehape changes between a maximum and a minimum value, there is a change of state, where at least one cell is to stop contributing or start contributing.

At every switching instance, the thyristor switching control element 16 investigates which cells that the conversion control element 14 changes state of, i.e. which cells are to be switched for starting to contribute to the forming of the waveshape, which cells are to be switched for stopping to contribute to the waveshape and which cells are to retain their switching state. The thyristor switching control element 16 more particularly investigates each string with regard to if any cell in the string is to contribute to the forming of the waveshape or if all are to be bypassed, step 22.

For every string it thus investigates if there is a change in string usage between at least one cell being used in the forming of the wavshape or all being bypassed.

If there is no change in string usage, step 24, then the conversion control element 14 controls the cells according to the waveforming scheme without any control being performed by the thyristor switching control element 16, step 32. This means that strings that were bypassed will continue to be bypassed and strings where at least one cell is used in the forming of the waveshape will still be employed without being bypassed.

However, if there is a change, step 24, then the thyristor switching control element 16 investigates if all cells are to be bypassed or any cell is to be inserted.

In case all cells of the investigated string are to be bypassed, i.e. the string goes from having at least one cell contribute to the waveshape to all being bypassed, then the corresponding bypass switch is activated, step 28. The bypass switch is thus controlled to conduct when all the cells of the string are to be bypassed. This is done through the thyristor switch control element 16 emitting a signal to the gate of a thyristor of the thyristor switch TS for turning on this thyristor, which will lead to the corresponding cells being bypassed.

If on the other hand the string goes from all cells being bypassed to at least one cell being used to contribute to the waveshape, step 26, then the corresponding bypass switch is turned off by the thyristor switching control element 16. The turning off for a thyristor switch is achieved through reverse biasing the conducting thyristor using the full-bridge cell of the string, step 30. The thyristor switching control unit 16 thus emits control signals to two of the switches of a full-bridge cell of the string in order to reverse-bias the conducting thyristor of the thyristor switch. How this reverse-biasing may be done was described earlier in relation to fig. 4.

The control unit 12 thus controls the full-bridge cell of the string to apply a negative voltage across the bypass switch when any of the energy storage elements of the cells in the string are to be used for forming the waveshape.

After all strings have been handled in this way, the conversion control element 14 then continues and selectively controls the cells to insert their energy storage element in the phase leg for forming the waveshape, step 32. Thereafter a new value of the waveshape reference is obtained at the next switching instance and the method steps repeated.

It can in this way be seen that the thyristor switch TS is used to bypass the cells of a string where all cell capacitor voltages are to be bypassed.

What this could look like when forming one cycle of a trapezoid waveshape can be seen in fig. 6 - 9, where fig. 6 shows the control of the cells and thyristor switches in a modular multilevel converter when forming a first stage of a waveshape, fig. 7 shows the control of the cells and thyristor switches in the modular multilevel converter when forming a second stage of the waveshape, fig. 8 shows the control of the cells and thyristor switches in the modular multilevel converter when forming a third stage of the waveshape and fig. 9 shows the control of the cells and thyristor switches in the modular multilevel converter when forming a fourth stage of the waveshape.

Here it is possible that the cells in the upper phase arm are essentially used for forming the positive half of the waveshape WS, while the cells of the lower phase arm are essentially used for forming the negative half of the waveshape WS. Furthermore, in these figures the cells of the different phase legs are shown as simultaneously forming the same waveshape. The phase legs are thereby shown as having the same switching states. This has been done in order to provide a better understanding of the control principle. Normally the waveshapes would be shifted in phase from each other and thereby also the switching states would differ between the phase legs.

In the first stage the wavshape WS rises from a midpoint value, typically a zero value, to a maximum value. In this stage the upper arm cells are bypassed by the thyristors one by one depending on the trapezoidal voltage pattern until all thyristors are turned on. Thereby the potential of the AC terminal is clamped to the maximum value of the wavshape, which in fig. 7 - 9 is the flat top part.

In the second stage, the upper arm thyristors remains on and clamps the AC terminal voltage to the positive DC link voltage while the voltage is blocked by the lower arm cells. The lower arm cells may here all be blocked. The time that the waveshape has this maximum value stretches over more than one switching instant.

In the third stage, the upper arm thyristors are forced to be switched off one by one by flipping the voltage across them. This means that in this stage both upper and lower arm fall-bridges are coming back to the operation to generate the voltage pattern during the transition from the top to the bottom side of the waveform. During the first part of the third stage, from the maximum to the midpoint value, the upper cells are switched in while during the second part from the midpoint to the minimum value, the lower arm cells are being bypassed one by one until the minimum value is reached. At this point the upper arm cells may all be blocked.

In the fourth stage all the lower arm thyristors are switched on and clamps the voltage at the AC terminal to the negative DC pole until the AC voltage should once again rise. The time that the wavshape WS has this minimum value also stretches over more than one switching instant.

In a fifth stage (not shown), the lower arm thyristors are forced to be switched off one by one by flipping the voltage across them. At the same time the corresponding cells are controlled to insert the cell voltage until the midpoint voltage is obtained, whereupon the operation of the first stage is resumed.

The trapezoidal waveshape WS may thereafter be optimized using total harmonic distortion (THD) in order to obtain a sine waveshape.

The advantage of the above described operation is that the thyristor switch TS provides a low loss “director switch” instead of the high-loss ordinary cell bypass employing the switching elements of the cells. It can also be seen that each thyristor switch may only operate once per power cycle and that the overall effect is to provide an independent controllable AC voltage source. Accordingly the thyristor valves will mostly conduct current during the flat topped regions of the trapezoidal waveform and the full-bridge chainlink circuits provide a controlled voltage between these conduction states. As a thyristor switch is used during cell bypass the conduction losses are significantly reduced.

Through lowering the losses, the efficiency of the converter may be raised, which is advantageous in power transmission situations.

The used waveshape may also reduce the required capacitor size.

Even though the converters described so far have had a string only comprising one full-bridge cell, it is evident from the description that a string may comprise more cells. An example of this is shown in fig. to.

As can be seen there is an upper phase arm of the first phase leg with a first thyristor switch TS1 in parallel with a first string ST1 and a second thyristor switch TS2 in parallel with a second string ST2. There is also an upper phase arm of the second phase leg with a third thyristor switch TS3 in parallel with a third string ST3 and a fourth thyristor switch TS4 in parallel with a fourth string ST4. There is furthermore an upper phase arm of the third phase leg with a fifth thyristor switch TS5 in parallel with a fifth string ST5 and a sixth thyristor switch TS6 in parallel with a sixth string ST6. There is also a lower phase arm of the first phase leg with a seventh thyristor switch TS7 in parallel with a seventh string ST7 and an eighth thyristor switch TS8 in parallel with an eighth string ST8. There is furthermore a lower phase arm of the second phase leg with a ninth thyristor switch TS9 in parallel with a ninth string ST9 and a tenth thyristor switch TS10 in parallel with a tenth string ST10. There is finally a lower phase arm of the third phase leg with an eleventh thyristor switch TS11 in parallel with an eleventh string ST11 and a twelfth thyristor switch TS12 in parallel with a twelfth string ST12.

In the above shown strings all comprise two cells, where one has to be a full-bridge cell when the bypass switch is a thyristor switch. However the other may be either a full-bridge cell or a half-bridge cell. The use of strings with more than one cell also reduces conduction losses. In addition to this it may also limit the switching losses.

The turning off of a conducting thyristor in a thyristor switch that is connected in parallel with a string comprising two or more cells is shown in fig. 11 for the two different conduction directions. As can be seen the operation is in many ways similar to the operation shown in fig. 4 for a string comprising only one cell. It can be seen that before the thyristor switch TS is to be turned off, then both cells may be blocked. Thereafter one of the cells is controlled to reverse-bias the conducting thyristor in order to turn off the switch. The other cell may remain blocked or set to provide a zero voltage contribution. Thereafter when the thyristor switch has been turned off, the cell that was used to reverse-bias the thyristor switch may continue to give a voltage contribution to the wavshape forming, while the other may be controlled to give a zero voltage contribution.

It should be realized that it is possible to have even more cells in a string. It is for instance possible that all cells of a phase arm are provided in a string in parallel with a thyristor switch. A string can thus range from comprising only one cell to comprising all cells of a phase arm.

In the examples given earlier the converter was a regular modular multilevel converter based on the two-level converter concept. It is possible to apply the principle also on other types of converters, such as nlevel converters providing n output voltage levels based on (n-i) series connected DC link capacitors, where n ? 2. One example of this where n = 3 for a hybrid neutral point clamped converter is shown in fig. 12. Here it can be seen that each phase leg comprises two phase strings corresponding to the upper and lower phase arms of the converter in fig. 11, where each phase string comprises two thyristor switch cell string combinations. Each phase string thus comprises two thyristor switches, each connected in parallel with a corresponding cell string, here comprising two cells.

However, instead of the midpoint of these phase strings providing an AC terminal, it is grounded. Instead there is an additional phase string that stretches from a first point at the junction between the two thyristor switches of the upper phase string and a second point at the junction between the thyristor switches of the lower phase string. In such an additional phase string there are connected two thyristor switches, each in parallel with a corresponding string of cells. Here it can also be seen that the AC terminal of a phase leg is provided at the midpoint of such an additional phase string, i.e. at between the two thyristor switches of the additional phase string.

Such a converter has the advantage of providing a converter that adds a number of levels to the three levels that are obtained through the neutralpoint clamped converter.

It is possible to use the bypass switch cell string principle also in other types of converters such as flying capacitor and N-level converters. In the case of an N-level converter the waveform may then also be an N-level staircase waveform.

In the examples given above the modular multilevel converter was used as voltage source converter. However, as it comprises thyristors, it may also be operated as a current source converter, where thye bypass switches function as converter valves. However, as the valves may be turned off they may be more easily controlled than conventional current source converters especially when providing reactive support. The required filtering is also limited due to the ability of a finer control of the firing angle.

It is also possible that the converter is used in an AC system, for instance as a STATCOM.

The bypass switch and cell combination may also with advantage be used in fault handling, which fault handling may be controlled by the fault handling element 18 of the control unit 12. In such fault handling the fault handling element 18 controls a bypass switch for bypass operation and the cells for fault current blocking operation depending on a fault handling requirement. This means that in dependence of the action that the handling of the fault requires, the fault handling element 18 may control a bypass switch of a bypass switch and cell string combination for bypass operation if the fault handling requirement is a short-circuiting and the cells of the corresponding cell string of the bypass switch and cell string combination to be blocked if the fault handling requirement is to limit a fault current. In the case of DC fault such as a DC pole-to-ground fault, the fault handling element may block the thyristor switches and the full-bridge cells. Thereby the cell capacitors may be used to limit the fault current.

In case of a fault on an AC phase, such as an internal AC single phase -toground fault, for a converter connected to an asymmetric monopole system or a symmetric bipole system with the second DC terminal connected to ground, the fault handling element may control the bypass switches of the lower phase arms connected to the healthy AC phases to bypass the cells during the negative half-period of the AC voltage of these healthy phases and control the bypass switches and cells connected to the faulty phase to be blocked. Also the bypass switches and cells of the upper phase arms connected to the healthy AC may be blocked. The control unit thus performs, during a fault on one AC phase, bypass of strings in the lower phase arms connected to the healthy phases.

During transients and transient operation, it is also possible that string bypass is disabled.

There is thus a new design for an arm of an MMC. The design involves the utilization of two types of power semiconductors using two different technologies in order to exploit the best characteristics of them in order to achieve the result of a “quasi-MMC” operation. The two technologies involved are Thyristor and IGBT, the first having the advantage of low conduction loss and high surge current capability with the drawback of controllability, the second having the advantage of superior switching characteristics, thus exploitable at the VSC technology, but disadvantage of higher conduction losses and low surge current capability. The combination of these two technologies can reduce the VSC conduction loss combined with reducing the converter energy storage size and footprint.

A “quasi-MMC” operation is obtained through the exploitation of technologies that are available in the market today, in proper connection, can perform their better characteristics by being properly controlled. As described earlier a converter cell/arm can be formed by a number of cells in parallel with a bypass switch using two main types of devices: 1. A first type is a bipolar cell, for example a full-bridge cell, being capable of shaping a quasi-square wave modulation (controlled transition from top to bottom and vice versa); where this type of device may be based on Silicon IGBTs. 2. A second type of device is the thyristor switch connected in parallel with a string of cells and controlled to carry the main current for a significant portion of the period during the flat topped region of the waveform. This type of device may for instance be based on Silicon Thyristor semiconductors.

A New Quasi-MMC using a thyristor switch in parallel with a string of cells has been proposed which allows the devices have the possibility of operating in their optimal conditions which gives following advantages: A: The "shaper" including the cells switches at a very low frequency at the transition period thus exploiting its main advantage of controllability. This will be used to give greater flexibility for the voltage control and improved Total Harmonic Distortion (THD).

B: The “director” Thyristor switches conduct current during a significant portion of the period thus exploiting their advantage of very low conduction losses.

C: Operating cells during the transition between the flat upper and lower part of the waveform, the size of the capacitors and current rating of the semiconductors in the individual cells can be reduced.

D: "Director” thyristor switches connected between the cell connection terminals of the bipolar cells can be used as fully controllable switches by flipping the voltage across them.

E: The clamped voltage or trapezoidal waveform can be combined with a proper modulation technique such as harmonic elimination to enhance the output quality. The control unit may thus control the converter using a tailored modulation, such as using harmonic elimination modulation.

F: The converter has higher internal and external fault tolerance capability through the use both thyristor switch and bipolar cells.

G: There is a high flexibility to achieve the optimum converter design.

Carrying the current through full-bridge cells for an optimized short time (during the transient) will reduce the capacitor size as well as semiconductor current ratings and thus the footprint of the converter.

The use of bypass switch during steady state operation will also limit the ripple on the energy storage elements of the cells.

Having a MMC with built-in thyristor bypass and full-bridge/bipolar cells, the converter can handle the DC and AC internal and external fault scenarios in different manners either though the thyristors or by using the full-bridges which results in reducing the over rating of the converter and capacitors.

The proposed cell/arm structure can be used in different monolithic multilevel converters including 2-Level converter shown in Fig. to or 3-level converter shown in Fig. 12.

The structure in Fig. 10 and 12 can be re arranged to different hybrid VSC structure by properly choosing the number of cells and thyristor switches to be inserted or switched, respectively.

The control unit may, as was previously mentioned, be provided in the form of one or more processors together with computer program memory including computer program code for performing its functions. This computer program code may also be provided on one or more data carriers which perform the functionality of the control unit when the program code is being loaded into a computer acting as control unit. One such data carrier 34 with computer program code 36, in the form of a CD ROM disc, is schematically shown in fig. 13.

From the foregoing discussion it is evident that the present invention can be varied in a number of different ways. It shall consequently be realized that the present invention is only to be limited by the following claims.

Claims

1. A modular multilevel converter (to) in a High Voltage Direct Current (HVDC) power transmission system and configured to convert between alternating current (AC) and direct current (DC) and comprising a first and a second terminal (DC1, DC2) that are DC terminals, at least one phase leg (PL1, PL2, PL3) connected between the first and second terminals, which phase leg comprises an upper phase arm and a lower phase arm where the upper phase arm is connected to the first terminal (DC1) and the lower phase arm to the second terminal (DC2) and the upper and lower phase arms are both connected to an AC terminal (ACC), each phase leg comprising a number of cells having energy storage elements (C) and at least one bypass switch, where the bypass switch is a thyristor based bypass switch (TS, TS1, TS2, TS3, TS4, TS5, TS6, TS7, TS8, TS9, TS10, TS11, TS12) comprising two anti-parallel thyristors connected in parallel with a string (ST, ST1, ST2, ST3, ST4, ST5, ST6, ST7, ST8, ST9, ST10, ST11, ST12) of cells (C1p1, C2p1, C3p1, C4p1, C5p1, C1n1, C2n1, C3n1, C4n1, C5n1, C1p2, C2p2, C3p2, C4p2, C5p2, Cm2, C2n2, C3n2, C4n2, C5n2, C1p3, C2p3, C3P3, C4P3, C5p3, Cm3, C2n3, C3n3, C4n3, C5n3) in the phase leg, and a control unit (12) configured to control the modular multilevel converter to act as a voltage source converter, characterized in that said string comprising two or more cells where one cell of said string is a cell (FBA) with bipolar voltage contribution capability and the rest comprise cells with unipolar voltage contribution capabilities and each phase arm comprises cells and at least one string with parallel bypass switch, and wherein said control unit (12) further being configured to selectively control the cells to insert their energy storage elements (C) in the phase leg in order to form a waveshape (WS) appearing on the AC terminal, control the bypass switch (TS) to conduct when all the cells of the corresponding string are to be bypassed in the forming of the waveshape (WS), and control the cell of the string having bipolar voltage contribution capability to apply a negative voltage across the bypass switch when any of the energy storage elements of the cells in the string are to be used for forming the waveshape.

2. The modular multilevel converter according to claim 1, wherein the converter is a two-level converter.

3. The modular multilevel converter according to claim 1, wherein the converter is a converter in the group of three-level neutral-point clamped converter, flying capacitor converter and N-level converter.

4. The modular multilevel converter according to any previous claims, wherein the control unit (12) when being configured to selectively control the cells is configured to selectively control the cells to form a waveshape (WS) with a maximum and a minimum where all cells of the upper phase arm are controlled to being bypassed when the waveshape (WS) has the maximum and all cells of the lower phase arm are controlled to being bypassed when the waveshape (WS) has the minimum.

5. The modular multilevel converter (10) according to claim 4, wherein the waveshape (WS) is a trapezoidal waveshape with maxima and minima stretching over more than one switching instant, a conventional MMC waveshape or an N-level staircase waveshape.

6. The modular multilevel converter (10) according to claim 4 or 5, wherein the control unit (12) is further configured to control the converter using a tailored modulation, such as using harmonic elimination modulation.

7. The modular multilevel converter according to any previous claim, wherein the control unit (12) is configured to control the converter for fault handling, in which the control unit (12) is configured to control the bypass switch (TS) for bypass operation and cells for fault current blocking operation depending on a fault handling requirement.

8. The modular multilevel converter according to claim 7, wherein the control unit (12) is configured to control a bypass switch (TS) for bypass operation if the fault handling requirement is a short-circuiting and the cells of the corresponding cell string to be blocked if the fault handling requirement is to limit a fault current.

9. The modular multilevel converter (14) according to claim 7 or 8, wherein the control unit (12) is configured to perform, during an internal AC single phase fault on one AC phase, bypass of strings in the lower phase arms connected to the healthy phases during the negative half-period of the AC voltage of the healthy phases.

10. The modular multilevel converter (10) according to any previous claim, wherein the control unit (12) is configured to disable string bypass during transient operation.

11. The modular multilevel converter according to any previous claim, wherein the voltage rating of the bypass switch is set based on the number of strings in a phase arm, the number of cells in each string and the cell voltage rating.

12. A method of controlling a modular multilevel converter (10) in a High Voltage Direct Current (HVDC) power transmission system and configured to convert between alternating current (AC) and direct current (DC) and comprising a first and a second terminal (DC1, DC2) that are DC terminals, at least one phase leg (PL1, PL2, PL3) connected between the first and second terminals, the phase leg comprising an upper phase arm and a lower phase arm where the upper phase arm is connected to the first terminal (DC1) and the lower phase arm to the second terminal (DC2) and the upper and lower phase arms are both connected to a third AC terminal (ACC), each phase leg comprising a number of cells having energy storage elements (C) and at least one bypass switch, where the bypass switch is a thyristor based bypass switch (TS, TS1, TS2, TS3, TS4, TS5, TS6, TS7, TS8, TS9, TS10, TS11, TS12) comprising two anti-parallel thyristors connected in parallel with a string (ST, ST1, ST2, ST3, ST4, ST5, ST6, ST7, ST8, ST9, ST10, ST11, ST12) of cells (C1p1, C2p1, C3p1, C4p1, C5p1, C1n1, C2n1, C3n1, C4n1, C5n1, C1p2, C2p2, C3p2, C4p2, C5p2, Cm2, C2n2, C3n2, C4n2, C5n2, C1p3, C2p3, C3P3, C4P3, C5p3, Cm3, C2n3, C3n3, C4n3, C5n3) in the phase leg, the method being performed in a control unit (12) of the modular multilevel converter, characterized in that said string comprising two or more cells where one cell of said string is a cell (FBA) with bipolar voltage contribution capability and the rest comprise cells with unipolar voltage contribution capabilities and each phase arm comprising cells and at least one string with parallel bypass switch, and wherein said control unit (12) comprising selectively controlling (32) the cells to insert their energy storage elements (C) in the phase leg in order to form a waveshape (WS) appearing on the third AC terminal, and controlling (28) the bypass switch (TS) to conduct when (26) all the cells of the corresponding string are to be bypassed in the forming of the waveshape (WS), and controlling (30) the cell of the string with bipolar voltage contribution capability to apply a negative voltage across the bypass switch when (26) any of the energy storage elements (C) of the cells in the string are to be used for forming the waveshape (WS).

13. The method according to claim 12 , wherein the selective controlling of the cells comprises selectively controlling the cells to form a waveshape (WS) having a maximum and a minimum where all cells of the upper phase arm are controlled to being bypassed when the waveshape (WS) has the maximum and all cells of the lower phase arm are controlled to be bypassed when the waveshape (WS) has the minimum.

14. The method according to claim 13, wherein the waveshape (WS) is a trapezoidal waveshape with maxima and minima stretching over more than one switching instant, a conventional MMC waveshape or an N-level staircase waveshape.

15. The method according to claim 13 or 14, further comprising controlling the converter using a tailored modulation, such as harmonic elimination modulation.

16. The method according to any of claims 12 - 15, further comprising controlling the converter for fault handling, the fault handling controlling comprising controlling the bypass switch (TS) for bypass operation or the cells to be blocked depending on a fault handling requirement.

17. The method according to claim 16, wherein the fault handling controlling comprises controlling a bypass switch (TS) for bypass operation if the fault handling requirement is a short-circuiting and controlling the cells of a corresponding cell string to be blocked if a fault handling requirement is to limit a fault current.

18. The method according to claim 16 or 17, wherein the fault handling controlling comprises performing, during an internal AC single phase fault on one AC phase, bypass of strings in the lower phase arms connected to the healthy phases during the negative half period of the voltage of the healthy phases.

19. The method according to any of claims 12 - 17, further comprising disabling string bypass during transient operation.

20. A computer program product for controlling a modular multilevel converter (10) in a High Voltage Direct Current (HVDC) power transmission system and configured to convert between alternating current (AC) and direct current (DC) and comprising a first and a second terminal (DC1, DC2) that are DC terminals, at least one phase leg (PL1, PL2, PL3) connected between the first and second terminals, which phase leg comprises an upper phase arm and a lower phase arm where the upper phase arm is connected to the first terminal (DC1) and the lower phase arm to the second terminal (DC2) and the upper and lower phase arms are both connected to an AC terminal (ACC), each phase leg comprising a number of cells having energy storage elements (C) and at least one bypass switch, where the bypass switch is a thyristor based bypass switch (TS, TS1, TS2, TS3, TS4, TS5, TS6, TS7, TS8, TS9, TS10, TS11, TS12) comprising two anti-parallel thyristors connected in parallel with a string (ST, ST1, ST2, ST3, ST4, ST5, ST6, ST7, ST8, ST9, ST10, ST11, ST12) of cells (C1p1, C2p1, C3p1, C4p1, C5p1, C1n1, C2n1, C3n1, C4n1, C5n1, C1p2, C2p2, C3p2, C4p2, C5p2, Cm2, C2n2, C3n2, C4n2, C5n2, C1p3, C2p3, C3P3, C4P3, C5p3, Cm3, C2n3, C3n3, C4n3, C5n3) in the phase leg, said string comprising two or more cells, where one cell of said string is a cell (FBA) with bipolar voltage contribution capability and the rest comprise cells with unipolar voltage contribution capabilities and each phase arm comprising cells and at least one string with parallel bypass switch, said computer program product being provided on a data carrier (34) comprising computer program code (36) configured to cause a control unit (12) for the modular multilevel converter (10) to, when said computer program code is loaded into the control unit (12) selectively control the cells to insert their energy storage elements in the phase leg in order to form a waveshape (WS) appearing on the AC terminal, control the bypass switch to conduct when all the cells of a corresponding string are to be bypassed in the forming of the waveshape (WS), and control the cell of the string having bipolar voltage contribution capability to apply a negative voltage across the bypass switch when any of the energy storage elements of the cells in the string are to be used for forming the waveshape.