RU2577192C1 - Incoherent demodulator of binary digital signal with a soft iterative decoding of data - Google Patents

Incoherent demodulator of binary digital signal with a soft iterative decoding of data Download PDF

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RU2577192C1
RU2577192C1 RU2015104486/08A RU2015104486A RU2577192C1 RU 2577192 C1 RU2577192 C1 RU 2577192C1 RU 2015104486/08 A RU2015104486/08 A RU 2015104486/08A RU 2015104486 A RU2015104486 A RU 2015104486A RU 2577192 C1 RU2577192 C1 RU 2577192C1
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Анатолий Владимирович Зеленевский
Владимир Владимирович Зеленевский
Евгений Валерьевич Шмырин
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Межрегиональное общественное учреждение "Институт инженерной физики"
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Abstract

FIELD: information technology.
SUBSTANCE: invention relates to the filed of encoding and programmable decoding technology and can be used in receivers for optimum decoding of received code combination. Non-coherent demodulator of binary digital signal with soft iterative decoding of data comprises a phase detector with an output low frequency filter, a logarithmic relationship likelihood function, series-connected Ely element, frequency meter and resolver, sampling device and series-connected clock pulse generator, bidirectional counter, digital-analogue converter and comparator unit.
EFFECT: achieved technical result is faster operation with ensuring the highest reliability of its operation to a value close to maximum possible limit by Claude Shannon.
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Description

The invention relates to the field of coding, programmable decoding or code conversion for detecting errors and correcting them and can be used in receivers of phase-shifted signals for optimal decoding of the received code combination.

The prior art device for determining the logarithmic likelihood ratio with precoding, containing a radio channel, on the receiving side of which there is a radio receiver, the output of which is connected to the input of the data receiver through the received data processor [Patent RU 2304352, IPC H04L 1/00, H04L 27/26 , H03M 13/45, 2002]. Using the processor of the received data in a known device, the negative effect of error propagation is reduced when using turbo codes and convolutional codes as means of precoding.

A disadvantage of the known device for determining the logarithmic likelihood ratio is that its implementation requires sophisticated equipment and it takes a long time to make a “soft” decision on the decoding result. In addition, the used turbo code and convolutional code as a means of precoding can detect a decoding error only when an idealized random noise in the form of “white” noise is exposed to the radio channel, which has zero mathematical expectation and the absence of any correlation between bursts of its manifestation.

Closest to the proposed known technical solution as a prototype is a decoding device containing a phase detector with an output low-pass filter [V. Galkin Digital mobile radio. Textbook for high schools // M .: Hot line. - Telecom. - 2007.- S. 107, Fig. 3.21. - 432 p.] And a calculator of the logarithmic relations of the likelihood functions (received data processor) with “soft” input and “soft” output solutions [Sklyar B. Digital communication. Theoretical foundations and practical application. 2nd ed., Rev. Per. from English M.: Williams Publishing House, 2007. - S. 502-519, Fig. 8.21. - 1104 s.], With which discrete posterior values of the logarithmic ratio of likelihood functions are realized, which reduces the likelihood of a bit error as a function of the ratio of the energy of an elementary (bit) symbol to the noise power (E b / N 0 ) with an increase in the number of iterations.

The disadvantage of the prototype is that to make a “soft” decision on the result of iterative (turbo) decoding of the adopted code combination, “hard” decisions are made, namely: “1” or “0” at the decoder input, which does not fully meet the criterion energy efficiency of the signal-code construction of a binary digital signal. The low energy efficiency of the signal-code construction of a binary digital signal reduces the range of radio communications to provide a given required reliability of the received message. Another disadvantage of the prototype is that a large number of iterations determines the required accuracy of the demodulator of the binary digital signal with a simultaneous increase in the demodulation time.

An object of the invention is to increase the energy efficiency of the signal-code structure of the transmitted binary digital signal while reducing the demodulation time.

The technical result of the invention is that the performance of an incoherent demodulator of a binary digital signal with soft iterative decoding of data is increased to ensure the highest reliability of its operation to a value close to the maximum possible limit (limit) of Claude Shannon.

The essence of the invention lies in the fact that, in addition to the well-known and general significant distinguishing features, namely: a phase detector of a binary digital signal with an output low-pass filter and a calculator of the logarithmic likelihood functions, the proposed incoherent demodulator of a binary digital signal with soft iterative data decoding contains series-connected two-input OR element, a frequency meter and a two-input decision block, a sampler and a series-connected oscillator pulses, a reversible counter, a digital-to-analog converter and a comparison block for two inputs and two outputs, the second input of which is connected to the output of the sampler, one input of which is connected to the output of the clock generator and the second input of the deciding unit, the other input of the sampler is connected to the output of the low-pass filter , one output of the comparison unit is connected to the direct counter input of the reversible counter, and the other output of the comparison unit is connected to the inverse counter input of the reverse counter, the outputs of the reverse counter connected to the inputs of the calculator of the logarithmic relationship of the likelihood functions, the control input of which is connected to the output of the decisive unit, the outputs of the comparison unit are connected to the inputs of the OR element.

The novelty of the invention lies in the fact that the proposed incoherent demodulator of a binary digital signal with soft iterative data decoding contains a series-connected OR element for two inputs, a frequency meter and a decisive block for two inputs, a sampler and a series-connected clock generator, a reversible counter, a digital-to-analog converter and a block comparisons to two inputs and two outputs, the second input of which is connected to the output of the sampler, one input of which is connected to the output of the clock generator pulses and with the second input of the deciding unit, the other input of the sampler is connected to the output of the low-pass filter, one output of the comparison unit is connected to the direct counting input of the reversing counter, and the other output of the comparing unit is connected to the inverse counting input of the reversing counter, the outputs of the reversing counter are connected to the information the inputs of the calculator of the logarithmic relationship of likelihood functions, the control input of which is connected to the output of the decisive unit, the outputs of the comparison unit are connected to the inputs of the element And LI, which provides increased performance demodulator with soft iterative decoding of data with the highest decoding accuracy to a value close to the maximum possible Claude Shannon boundary.

The scheme of the proposed incoherent demodulator of a binary digital signal with soft iterative decoding of data is shown in FIG. 1, a family of graphical dependences of the probabilities of error-free reception of an elementary discrete symbol of a received binary digital signal on the ratio of powers of an elementary (bit) symbol of a binary digital signal and interference is shown in FIG. 2.

In FIG. 1 is indicated:

1 - clock generator;

2 - reverse counter;

3 - digital-to-analog converter;

4 - a comparison unit for two inputs and two outputs with the possibility of evaluating the result of the comparison of amplitudes;

5 - discretizer;

6 - calculator of the logarithmic relationship of the likelihood functions (processor);

7 - phase detector;

8 is a delay line for a time interval equal to the duration of the radio pulse of the phase-shifted signal;

9 - low-pass filter;

10 - OR element for two inputs;

11 - frequency counter;

12 - a critical unit for two inputs.

In the initial position (static), the output of the clock generator 1 is connected through a series-connected reverse counter 2 and the digital-to-analog converter 3 to one input of the comparison unit 4, the other input of which is connected to the output of the sampler 6. The outputs of the reverse counter 2 are connected to the inputs of the calculator of the logarithmic likelihood functions 6. One output of the comparison unit 4 is connected to the direct counter input of the reversible counter 2, and the other output of the comparison unit 4 is connected to the inverse counter input of the reverse counter 2. The clock input of the sampler 5 is connected to the output of the clock 1. The input of the proposed incoherent demodulator of a binary digital signal with soft iterative data decoding is connected directly to one input of the phase detector 7, and the input circuit of the proposed device is connected to the other input of the phase detector 7 through delay line 8. The output of the phase detector 7 is connected through a low-pass filter 9 with the information input of the sampler 5. The outputs of the calculator logarithmic rel 6 sheniya likelihood functions are proposed non-coherent demodulator output a binary digital signal with the soft iterative decoding data. The outputs of the comparison unit 4 are connected through an OR element 10 and a frequency meter 11 to one input of the decision block 12, the other input of which is connected to the output of the clock 1. The output of the decision block 12 is connected to the control input of the logarithmic ratio likelihood function calculator 6.

The proposed incoherent demodulator of a binary digital signal with soft iterative decoding of data works as follows.

An input binary, for example, phase-shifted, digital signal is directly transmitted to one input of the phase detector 7, and the received binary digital signal is sent to the other input of this phase detector 7 through the delay line 8. The delay time of the delay line 8 is equal to the time interval t 0 of transmission of one elementary (binary) symbol of a digital signal, which ensures its incoherent reception. The clock generator 1 generates clock pulses with a repetition period t T satisfying an inequality of the form:

Figure 00000001

The reversible counter 2 accumulates the clock pulses arriving at its counter input, if the amplitudes of the output discrete signal of the 5 U 5 sampler exceed the amplitudes of the output signal of the digital to analog converter 3 U 3 in each clock cycle 1, i.e., at each iteration. The comparison of the mentioned amplitudes of the signals U 5 and U 3 occurs at the inputs of the comparison unit 4. When the condition

Figure 00000002

from one of the two outputs of the comparison unit 4, a control pulse is supplied to the direct input (+1) of the reverse counter 2 to increase its accumulated pulse value.

If condition (2) is not satisfied, but an inequality of the form

Figure 00000003

then from another output of the comparison unit 4, a control pulse is supplied to the inverse input (-1) of the reverse counter 2 to reduce its accumulated value of the counting pulses. Simultaneously, from the outputs of the comparison unit, control pulses are transmitted through the OR element 10 to the input of the frequency counter 11, with the help of which the frequency is determined, that is, the iteration duration per unit time. The output signal of the frequency meter 11 is compared with the output signal of the clock generator 1 in frequency (along the repetition period) using the decision block 12. If the compared frequencies are close to each other, then the output signal of the decision block 12 “Stop” is sent to the control input of the calculator of the logarithmic likelihood function 6 to stop him. Before the “Stop” control signal was received, the output pulse signals of the reverse counter 2 were sent to the information inputs of the logarithmic ratio calculator of the likelihood functions 6, with the help of which the highest reliability of decoding the binary digital signal is provided, which is illustrated in FIG. 2. From FIG. 2 it follows that the highest reliability of decoding a binary digital signal approaches a value close to the maximum possible boundary (limit) of Claude Shannon. The prototype required an excessively large value of iterations and, accordingly, demodulation time. In the proposed device, due to the automatic tracking of the iteration time with the repetition period of the clock pulses, the maximum performance of the incoherent demodulator of the binary digital signal with soft iterative data decoding is ensured.

The industrial feasibility of the invention is justified by the fact that it uses the nodes and elements known in the analogue and prototype for their intended purpose. The applicant organization made a model of the claimed incoherent demodulator of a binary digital signal with soft iterative data decoding in 2015.

A positive effect of the use of the invention is that the performance of an incoherent demodulator of a binary digital signal is increased with the maximum reliability of decoding a binary digital signal to a value close to the maximum possible Claude Shannon boundary (limit).

Claims (1)

  1. An incoherent demodulator of a binary digital signal with soft iterative data decoding, comprising a phase detector with an output low-pass filter and a logarithmic likelihood ratio calculator, characterized in that it contains a series-connected OR element for two inputs, a frequency meter and a decision unit for two inputs, a sampling device and a series connected clock generator, reversible counter, digital-to-analog converter and comparison unit for two inputs and two outputs, the second input to one connected to the output of the sampler, one input of which is connected to the output of the clock generator and the second input of the deciding unit, the other input of the sampler is connected to the output of the low-pass filter, one output of the comparison unit is connected to the direct counting input of the reverse counter, and the other output of the comparison unit is connected with an inverse counting input of the reversible counter, the outputs of the reversing counter are connected to the information inputs of the logarithmic likelihood ratio calculator, the control input of which oh connected to the output of the decisive unit, the outputs of the comparison unit are connected to the inputs of the OR element.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5260975A (en) * 1989-10-23 1993-11-09 Nippon Telegraph And Telephone Corporation Digital demodulator
RU2304352C2 (en) * 2001-11-29 2007-08-10 Квэлкомм Инкорпорейтед Mode and an arrangement for definition of logarithmical likelihood ratio with preliminary coding
RU2308165C1 (en) * 2005-12-27 2007-10-10 Общество с ограниченной ответственностью "Научно-производственное предприятие "Цифровые решения" Device for non-coherent demodulation of frequency-manipulated signals with continuous phase

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5260975A (en) * 1989-10-23 1993-11-09 Nippon Telegraph And Telephone Corporation Digital demodulator
RU2304352C2 (en) * 2001-11-29 2007-08-10 Квэлкомм Инкорпорейтед Mode and an arrangement for definition of logarithmical likelihood ratio with preliminary coding
RU2308165C1 (en) * 2005-12-27 2007-10-10 Общество с ограниченной ответственностью "Научно-производственное предприятие "Цифровые решения" Device for non-coherent demodulation of frequency-manipulated signals with continuous phase

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