RU2316076C1 - Semiconductor heterostructure of field-effect transistor - Google Patents

Semiconductor heterostructure of field-effect transistor Download PDF

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Publication number
RU2316076C1
RU2316076C1 RU2006140699/28A RU2006140699A RU2316076C1 RU 2316076 C1 RU2316076 C1 RU 2316076C1 RU 2006140699/28 A RU2006140699/28 A RU 2006140699/28A RU 2006140699 A RU2006140699 A RU 2006140699A RU 2316076 C1 RU2316076 C1 RU 2316076C1
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layer
field
ga
channel
buffer layer
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RU2006140699/28A
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Russian (ru)
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Алексей Николаевич Алексеев
Юрий Васильевич Погорельский
Игорь Альбертович Соколов
Дмитрий Михайлович Красовицкий
Виктор Петрович ЧАЛЫЙ
Алексей Петрович Шкурко
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Закрытое Акционерное Общество "Светлана-Рост"
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds

Abstract

FIELD: heterostructures of semiconductor devices, primarily those of field-effect transistors.
SUBSTANCE: proposed semiconductor heterostructure of field-effect transistor has AlN single-crystalline substrate, GaN template layer, GaN channel layer, and AlxGa1-xN layer; disposed one on top of other between template and channel layers are intermediate AlyGa1-yN layer and AlzGa1-zN buffer layer, respectively; value of y at template layer boundary is 1 and at buffer layer boundary it equals buffer layer z value; in this case 0.3 ≤ x ≤0.5 and 0.1 ≤ z ≤0.5. Buffer layer in semiconductor heterostructure at channel layer boundary can be doped with Si through depth of 50 to 150 Å.
EFFECT: enhanced conductivity of heterostructure channel layer and, hence, enhanced working currents and power of field-effect transistors.
2 cl, 1 dwg

Description

The invention relates to heterostructures of semiconductor devices, mainly field-effect transistors.

The creation of optoelectronic and microelectronic devices based on semiconductor compounds of group A 3 with nitrogen (nitrides A 3 ) is very important in view of the significant expansion of the functionality of these devices. In particular, it became possible to manufacture microwave field-effect transistors, the power of which is several times greater than the power of such transistors made on the basis of traditional materials (arsenide A 3 ). At the same time, nitride-based transistors have unique thermal stability and can operate continuously at a temperature of 300-500 ° C, which was completely unavailable on traditional devices.

However, a significant difficulty in the industrial implementation of such a technical solution is the tendency of nitride transistors to degradation, i.e. to a quick change (deterioration) of the characteristics of the device over time. This degradation is observed during operation of the device and, moreover, a deterioration in the characteristics of transistor semiconductor structures in the absence of an electric current is recorded. It has been shown that the mobility and concentration of electrons in a nitride heterostructure randomly change over time, and over several months these changes reach tens of percent (S. Elhamri et al. Study of deleterious aging effects in GaN / AlGaN heterostructures. Journal of Applied Physics, vol. 93 2, pp. 1079-1082, January 15, 2003).

In conditions appropriate to the workers, i.e. with the current flowing under the action of the applied voltage, nitride transistors change their characteristics in a few hours, which is unacceptable for real use.

Semiconductor heterostructures on a sapphire substrate are known, in particular see J.P. Ibbetson. "Polarization effects, surface states and the source of electrous in AlGaN / GaN heterostructure filed-effekt transistors" Applied Physics Letters, vol. 77, No.2, p. 250, 2000, USA.

An A1N nucleation layer is placed on the sapphire substrate, then a GaN buffer layer and an AlGaN barrier layer.

This heterostructure requires compensating doping of the buffer layer with magnesium (or carbon, iron, etc.) to reduce current leakage. In addition, in the indicated heterostructure, cracking of the barrier layer occurs even at relatively low tensile stresses, since the crystal lattice constant of sapphire differs significantly (by 17%) from the crystal lattice constant of GaN. The presence of a very thin AlN nucleation layer between the substrate and the GaN layer practically does not affect the aforementioned mismatch.

In addition, poor heatsink is inherent in all heterostructures on a sapphire substrate, which limits the possibility of realizing high power modes of operation of devices due to significant thermal degradation of the heterostructure.

Other heterostructures on a sapphire substrate are known, in particular the heterostructure of a field effect transistor, RU 2222845 C1; the heterostructure sequentially includes a substrate, an insulating layer made of Al y Ga 1-y N, a channel layer and a barrier layer made of Al z Ga 1-z N, the channel layer is made of Al x Ga 1-x N, where 0.12 >x> 0.03, while on the border of the channel and insulating layers 1≥y≥x + 0.1, on the border of the channel and barrier layers 1≥z≥x + 0.1, and the thickness of the channel layer is in the range from 3 up to 20 nm, with x, y, z being the molar fractions of Al in the composition of the AlGaN compound.

This heterostructure is characterized by the disadvantages of semiconductor heterostructures associated with a sapphire substrate, although it provides a better electronic limitation in comparison with the analog described above.

Recently, a new class of semiconductor heterostructures has appeared, including a single-crystal AlN substrate. The mismatch between the constants of the crystal lattices of AlN and GaN is about 3%, which makes it possible to eliminate a number of drawbacks of the analogs described above, reduce the density of intrinsic defects, and practically eliminate the cracking of the barrier layer.

In particular, a semiconductor heterostructure of a field-effect transistor is known, including a single crystal AlN substrate, an AlN epitaxial template layer, a GaN channel layer and an Al x Ga 1-x N barrier layer, see X. Hu atal, transistors Applied Physics Letters, "AlGaN / GaN heterostructure filed-effekt on single-crystal bulk AlN "vol. 82, N8, 2003, PP1299-1301, American Insitute of Physics, USA. This technical solution is made as a prototype of the present invention.

The disadvantage of the prototype is the following circumstance. When the GaN channel layer is grown directly on the AlN template layer in the first stage of this process, at a small channel layer thickness, significant compressive stresses of the channel layer arise. With continued growth of the channel layer at a certain critical thickness, the channel layer relaxes with the formation of a large number of defects, which is unacceptable. Limiting the thickness of the GaN layer significantly limits the conductivity of the channel layer and, accordingly, limits the operating currents and power of the device.

The objective of the present invention is to increase the conductivity of the channel layer of a semiconductor heterostructure and, therefore, increase the operating currents and power of field-effect transistors.

According to the invention, this problem is solved due to the fact that in a semiconductor heterostructure of a field-effect transistor including a single crystal AlN substrate, an AlN template layer, a GaN channel layer and an Al x Ga 1-x N barrier layer, are located one above the other between the template and channel layers, accordingly, the transition layer is Al y Ga 1-y N, the buffer layer is Al z Ca 1-z N, the value of y at the boundary with the template layer is 1, and at the boundary with the buffer layer it is equal to the z value of the buffer layer, with 0.3≤ x≤0.5, and 0.1≤z≤0.5; in a semiconductor heterostructure, the buffer layer at the interface with the channel layer can be doped with Si to a depth of 50-150 Å.

The applicant has not identified any technical solutions identical to the claimed, which allows us to conclude that the invention meets the criterion of "novelty."

Thanks to the implementation of the distinguishing features of the invention, it is possible to grow the channel layer of a given thickness in accordance with the required operating currents and the installed capacity of the device; this is due to the fact that the high conductivity of the channel GaN layer is ensured due to the prevention of the formation of electron-mobility-reducing defects with an increase in its thickness above the critical value. In addition, the presence of doped Si in the upper sublayer of the buffer layer provides an additional increase in the conductivity of the channel layer by increasing the concentration of electrons in it. These circumstances allow, according to the applicant, to conclude that the claimed technical solution meets the criterion of "inventive step".

The invention is illustrated in the drawing, which shows a diagram of a semiconductor heterostructure of a field effect transistor.

The single crystal substrate 1 is made of aluminum nitride and has a thickness of 500 μm, crystallographic orientation (0001). On the substrate 1 is a template layer 2 AlN thick, in a specific example, 2100 Å. Above is a transition layer of 3 Al y Ga 1-y N with a thickness of 1400 Å. The value of y varies in thickness of the transition layer from 1 at the boundary with the template layer to the z value of the buffer layer 4. The z value is constant over the entire buffer layer and is 0.1≤z≤0.5. The thickness of the buffer layer 4 in this example is 4200 Å, the value of z is 0.3. The channel layer of GaN has a thickness of 1400 Å. The buffer layer 4 at the interface with the channel layer is doped with Si to a depth of 100 Å with a concentration of 1 × 10 19 cm -3 . The barrier layer 6 has a thickness of 250 Å, the value of x is constant throughout the barrier layer and is 0.3 х x 0 0.5. In a specific example, x = 0.4. All semiconductor layers are grown by molecular beam epitaxy (MBE).

Two versions of the heterostructure were fabricated and tested. The first embodiment corresponds to claim 1, in the second embodiment, the buffer layer at the interface with the channel layer is Si doped. The characteristics of both variants of the heterostructures are given in the table.

Tests showed a significant improvement in the parameters of heterostructures in comparison with the prototype. The resulting heterostructures are the basis of high power field effect transistors.

The invention can be implemented both in the factory and in the laboratory using MPE plants. This confirms its compliance with the criterion of "industrial applicability".

Heterosexual har DEG electron concentration, cm -2 Electron mobility of DEG, cm 2 / V · s Channel Conductivity, Ohm -1 The saturation current density of the transistor, A / mm Heteros option 1. The heterostructure according to claim 1 of the invention 1.610 13 1200 0,003072 0.8 ÷ 1.0 2. The heterostructure according to claim 2 of the invention 2.510 13 850 0.0034 0.9 ÷ 1.2 3. Prototype 1,0 · 10 13 1100 0,00176 0.4

Claims (2)

1. The semiconductor heterostructure of the field-effect transistor, including a single-crystal substrate of AlN, a template layer AlN, a channel layer GaN and a barrier layer Al x Ga 1-x N, characterized in that between the template and channel layers are located one above the other, respectively, the transition layer Al y Ga 1-y N, Al z Ga 1-z N buffer layer, the value of y at the border with the template layer is 1, and at the border with the buffer layer it is equal to the z value of the buffer layer, with 0.3≤x≤0.5, a 0.1≤z≤0.5.
2. The semiconductor heterostructure according to claim 1, characterized in that the buffer layer at the interface with the channel layer is doped with Si to a depth of 50-150Å.
RU2006140699/28A 2006-11-14 2006-11-14 Semiconductor heterostructure of field-effect transistor RU2316076C1 (en)

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RU2006140699/28A RU2316076C1 (en) 2006-11-14 2006-11-14 Semiconductor heterostructure of field-effect transistor
PCT/RU2007/000395 WO2008060184A1 (en) 2006-11-14 2007-07-12 Semiconductor heterostructure for a field-effect transistor
DE200711002782 DE112007002782T5 (en) 2006-11-14 2007-07-12 Semiconductor heterostructure for a field effect transistor

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2517788C1 (en) * 2012-12-25 2014-05-27 Федеральное Государственное Унитарное Предприятие "Научно-Производственное Предприятие "Пульсар" Bipolar shf transistor
RU2534002C1 (en) * 2013-06-18 2014-11-27 федеральное государственное автономное образовательное учреждение высшего профессионального образования "Национальный исследовательский ядерный университет МИФИ" (НИЯУ МИФИ) High-voltage gallium nitride high-electron mobility transistor

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US7030428B2 (en) * 2001-12-03 2006-04-18 Cree, Inc. Strain balanced nitride heterojunction transistors
RU2222845C1 (en) * 2003-04-01 2004-01-27 Закрытое акционерное общество "Научное и технологическое оборудование" Field-effect transistor
US20050133816A1 (en) * 2003-12-19 2005-06-23 Zhaoyang Fan III-nitride quantum-well field effect transistors
KR100616619B1 (en) * 2004-09-08 2006-08-28 삼성전기주식회사 Nitride based hetero-junction feild effect transistor

Non-Patent Citations (1)

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Title
Hu Х at al. AlGaN/GaN heterostructure fild-effect transistors on single-crystal bulk AlN. vol.82, №8, 2003, p.p.1299-1301. *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2517788C1 (en) * 2012-12-25 2014-05-27 Федеральное Государственное Унитарное Предприятие "Научно-Производственное Предприятие "Пульсар" Bipolar shf transistor
RU2534002C1 (en) * 2013-06-18 2014-11-27 федеральное государственное автономное образовательное учреждение высшего профессионального образования "Национальный исследовательский ядерный университет МИФИ" (НИЯУ МИФИ) High-voltage gallium nitride high-electron mobility transistor

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