RU2098922C1 - Broad-band signal switching device - Google Patents

Broad-band signal switching device Download PDF

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Publication number
RU2098922C1
RU2098922C1 SU864028330A SU4028330A RU2098922C1 RU 2098922 C1 RU2098922 C1 RU 2098922C1 SU 864028330 A SU864028330 A SU 864028330A SU 4028330 A SU4028330 A SU 4028330A RU 2098922 C1 RU2098922 C1 RU 2098922C1
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RU
Russia
Prior art keywords
switching
cmos transistors
inverter circuit
circuit
output
Prior art date
Application number
SU864028330A
Other languages
Russian (ru)
Inventor
Хофманн Рюдигер
Original Assignee
Сименс АГ
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Сименс АГ filed Critical Сименс АГ
Application granted granted Critical
Publication of RU2098922C1 publication Critical patent/RU2098922C1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/52—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
    • H04Q3/521—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements using semiconductors in the switching stages

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Electronic Switches (AREA)
  • Stereo-Broadcasting Methods (AREA)
  • Optical Communication System (AREA)
  • Transmitters (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
  • Read Only Memory (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

FIELD: communications engineering; data transmission. SUBSTANCE: newly introduced in switching member 5 is inverter circuit built around CMOS transistors 8 and 9. EFFECT: reduced crosstalk due to preventing effect of output lines onto input ones. 1 dwg

Description

Изобретение относится к технике связи, в частности к системам коммутации при передаче информации. The invention relates to communication technology, in particular to switching systems for the transmission of information.

Цель изобретения повышение помехозащищенности. The purpose of the invention is the improvement of noise immunity.

На чертеже представлена структурная электрическая схема устройства. The drawing shows a structural electrical diagram of the device.

Устройство коммутации широкополосных сигналов содержит коммутационную матрицу 1, коммутационные блоки 2, ячейки 3 памяти, декодер 4, элемент коммутации 5, первый, второй, третий и четвертый КМОП-транзисторы 6, 7, 8 и 9 соответственно. The broadband signal switching device comprises a switching matrix 1, switching blocks 2, memory cells 3, a decoder 4, a switching element 5, the first, second, third and fourth CMOS transistors 6, 7, 8 and 9, respectively.

Устройство коммутации широкополосных сигналов работает следующим образом. The device switching broadband signals works as follows.

Функционирование устройства происходит при поступлении сигналов от декодера 4 сигналов на ячейку 3 памяти соответствующего коммутационного блока 2. Если от ячейки 3 поступает сигнал с прямого его выхода, элемент коммутации 5 оказывается в состоянии проключения и с входных линий на выходные поступает усиленный и инвертированный цифровой сигнал. Инверторная схема на третьем и четвертом 8 и 9 КМОП-транзисторах предотвращает влияние выходных линий на входные. Если на инверсном выходе ячейки 3 появляется сигнал, то элемент коммутации 5 оказывается в состоянии запирания и на выходные линии не поступает сигнал. The functioning of the device occurs when signals from the decoder 4 of the signals arrive at the memory cell 3 of the corresponding switching unit 2. If a signal is received from cell 3 from its direct output, the switching element 5 is turned off and an amplified and inverted digital signal is supplied from the input lines to the output. The inverter circuit on the third and fourth 8 and 9 CMOS transistors prevents the influence of the output lines on the input. If a signal appears at the inverted output of cell 3, then switching element 5 is in the locked state and no signal is output.

Инверторная схема в данном случае подавляет перекрестные помехи. The inverter circuit in this case suppresses crosstalk.

Claims (1)

Устройство коммутации широкополосных сигналов, содержащее коммутационную матрицу, точки пересечения входных линий и выходных линий которой образованы блоками коммутации, содержащими ячейку памяти, входы которой соединены с соответствующими декодерами, и элемент коммутации, который содержит образованную встречно-параллельно соединенными КМОП-транзисторами схему коммутации, которая соединена с соответствующей выходной линией коммутационной матрицы, причем управляющие входы КМОП-транзисторов схемы коммутации соединены соответственно с неинвертирующим и инвертирующим выходами ячейки памяти, отличающееся тем, что в каждый элемент коммутации между схемой коммутации на КМОП-транзисторах и соответствующей входной линией коммутационной матрицы введена инверторная схема на КМОП-транзисторах, причем управляющие электроды КМОП-транзисторов инверторной схемы соединены с соответствующей входной линией коммутационной матрицы, причем электроды стока КМОП-транзисторов инверторной схемы образуют связанный со схемой коммутации выход инверторной схемы на КМОП-транзисторах, причем электроды истока подключены к источнику рабочего напряжения. A device for switching broadband signals containing a switching matrix, the intersection points of the input lines and output lines of which are formed by switching units containing a memory cell whose inputs are connected to the corresponding decoders, and a switching element that contains a switching circuit formed by counter-parallel connected CMOS transistors, which connected to the corresponding output line of the switching matrix, and the control inputs of the CMOS transistors of the switching circuit are connected respectively but with non-inverting and inverting outputs of the memory cell, characterized in that in each switching element between the switching circuit on the CMOS transistors and the corresponding input line of the switching matrix, an inverter circuit on the CMOS transistors is introduced, and the control electrodes of the CMOS transistors of the inverter circuit are connected to the corresponding input line of the switching matrix, and the drain electrodes of the CMOS transistors of the inverter circuit form the output of the inverter circuit connected to the switching circuit to the CMOS transistor oh, and the source electrodes are connected to a source of operating voltage.
SU864028330A 1985-10-22 1986-10-20 Broad-band signal switching device RU2098922C1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DEP3537562.0 1985-10-22
DE3537562 1985-10-22

Publications (1)

Publication Number Publication Date
RU2098922C1 true RU2098922C1 (en) 1997-12-10

Family

ID=6284178

Family Applications (1)

Application Number Title Priority Date Filing Date
SU864028330A RU2098922C1 (en) 1985-10-22 1986-10-20 Broad-band signal switching device

Country Status (10)

Country Link
US (1) US5047766A (en)
EP (1) EP0219848B1 (en)
JP (1) JPH0789674B2 (en)
AT (1) ATE60184T1 (en)
AU (1) AU585078B2 (en)
DE (1) DE3676939D1 (en)
FI (1) FI84770C (en)
HU (1) HU193868B (en)
NO (1) NO169749C (en)
RU (1) RU2098922C1 (en)

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LU86455A1 (en) * 1985-10-28 1986-11-13 Siemens Ag BROADBAND SIGNAL COUPLING DEVICE
LU86456A1 (en) * 1985-11-04 1986-11-13 Siemens Ag BROADBAND SIGNAL COUPLING DEVICE
IT1195119B (en) * 1986-08-04 1988-10-12 Cselt Centro Studi Lab Telecom REFERENCES TO THE LOGI BOARDS THAT PROGRAMMABLE DYNAMICS WITH NOR NOR STRUCTURE MADE IN TECHNOLOGY ALREADY MOS
ATE115817T1 (en) * 1990-04-12 1994-12-15 Siemens Ag BROADBAND SIGNAL COUPLER.
JP2824706B2 (en) * 1991-09-27 1998-11-18 三菱電機株式会社 Current source circuit and operation method thereof
GB9223226D0 (en) * 1992-11-05 1992-12-16 Algotronix Ltd Improved configurable cellular array (cal ii)
US6771162B1 (en) * 2000-10-12 2004-08-03 Fairchild Semiconductor Corporation Active cell crosspoint switch

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LU86455A1 (en) * 1985-10-28 1986-11-13 Siemens Ag BROADBAND SIGNAL COUPLING DEVICE
LU86456A1 (en) * 1985-11-04 1986-11-13 Siemens Ag BROADBAND SIGNAL COUPLING DEVICE
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Non-Patent Citations (1)

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ISS'84 Confereuse, Papers 23С1, фиг.9, 1984. *

Also Published As

Publication number Publication date
NO864202D0 (en) 1986-10-21
AU6423886A (en) 1987-04-30
FI84770C (en) 1992-01-10
FI864263A (en) 1987-04-23
NO864202L (en) 1987-04-23
HU193868B (en) 1987-12-28
JPH0789674B2 (en) 1995-09-27
EP0219848B1 (en) 1991-01-16
FI84770B (en) 1991-09-30
HUT41575A (en) 1987-04-28
EP0219848A3 (en) 1988-10-05
US5047766A (en) 1991-09-10
ATE60184T1 (en) 1991-02-15
DE3676939D1 (en) 1991-02-21
NO169749B (en) 1992-04-21
AU585078B2 (en) 1989-06-08
JPS62101197A (en) 1987-05-11
EP0219848A2 (en) 1987-04-29
FI864263A0 (en) 1986-10-21
NO169749C (en) 1992-07-29

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