RU2070769C1 - Data selection device - Google Patents

Abstract

FIELD: receiving part of digital data processing hardware; data coupling and input devices connected to personal computers. SUBSTANCE: device has two working channels. First channel functions in absence of noise or in presence of low noise in input data signal and has shift register, first and second AND gates. Second channel functions in presence of heavy noise in input data signal and has counter, NOT gate, first and second selecting units. Common for both channels are logical element, flip-flop, OR gate, and multivibrator. Codes are set at device input and controlled by means of personal computer through standard port. Clock signal is generated for device from internal clock signal of computer. EFFECT: improved design. 2 dwg

Description

 The invention relates to a pulse and computer technology and can be used in devices for the receiving part of information processing equipment or in communication and data input devices connected to a personal computer.

A device for generating pulses is known in the patent literature, comprising first, second, third and fourth triggers, a counter, a shift register, wherein the information input of the device is connected to the C inputs of the first trigger and counter, the output of which is connected to the C inputs of the first trigger and counter, whose output is connected to the C-input of the second trigger, the output of which is connected to the D-input of the third trigger, the C-input of which is connected to the first output of the shift register and connected to the R-input of the first trigger, the K-input and J-input of which are connected respectively, to the log.0 bus, and the log.1 bus, to which the D-input of the second trigger is connected, the R-input of which is connected to the direct output of the third trigger and is the first output of the device, the clock input of which is connected to the C-input of the shift register, the third the output of which is connected to the C-input of the fourth trigger, the output of which is connected to the R-input of the third trigger, the direct and inverse outputs of which are connected respectively to the J-input and K-input of the third trigger, the output of the first trigger is connected to the D-input of the shift register, the first second and third you ode which are the second, third and fourth output device [1]
A disadvantage of the known device is its low accuracy, which is due to the fact that the device uses the principle of operation, in which the input information signal is processed using clock signals according to a scheme with strict logic without any analysis of the contents of the input information signal. In this case, the resulting information signal on the output buses of the device does not reflect with full or sufficient accuracy the contents of the input information signal; the lack of analysis elements does not allow you to adjust the accuracy of the device.

The closest in technical essence to the claimed one is a data selection device containing a three-digit shift register, the clock and data inputs of which are the clock and information inputs of the device, the first and second elements AND, the first, second and third triggers, the first and second waiting multivibrators, the element OR, the S-input of the first trigger is connected to the output of the first AND element, the first, second and third inputs of which are connected to the first, second and third direct outputs of the shift register, the first, second and third inv whose outputs are connected to the first, second and third inputs of the second AND element, whose output is connected to the S-input of the second trigger, the output of which is connected to the input of the second multivibrator, the output of which is connected to the R-input of the first trigger, the output of which is connected to the input of the first multivibrator whose output is connected to the R-input of the second trigger and connected to the first input of the OR element and to the S-input of the third trigger, the R-input of which is connected to the output of the second multivibrator and connected to the second input of the OR element, the output is its trigger element and OR are output information and outputs the clock unit [2]
The disadvantage of the prototype is that the selection of data is made either in the absence or in the presence of weak interference in the input information signal. In the absence of interference, the contents of the output information signal is accompanied by clock pulses. If the input information signal is affected by noise, leading to weak fragmentation of the contents of this input information signal, the device eliminates the crushing portions and generates a stable information signal, accompanied by clock pulses. In the event of interference, which leads to a strong fragmentation of the input information signal, the device stops the formation of output signals, because And elements cannot identify stable sections in the input information signal. This leads either to the loss of a part of the received information, or to its distortion, and therefore, reduces the noise immunity and accuracy of the data selection device.

 The technical result, which the invention is directed to, is to increase the noise immunity and accuracy of the data selection device.

 The set of essential features sufficient to achieve a technical result is determined by the fact that the data selection device containing the shift register, the first and second AND elements, the RS-trigger, the OR element, the multivibrator, and the clock and data of the shift register are clock and information inputs devices, the first, second and third inputs of the first AND element are connected to the first, second and third direct outputs of the shift register, the first, second and third inverse outputs of which are connected to the first, second and three the fourth inputs of the second AND element, the NOT element, a logic element, the first and second selection blocks, a counter, the counting input of which is connected to the clock input of the device and connected to the clock inputs of the first and second selection blocks, the code inputs of which are connected to the first input of the device codes, are introduced, the information input of which is connected to the “resolution” input of the first selection block and to the input of the element NOT, the output of which is connected to the “resolution” input of the second selection block, the “reset” input of which is connected to the multivibrator output and soy is dined with the reset input of the first selection block and with the R-input of the counter, the resolution input of which is connected to the first output of the logic element, the first and second inputs of which are connected respectively to the outputs of the first and second selection blocks, whose selection inputs are connected to the output of the counter, the information input of which is connected to the second input of the device codes, the outputs of the first and second elements AND are connected respectively to the third and fourth inputs of the logic element, the second output of which is connected to the first input of the element and OR is connected to the S-input of the RS-trigger, the R-input of which is connected to the third output of the logic element and connected to the second input of the OR element, the output of which is connected to the input of the multivibrator, the output of the RS-trigger and the output of the OR element are information and clock outputs devices.

 The essential features that distinguish the proposed data selection device from the prototype are the introduction of the NOT element, the logical element, the first and second selection blocks, and the counter.

 The introduction of these features allows us to ensure the operability of the device at various levels of interference, at the same time, the degree of selection of codes allows us to provide the necessary accuracy of the device, the impact of interference can lead to distortion of the contents of the output information signal, and in the worst case, to its partial loss.

 The technical and economic advantages of this invention compared with the prototype are that in the presence of a different level of interference in the input information signal using the proposed device, it is possible to carry out a stable selection of data. At the same time, changing the codes necessary for the selection of the input information signal using a personal computer does not lead to interruptions in the operation of the device, and so on. it provides not only the continuity of its operation and control flexibility, but also changes the depth of noise immunity and accuracy.

 A block diagram of a data picker is shown in FIG. 1, a block diagram of a logic element is shown in FIG. 2, a block diagram of a selection block is shown in FIG. 3. In FIG. 4 are timing diagrams explaining the principle of operation of the device.

 The data selection device (Fig. 1) contains a shift register 1, first and second elements AND 2 and 3, trigger 4, element OR 5, multivibrator 6, element NOT 7, logic element 8, first and second selection blocks 9 and 10, counter 11, and the inputs of the clock and data of the shift register 1 are the clock and information inputs 12 and 13 of the device, the inputs of the first element And 2 are connected to the direct outputs of the shift register 1, the inverse outputs of which are connected to the inputs of the second element And 3, the output of which is connected to the fourth input gate 8, the first output is cat It is connected to the “resolution” input of the counter 11, the counting input of which is connected to the clock input of the device and connected to the clock inputs of the first and second selection blocks 9 and 10, the code inputs of which are connected to the first input 14 of the device, the information input of which is connected to the “resolution” input "of the first block of selection 9 and with the input of the element NOT 7, the output of which is connected to the input" resolution "of the second block of selection 10, the input" reset "of which is connected to the output of the multivibrator 6 and is connected to the R-input of the counter 11 and to the input" reset "of the first block se lecture 9, the input "choice" of which is connected to the input "choice" of the second block of selection 10 and is connected to the output of the counter 11, the information input of which is connected to the second input 15 of the device codes, the output of the first element And 2 is connected to the third input of the logical element 8, the second the output of which is connected to the first input of the OR element 5 and connected to the S-input of the trigger, the R-input of which is connected to the second input of the OR element 5 and connected to the third output of the logic element 8, the first and second inputs of which are connected respectively to the outputs of the first and of the selection blocks 9 and 10, the output of the OR element 5 is connected to the input of the multivibrator 6, the output of the trigger 4 and the output of the multivibrator 6 are information and clock outputs 16 and 17 of the device.

 Logic element 8 (Fig. 2) consists of the first, second, and third OR elements 18, 19, and 20, with the first input of the first element OR 18 connected to the third input of the logical element And 8 and connected to the first input of the second element OR 19, the second input which is connected to the first input of the logic element 8, the second input of which is connected to the second input of the third element OR 20, the first input of which is connected to the second input of the first element OR 18 and connected to the fourth input of the logic element 8, the first, second and third outputs of which are connected us respectively to the outputs of the first, second and third elements of the OR 18, 19 and 20.

 The selection block (Fig. 3) contains the comparison circuit 21 and the counter 22, the inputs are “resolution”, the counting and R-input of which are connected respectively to the inputs “resolution”, the clock and “reset” of the selection block, the output is “selection” and the code input of which respectively connected to the input "equals" and the second information input of the comparison circuit 21, the first information input of which is connected to the output of the counter 22, the output "equal" of the comparison circuit 21 is the output of the selection block.

 The data selection device consists of two working paths. The first path works in the absence or presence of weak noise in the input information signal and contains the following elements: shift register, the first and second elements I. The second path works in the presence of intense noise in the input information signal and contains the following elements: counter, element NOT, first and second selection blocks. Common to the paths are a logic element, a trigger, an OR element, and a multivibrator.

 The data selection device operates as follows.

 At the first and second inputs 14 and 15 of the device codes (Fig. 1), binary values of the codes are set. The information input signal 13 of the device receives an input information signal either without interference or with low noise (Fig. 4a), which is accompanied by clock signals (Fig. 4c) at the input of the device 12. These signals are transmitted to the inputs of the shift register 1, the first and second selection blocks 9 and 10. The clock signals of the device also go to the counting input of the counter 11. The first and second elements And 2 and 3 generate a signal log. 1, if the log signals come to their inputs . 1, respectively, from the direct or inverse outputs of shift register 1. The first element And 2 generates a signal log.1, if a log signal is supported at the information input 13 of the device. 1. The second element And 3 generates a signal log.1, if the signal log.0 is supported at the information input 13 of the device. Signals log. 1 either from the output of the first element And 2, or from the output of the second element And 3 come respectively to the third or fourth inputs of the logic element 8. At the first and second inputs of the logic element 8 are set log signals. 1 from the outputs of the first and second selection blocks 9 and 10. If the signal log.1 is fed to the third input of the logic element 8 (Fig. 2), a signal log.1 is generated at its second output, which comes to the S-input of trigger 4, setting at its output and information output 16 of the device there is also a signal log.1, and at the first input of OR element 5. At the first output of logic element 8, a signal is set to log.1, which is transmitted to the "resolution" input of counter 11, prohibiting the formation of a signal at its output . If the signal log.1 arrives at the fourth input of the logic element 8 (Fig. 2), a log signal is generated at its third output. 1, which comes to the R-input of the trigger, setting the signal log.0 at its output, and to the second input of the OR element 5. At the output of the OR element 5, a signal is generated log.1, which is equal in duration to the signal at the input and arriving at the input of the waiting multivibrator 6. At the output of the multivibrator 6, a short signal log.1 is generated, which is transmitted to the output 17 of the device, which resets the contents of the first and second selection blocks 9 and 10.

 In the case when the information signal 13 of the device (Fig. 1) receives an input information signal with intense interference (Fig. 4b), accompanied by clock signals at the input 12 of the device (Fig. 4c), these signals are transmitted to the inputs of shift register 1, the first and the second selection blocks 9 and 10. Element NOT 7 inverts the input information signal. The first and second elements And 2 and 3 can not be found in the information shifted in the shift register 1, sections of the log.1 and log.0 for the formation of signals log.1 at their outputs. Logic element 8 (Fig. 2) generates a log.0 signal at the first output, allowing the formation of a signal at the output of counter 11. Counter 11 counts the number of clock signals arriving at its counter input and, in accordance with the binary code installed at input 15 of the device, generates output log signal. 1, which goes to the "selection" inputs of the first and second selection blocks 9 and 10. The first selection block 9 (Fig. 3) counts the number of states of log.1 in the input information signal. The second block of selection 10 (Fig. 3) counts the number of states of log.0 in the input information signal. The first and second selection blocks 9 and 10, in accordance with the binary codes installed at the input 14 of the device, generate at the outputs signals that are received respectively at either the first or second input of logic element 8 (Fig. 2). Logic element 8 generates log.1 signals at the second or third output, by which a signal of either log.1 or log.0 is set at the output of trigger 4. These signals are transmitted to the information output 16 of the device. Signals log. 1 from the second and third outputs of the logic element 8 are received respectively at the first and second inputs of the element OR 5 (Fig. 1). At the output of the OR element 5, a signal is generated log.1, which is transmitted to the input of the waiting multivibrator 6. Multivibrator 6 generates a short signal log.1, which resets the contents of the counter 11, the first and second selection blocks 9 and 10 and is transmitted to the clock output 17 of the device. The duration of this short signal should be less than the duration of the clock signal of the device, which eliminates information loss. After resetting the contents of the counter 11, the first and second selection blocks 9 and 10, the device starts a new cycle of work.

 The data selection device is part of the receiving part of a multi-channel hardware complex that works in conjunction with a personal computer EC1841 and has a simple technical implementation based on serial integrated circuits (IC) 1533 series: shift register 1 to IC 1533TM8, the first and second elements And 2 and 3 to IMS 1533LIZ, trigger 4 is implemented on IMS 1533LE1, OR element 5 on IMS 1533LL1, multivibrator 6 on IMS 1533AGZ, element NOT 7 on IMS 1533LE1, logic element 8 on IMS 1533LL1, the first and second selection blocks 9 and 10 are implemented on IMS 1533IE7 and 1533SP1, counter 11 on the MI 1533IE8. The device receives data from a digital communication line with a length of 0.8 km through the interface IC 170 series.

 Setting codes on the corresponding inputs of the device is carried out through a standard computer port (in free address space), and codes can be set both before the start of the next cycle of the complex and during the cycle. However, for more flexible control, you must use your local processor, which must constantly poll the buffer registers of the complex and change the codes in the corresponding channel to change the information in them. This will allow to unload the main processor in the computer and increase the performance of the complex. In the simplest case, codes can be set using jumpers or switches on printed circuit boards.

Claims (1)

 A data selection device containing a shift register, the first and second AND elements, a trigger, an OR element, a multivibrator, the clock input and the shift register data input being the clock and information inputs of the device, the inputs of the first AND element are connected to the direct inputs of the shift register, whose inverse outputs are connected to the inputs of the second element AND, characterized in that the element is NOT, a logical element, the first and second blocks of selection, a counter, the counting input of which is connected to the clock input of the device and connected to the clock the input inputs of the first and second selection blocks, the code inputs of which are connected to the first input of the device codes, the information input of which is connected to the "Resolution" input of the first selection block and through the element is NOT connected to the "Resolution" input of the second selection block, whose "Reset" input is connected to the output of the multivibrator and is connected to the “Reset” input of the first selection block and to the R-input of the counter, the “Resolution” input of which is connected to the first output of the logic element, the first and second inputs of which are connected respectively to the outputs of the first and second selection blocks, the “Selection” inputs of which are connected to the output of the counter, the information input of which is connected to the second input of the device codes, the outputs of the first and second elements And are connected respectively to the third and fourth inputs of the logic element, the second output of which is connected to the first input of the element OR and connected to the S-input of the trigger, the K-input of which is connected to the third output of the logic element and connected to the second input of the OR element, the output of which is connected to the input of the multivibrator, and the outputs of the trigger and multivibrators are information and clock outputs of the device, respectively.

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