RU2065174C1 - Code signal demodulator of telemetering object-identifying system - Google Patents

Abstract

FIELD: parametric object-identifying systems. SUBSTANCE: demodulator has N comparators 1, N channels 2 each incorporating device 3 for converting code pulse train into multibit binary code, pulse phase determining and period assignment detecting device 4, data storage and confidence improvement device 5, and data bit value determining device 6; it also has N input-signal amplitude meters 7, adder 8, and clock generator 9. EFFECT: enlarged functional capabilities. 1 dwg

Description

 The invention relates to demodulating devices used in telemetric systems for identifying objects, and more particularly in reading devices of such systems.

 Known demodulator telemetry system for identifying objects according to US patent N 4075632, class. G 01 S 9/56 from 1978

 The identification system transponder provides a sequence of signal periods to indicate logical zeros and ones. For the identified object, the sequence "0" and "1" is specific. The signals from the transponder are transmitted through the air to the receiving reader, converted, amplified and fed to the demodulator.

 A demodulator of multiple signal periods converts the corresponding “1” and “0” into signal combinations. These combinations are compared by reference sequences of signals corresponding to "1" and "0" and their specific sequence for the identified object. In this demodulator, there are difficulties in determining the completion of the combination “1” and the completion of a sequence of signals identifying an object.

 Known demodulator adopted for the prototype in the system for the identification of specific objects (see US patent N 4739328, G 01 S 13/74, 1988). This device is designed to demodulate signals at the frequencies of the first and second harmonics. The periods of the signal components denoting the logical unit / "1" / are symmetrical to the periods of the signal components denoting the logical zero / "0" /. For a unit, pulses with a repetition rate corresponding to the second harmonic go before pulses with a repetition rate corresponding to the first harmonic, and for "0" a pulse with a repetition rate corresponding to the first harmonic goes before pulses with a repetition frequency corresponding to the second harmonic, a code is generated, indicating the end of the transmission of the message and the beginning of the repetition of the transmission. This demodulator contains three channels, each of which has two shift registers connected in series, three exclusive OR circuits, three AND circuits, and one OR circuit. In addition, the demodulator contains a phase-locked loop, a digital low-pass filter and a circuit for decoding the end of a sequence of pulses specific to the identified object.

The prototype has the following functions:
delays consecutive sets of received signal cycles for the first delay time;
compares the received cycles of the signals delayed for the first time delay, in order to demodulate the information characterized by cycles in successive sets;
delays successive sets, received loops for a second delay time other than the first;
compares the received signal cycles delayed by the second delay time, with the aim of forming phase-synchronized cycles. Generates clock signals that provide demodulation of information, characterized by cycles in sequential sets. Delays the consecutive sets of received cycles for a third of the delay time, different from the first and second.

 It compares the received cycles and cycles delayed by the third delay time in order to form control cycles. The control signals generate additional phase-synchronized signals synchronous with the phase-synchronized signals delayed by the second delay time to ensure the generation of clock signals.

 Identification systems must have high reliability of correct readings, namely, only one failure per 106 readings is allowed. In the prototype, when the information is distorted by noise, comparable in time with a duration equal to half the length of time required to transmit a bit of information, the restoration of the correct information is impossible.

 The technical result of the invention is to increase the reliability of the correct reading of information even if it is lost for a time equal to half the time required to transmit a bit of information.

 The demodulator of the telemetric system for identifying objects contains N comparators, N identical channels, N meters of amplitudes of the input signals. Each channel contains a series-connected device for converting a sequence of code pulses arriving at its input into a multi-bit binary code, a device for determining the phase of pulses, measuring the duration of their repetition periods and the reliability of these durations in half the length of time necessary to transmit one bit of information, the device to accumulate information about the duration of the periods of the pulse packets and increase the reliability of measuring the duration of the pulse packets, so and in half the length of time necessary to transmit one bit of information, and a device for measuring the duration of pulse periods and the reliability of such measurements during the transmission of one bit of information, the output of this device being the output of the channel.

 All channel devices have clock inputs that are connected to the output of a clock generator.

 The input of each comparator is connected to the input of its amplitude meter, the output of each comparator is connected to the input of its channel. The outputs of the channels are connected to the inputs of the adder.

 In addition, the control inputs of the adder are connected to the outputs of the amplitude meters for each channel. Common features of the invention and prototype are: N comparators, N channels and a clock generator.

 The technical result is achieved due to the fact that the lost information is restored in the channels, by comparing with the patterns of possible combinations of short and long periods of pulses during the time required to transmit half and a whole bit of information, and using the amplifiers and the adder, collisions are solved when different information does not match the channels, in favor of the channel with the largest input amplitude at the moment.

 The drawing shows a structural electrical diagram of the proposed demodulator.

 The demodulator contains N comparators 1, N identical channels 2, each of which includes a device 3 for converting a sequence of code pulses into a multi-bit binary code, a device 4 for determining the phase of the pulses and their belonging to one of two periods, a device 5 for accumulating and increasing the reliability of information and a device 6 for determining the value of one bit of information, N meters of amplitudes of the input signals 7, an adder 8 and a clock generator 9.

 The functions performed by the device 3 can be implemented on two chips 533IR28.

 The device has 11 binary digits. The frequency of the first harmonic of the pulse bursts is 20 kHz, the second 40 kHz. The clock frequency is 200 kHz. Duration of impulse sendings designating logical zero and one are equal among themselves. “1” is represented by two periods of the second harmonic and one period of the first, and “0” by one period of the first harmonic and two by the second. The end of message marker in duration is equal to two bits of information and can be represented as six periods of the second harmonic and one period of the first.

 The functions performed by the device 4 can be implemented on a single chip 573RF2. In the read-only memory (ROM) of this protection circuit, the pulse patterns are in half durations of "1" and "0" and a marker.

 The functions performed by the device 5 can be implemented on two chips 573RF2 and 533IR23.

 The functions performed by the device 6 can be implemented on chips 573RF2 and 533IR23. In the ROM of this protection device, the pulse patterns are “1” and “0” and a marker.

 The functions of the adder 8 can be implemented on dual-circuit 573RF2 and a single circuit 533TM8. The 7 amplitude meter is a detector. The adder 8 brings information about one bit of data from three channels to one output of the adder and accumulates this information and determines its reliability.

 The demodulator works as follows. A generator (not shown) generates electromagnetic waves that are emitted. By this signal, the ROM and the modulator are switched on, which modulate the antenna impedance in accordance with the ROM code of the identified object. Reflections from the object enter the receiving device, and from its output to the input of the comparators 1 and amplitude meters 7. The signals received at the input of the comparators 1 have significantly different signal-to-noise ratios. Comparators limit large signals to a signal-to-noise ratio of 10. At the output of comparators 1, the signals are equal to or less than this ratio, the same signals at the input of the channels. Device 3 converts the pulse train into a multi-bit binary code (11 bits).

 Device 4 determines the phases of the pulses and measures the duration of their periods, their reliability in half the length of time necessary to transmit one bit of information / i.e. "1" or "0" /.

 The device 5 accumulates information about the duration of the periods of the pulse packets and increases their reliability in half the length of time necessary to transmit one bit of information.

 Device 6 measures the duration of the periods of the pulses and their reliability during the transmission of one bit of information.

 This information from all channels goes to the input of the adder 5, which accumulates information about one bit, determines its reliability and the following information is taken from the output of the adder: tracking strobe, information reliability / 0 information is invalid, 1 information is reliable /, information bits in the binary number system .

Claims (1)

 A demodulator of code signals of a telemetric identification system of objects, containing N comparators, where N 2,3,4 and N are the same channels, each of which is connected to the output of the corresponding comparator, an adder of signals of N channels, each signal input of which is connected to the output of the corresponding channel, and a clock generator, characterized in that N meters of input signal amplitudes are introduced, and each of the N channels contains a series-connected device for converting a sequence of code pulses into multi-bit binary code, a device for determining the phase of code pulses and their belonging to one of two periods, a device for accumulating and increasing the reliability of information and a device for determining the value of one bit of information, the input of each amplitude meter is connected to the input of the comparator of its channel, and the output with the corresponding control input adder, the output of the clock generator is connected to the synchronizing inputs of all devices of each of the N channels, and the output of the adder is the output of the demodulator.