NL6400034A - - Google Patents
Info
- Publication number
- NL6400034A NL6400034A NL6400034A NL6400034A NL6400034A NL 6400034 A NL6400034 A NL 6400034A NL 6400034 A NL6400034 A NL 6400034A NL 6400034 A NL6400034 A NL 6400034A NL 6400034 A NL6400034 A NL 6400034A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/04—Addressing variable-length words or parts of words
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0607—Interleaved addressing
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Storage Device Security (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US249761A US3270324A (en) | 1963-01-07 | 1963-01-07 | Means of address distribution |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL6400034A true NL6400034A (US20110009641A1-20110113-C00185.png) | 1964-07-08 |
Family
ID=22944873
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL6400034A NL6400034A (US20110009641A1-20110113-C00185.png) | 1963-01-07 | 1964-01-06 |
Country Status (7)
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3380034A (en) * | 1963-07-17 | 1968-04-23 | Vyzk Ustav Matemat Stroju | Addressing system for computer memories |
| US3366927A (en) * | 1964-06-17 | 1968-01-30 | Ibm | Computing techniques |
| USRE26429E (en) * | 1964-12-08 | 1968-08-06 | Information retrieval system and method | |
| US3380030A (en) * | 1965-07-29 | 1968-04-23 | Ibm | Apparatus for mating different word length memories |
| US3487373A (en) * | 1965-11-16 | 1969-12-30 | Gen Electric | Apparatus providing symbolic memory addressing in a multicomputer system |
| US3473158A (en) * | 1966-03-07 | 1969-10-14 | Gen Electric | Apparatus providing common memory addressing in a symbolically addressed data processing system |
| US3469241A (en) * | 1966-05-02 | 1969-09-23 | Gen Electric | Data processing apparatus providing contiguous addressing for noncontiguous storage |
| US3475730A (en) * | 1966-05-27 | 1969-10-28 | Gen Electric | Information shift apparatus in a computer system |
| US3440615A (en) * | 1966-08-22 | 1969-04-22 | Ibm | Overlapping boundary storage |
| US3462744A (en) * | 1966-09-28 | 1969-08-19 | Ibm | Execution unit with a common operand and resulting bussing system |
| US3480916A (en) * | 1967-01-30 | 1969-11-25 | Gen Electric | Apparatus providing identification of programs in a multiprogrammed data processing system |
| US3525081A (en) * | 1968-06-14 | 1970-08-18 | Massachusetts Inst Technology | Auxiliary store access control for a data processing system |
| US3710327A (en) * | 1970-12-14 | 1973-01-09 | Ibm | Synchronous communications adapter |
| US3946366A (en) * | 1973-01-26 | 1976-03-23 | Sanders Associates, Inc. | Addressing technique employing both direct and indirect register addressing |
| JPS5410219B2 (US20110009641A1-20110113-C00185.png) * | 1973-12-07 | 1979-05-02 | ||
| US3996566A (en) * | 1974-12-16 | 1976-12-07 | Bell Telephone Laboratories, Incorporated | Shift and rotate circuit for a data processor |
| US3976978A (en) * | 1975-03-26 | 1976-08-24 | Honeywell Information Systems, Inc. | Method of generating addresses to a paged memory |
| GB1513586A (en) * | 1975-11-21 | 1978-06-07 | Ferranti Ltd | Data processing |
| US4195342A (en) * | 1977-12-22 | 1980-03-25 | Honeywell Information Systems Inc. | Multi-configurable cache store system |
-
1963
- 1963-01-07 US US249761A patent/US3270324A/en not_active Expired - Lifetime
- 1963-12-05 DE DE19631449544 patent/DE1449544A1/de active Pending
-
1964
- 1964-01-06 NL NL6400034A patent/NL6400034A/xx unknown
- 1964-01-06 GB GB480/64A patent/GB1037389A/en not_active Expired
- 1964-01-07 SE SE116/64A patent/SE319641B/xx unknown
- 1964-01-07 CH CH11264A patent/CH425281A/de unknown
- 1964-01-07 BE BE642194A patent/BE642194A/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| CH425281A (de) | 1966-11-30 |
| BE642194A (US20110009641A1-20110113-C00185.png) | 1964-05-04 |
| DE1449544A1 (de) | 1969-04-10 |
| SE319641B (US20110009641A1-20110113-C00185.png) | 1970-01-19 |
| GB1037389A (en) | 1966-07-27 |
| US3270324A (en) | 1966-08-30 |
