KR980006175A - 엘오씨(loc) 패키지 - Google Patents

엘오씨(loc) 패키지 Download PDF

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Publication number
KR980006175A
KR980006175A KR1019960022068A KR19960022068A KR980006175A KR 980006175 A KR980006175 A KR 980006175A KR 1019960022068 A KR1019960022068 A KR 1019960022068A KR 19960022068 A KR19960022068 A KR 19960022068A KR 980006175 A KR980006175 A KR 980006175A
Authority
KR
South Korea
Prior art keywords
lead
chip
semiconductor chip
loc
semiconductor
Prior art date
Application number
KR1019960022068A
Other languages
English (en)
Other versions
KR0183653B1 (ko
Inventor
최병선
Original Assignee
이대원
삼성항공산업주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이대원, 삼성항공산업주식회사 filed Critical 이대원
Priority to KR1019960022068A priority Critical patent/KR0183653B1/ko
Publication of KR980006175A publication Critical patent/KR980006175A/ko
Application granted granted Critical
Publication of KR0183653B1 publication Critical patent/KR0183653B1/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73215Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

본 발명은 LOC 패키지에 관한 것이다. 반도체 칩이 반도체 리드 프레임의 리드부 선단 하부의 소정영역에 탑재되어 있고, 상기 반도체 칩과 반도체 칩이 탑재된 상기 리드부 선단 하부 사이에, 접착층, 테이프층 및 접착층이 순차적으로 적층된 3층의 절연 부재를 구비하고 있는 엘오씨(LOC: Lead On Chip) 패키지에 있어서, 상기 절연부재가 상기 리드부 선단에만 형성되어 있는 본 발명은 엘오씨(LOC) 패키지는 테이프로 인하여 발생되는 열이 적어 테이프와 칩간의 발기 현상을 방지할 수 있다.

Description

엘오씨(LOC) 패키지
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 따른 절연 부재가 형성된 엘오씨(LOC)용 반도체 리드 프레임의 정면도이다.

Claims (1)

  1. 반도체 칩이 반도체 리드 프레임의 리드부 선단 하부의 소정영역에 탑재되어 있고, 상기 반도체 칩과 반도체 칩이 탑재된 상기 리드부 선단 하부 사이에, 접착층, 테이프층 및 접착층이 순차적으로 적층된 3층의 절연부재를 구비하고 있는 엘오씨(LOC: Lead On Chip) 패키지에 있어서, 상기 절연부재가 상기 리드부 선단에만 형성되어 있는 것을 특징으로 하는 엘오씨(LOC) 패키지.
KR1019960022068A 1996-06-18 1996-06-18 엘오씨 패키지 KR0183653B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960022068A KR0183653B1 (ko) 1996-06-18 1996-06-18 엘오씨 패키지

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960022068A KR0183653B1 (ko) 1996-06-18 1996-06-18 엘오씨 패키지

Publications (2)

Publication Number Publication Date
KR980006175A true KR980006175A (ko) 1998-03-30
KR0183653B1 KR0183653B1 (ko) 1999-03-20

Family

ID=19462318

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960022068A KR0183653B1 (ko) 1996-06-18 1996-06-18 엘오씨 패키지

Country Status (1)

Country Link
KR (1) KR0183653B1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100686461B1 (ko) * 2005-04-25 2007-02-26 앰코 테크놀로지 코리아 주식회사 반도체 패키지용 리드프레임 구조

Also Published As

Publication number Publication date
KR0183653B1 (ko) 1999-03-20

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