KR970032134A

KR970032134A - Line-length encoding device and method

Info

Publication number: KR970032134A
Application number: KR1019950045871A
Authority: KR
Inventors: 강동수
Original assignee: 배순훈; 대우전자 주식회사
Priority date: 1995-11-30
Filing date: 1995-11-30
Publication date: 1997-06-26

Abstract

본 발명은 줄-길이 부호화 장치 및 그 방법에 관한 것으로서, 본 발명의 줄-길이 부호화 장치는 변환 계수 입력부(10)와 변환 계수 판단부(12), 레벨값 출력부(14), 불록 제어 신호 발생부(16), 인크리먼트부(18), 카운터(20), 런값 출력부(22), 인에이블 신호 발생부(24) 및 EOB 신호 발생부(26)로 구성되어 있으며, 본 발명의 줄-길이 부호화 방법은 이산 여현 변환된 변환계수를 입력받아 그 변환 계수가 "0"인지 아닌지를 판단한 다음, 상기 변환 계수가 "0"인 경우 그 개수를 하나씩 증가시키면서 카운팅하고 상기 변환 계수가 "0"이 아니면 "0"이 아닌 변환계수를 레벨값으로 정한 후 그 이전까지 카운팅된 "0"의 개수를 런값으로 정하여(란, 레벨)의 형태로 출력하고, 또한 한 블록의 변환계수의 수가 64개를 초과하게 되면 한 블록의 끝을 의미하는 플래그 신호를 다음 단의 가변길이 부호화 부분으로 전송함으로써, 영상 데이터의 보다 높은 압축률을 실현할 수 있다는데 그 이점이 있다.The present invention relates to a line-length encoding apparatus and a method thereof, wherein the line-length encoding apparatus includes a transform coefficient input unit 10, a transform coefficient determination unit 12, a level value output unit 14, and a block control signal. A generator 16, an incrementer 18, a counter 20, a run value output 22, an enable signal generator 24, and an EOB signal generator 26 are provided. The length coding method receives a discrete cosine transformed transform coefficient and determines whether the transform coefficient is "0", and counts the result by incrementing the number one by one when the transform coefficient is "0" and the transform coefficient is "0". If not, the conversion coefficient other than "0" is set as the level value, and the number of "0" counted up to that point is set as the run value (column, level), and the number of conversion coefficients of one block is 64. If more than, the flag signal means the end of one block. It is advantageous in that a higher compression ratio of video data can be realized by transmitting to the variable length coding portion of.

Description

Line-length encoding device and method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 줄-길이 부호화 장치의 구성을 나타낸 블록도.1 is a block diagram showing the configuration of a line-length encoding apparatus according to the present invention.

제2도는 본 발명에 따른 줄-길이 부호화 방법에 대한 순서도이다.2 is a flowchart of a line-length encoding method according to the present invention.

Claims

A transform coefficient input unit 10 for latching and outputting the discrete cosine transformed transform coefficients; A conversion coefficient determination unit 12 that determines whether the conversion coefficient is "0" or outputs a control signal; A level value output unit 14 for latching and outputting the level value when the conversion coefficient is not "0" as a result of the determination by the conversion coefficient determination unit 12; A block control signal generator 16 for outputting a control signal to input a transform coefficient of another block when all of the transform coefficients of one block have been processed; An incrementing unit (18) for increasing the current value by one according to the control signals of the transform coefficient determining unit (12) and the block control signal generating unit (16); A counter 20 for increasing the current value by one according to the control signal of the block control signal generator 16 and counting the number of latched conversion coefficients; A run value output unit 22 for latching the length of " 0 " stored in the increment unit 18 and outputting the run value according to the control signal of the conversion coefficient determination unit 12; An enable signal generator 24 generating an enable signal to latch a run value and a level value required for variable length coding according to the control signal of the transform coefficient determination unit 12 and the output signal of the counter 20 ); And an EOB signal generator (26) for generating a flag signal indicating the end of one block according to the output signal of the counter (20).

The line-length encoding device of claim 1, wherein the counter is implemented as a 6-bit binary counter.

The register of claim 1, wherein the conversion coefficient input unit (10), the level value output unit (14), the run value output unit (22), and the enable signal generator (24) operate in synchronization with a system clock. Line-length encoding device, characterized in that implemented by.

A first step S1 of initializing the run value to "0" and initializing the number of discrete cosine transformed transform coefficients to "0"; A second step S2 of determining whether or not the transform coefficient is "0"; A third step S3 of increasing a run value by one when the conversion coefficient is "0" as a result of the determination in the second step S2; A fourth step S4 of increasing the number of the transform coefficients one by one; A fifth step (S5) of branching to the second step (S2) if it is determined whether the number of the transform coefficients is smaller than 64; A sixth step (S6) of outputting a flag value indicating the end of one block when the number of transform coefficients is greater than 64 as a result determined in the fifth step (S5); As a result of the determination in the second step S2, when the change coefficient is not "0", the conversion coefficient is a level LEVEL value and the number of the conversion coefficients in the fourth step S4 is a run value. A line-length encoding method of sequentially performing a seventh step (S7) to be output.

※ Note: The disclosure is based on the initial application.