KR970014281A - Pattern formation method of optical path control device - Google Patents

Pattern formation method of optical path control device Download PDF

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Publication number
KR970014281A
KR970014281A KR1019950027520A KR19950027520A KR970014281A KR 970014281 A KR970014281 A KR 970014281A KR 1019950027520 A KR1019950027520 A KR 1019950027520A KR 19950027520 A KR19950027520 A KR 19950027520A KR 970014281 A KR970014281 A KR 970014281A
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South Korea
Prior art keywords
layer
etching process
optical path
photosensitive layer
path control
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KR1019950027520A
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Korean (ko)
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KR0170957B1 (en
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김준모
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배순훈
대우전자 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
    • C08G2261/00—Macromolecular compounds obtained by reactions forming a carbon-to-carbon link in the main chain of the macromolecule
    • C08G2261/70—Post-treatment
    • C08G2261/72—Derivatisation
    • C08G2261/726—Silylation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

본 발명은 구동 기판상에 순차적으로 적층된 산화 실리콘의 희생막과 질화 실리콘의 멤브레인을 패터닝시키기 위한 방법에 관한 것으로서, 상기 멤브레인상에 포토 레지스트를 소정 두께로 적층시킴으로서 형성된 감광층을 패터닝시키는 제1단계와, 패터닝된 상기 감광층을 유기 실란 부가 공정에 의하여 실란화층으로 전환시키는 제2단계와, 상기 실란화층을 마스크로 하여 상기 멤브레인의 일부를 1차 건식 식각 공정에 의해 식각시켜서 상기 희생막의 일부를 노출시키는 제3단계와, 상기 노출된 희생막의 일부 및 상기 실란화층을 2차 건식 식각 공정에 의하여 식각시키는 제4단계로 이루어지며 이에 의해서 상기 감광층의 식각 선택비를 극대화시켜서 상기 멤브레인 및 희생막을 원하는 형상으로 패터닝시킬 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for patterning a sacrificial film of silicon oxide and a silicon nitride film sequentially stacked on a driving substrate, the method comprising: patterning a photosensitive layer formed by laminating a photoresist on a membrane to a predetermined thickness; And a second step of converting the patterned photosensitive layer into a silanized layer by an organic silane addition process, and etching a part of the membrane by a first dry etching process using the silanized layer as a mask to form a part of the sacrificial layer. And a fourth step of etching the part of the exposed sacrificial layer and the silanized layer by a second dry etching process, thereby maximizing the etching selectivity of the photosensitive layer. The membrane can be patterned into the desired shape.

Description

광로 조절 장치의 패턴 형성 방법Pattern formation method of optical path control device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도 (가) 내지 (라)는 본 발명에 따른 광로 조절 장치의 패턴 형성 방법을 순차적으로 도시한 공정도.2 (a) to (d) is a process diagram sequentially showing a pattern forming method of the optical path control apparatus according to the present invention.

Claims (8)

구동 기판(110)상에 순차적으로 적층된 산화 실리콘의 희생막(121)과 질화 실리콘의 멤브레인(122)을 패터닝시키기 위한 광로 조절장치의 패턴 형성방법에 있어서, 상기 멤브레인(122)상에 포토 레지스트를 소정 두께로 적층시킴으로서 형성된 감광층(210)을 패터닝시키는 제1단계와, 패터닝된 상기 감광층(210)을 유기 실란 부가 공정에 의해서 실란화층(220)으로 전환시키는 제2단계와, 상기 실란화층(220)을 마스크로 하여 상기 멤브레인(122)의 일부를 1차 건식 식각 공정에 의해 식각시켜서 상기 희생막(121)의 일부를 노출시키는 제3단계와, 그리고 상기 노출된 희생막(121)의 일부 및 상기 실란화층(220)을 2차 건식 식각 공정에 의하여 식각시키는 제4단계로 이루어진 것을 특징으로 하는 광로 조절 장치의 패턴 형성 방법.In the pattern formation method of the optical path control apparatus for patterning the silicon oxide sacrificial film 121 and the silicon nitride film 122 sequentially stacked on the driving substrate 110, a photoresist on the membrane 122 A first step of patterning the photosensitive layer 210 formed by laminating the film to a predetermined thickness, a second step of converting the patterned photosensitive layer 210 to the silanization layer 220 by an organic silane addition process, and the silane A third step of exposing a portion of the sacrificial layer 121 by etching a portion of the membrane 122 by a first dry etching process using the layer 220 as a mask, and the exposed sacrificial layer 121. And a fourth step of etching a part of the silanized layer 220 by a secondary dry etching process. 제1항에 있어서, 상기 유기 실란 부가 공정은 상기 멤브레인(122)상에 잔존하는 감광층(210)을 노광시킨 후, 상기 노광된 감광층(210)을 액체 상태 또는 기체 상태의 실리레이션 에이전트에 침지시키거나 노출시킴으로서 수행되는 것을 특징으로 하는 광로 조절 장치의 패턴 형성 방법.The method of claim 1, wherein the organosilane addition process exposes the photosensitive layer 210 remaining on the membrane 122, and then exposes the exposed photosensitive layer 210 to a liquid or gaseous silicide agent. The pattern forming method of the optical path control device, characterized in that performed by dipping or exposing. 제2항에 있어서, 상기 실리레이션 에이전트는 유기 실란기를 함유하는 물로 이루어져 있는 것을 특징으로 하는 광로 조절 장치의 패턴 형성 방법The method of claim 2, wherein the silicide agent comprises water containing an organic silane group. 제3항에 있어서, 상기 실리레이션 에이전트는 헥사메틸디실라잔(HMDS), n,n-디메틸라미노 트리메틸실라잔(TMSDMA), 디클로로메틸실란(DCMS;), 또는 비스-디메틸라미노-메틸실란(D-DMAMS)중 적어도 하나의 화합물로 이루어져 있는 것을 특징으로 하는 광로 조절 장치의 패턴 형성 방법.The method of claim 3, wherein the siliciding agent is hexamethyldisilazane (HMDS), n, n-dimethyllamino trimethylsilazane (TMSDMA), dichloromethylsilane (DCMS;), or bis-dimethylramino-methyl Method of forming a pattern of the optical path control device, characterized in that consisting of at least one compound of silane (D-DMAMS). 제1항 내지 제4항 중 적어도 하나의 항에 있어서, 상기 감광층(210)은 상기 실리레이션 에이전트의 유기 실란기와 반응하여 팽윤 현상을 나타내는 포토 레지스트로 이루어져 있는 것을 특징으로 하는 광로 조절 장치의 패턴 형성 방법.The pattern of the optical path control apparatus according to any one of claims 1 to 4, wherein the photosensitive layer 210 is made of a photoresist that reacts with an organic silane group of the siliciding agent and exhibits a swelling phenomenon. Forming method. 제5항에 있어서, 상기 포토 레지스트는 디아조화합물을 함유하는 노블락계 포토레지스트로 이루어져 있는 것을 특징으로 하는 광로 조절 장치의 패턴 형성 방법.The method of claim 5, wherein the photoresist is made of a noblock-based photoresist containing a diazo compound. 제1항에 있어서, 상기 1차 건식 식각 공정은 산소 플라즈마 이온 식각 공정에 의하여 수행되는 것을 특징으로 하는 광로 조절 장치의 패턴 형성 방법.The method of claim 1, wherein the first dry etching process is performed by an oxygen plasma ion etching process. 제7항에 있어서, 상기 2차 건식 식각 공정은 아르곤 플라즈마 이온 식각 공정에 의하여 수행되는 것을 특징으로 하는 광로 조절 장치의 패턴 형성 방법.The method of claim 7, wherein the secondary dry etching process is performed by an argon plasma ion etching process. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950027520A 1995-08-30 1995-08-30 Method for patterning optical projection system KR0170957B1 (en)

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KR100574930B1 (en) * 1999-12-30 2006-04-28 삼성전자주식회사 Membrane blank mask having membrane protection layer and method for manufacturing thereof

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