KR960011699A - Data transmission circuit with abnormal operation prevention function - Google Patents
Data transmission circuit with abnormal operation prevention function Download PDFInfo
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- KR960011699A KR960011699A KR1019940024785A KR19940024785A KR960011699A KR 960011699 A KR960011699 A KR 960011699A KR 1019940024785 A KR1019940024785 A KR 1019940024785A KR 19940024785 A KR19940024785 A KR 19940024785A KR 960011699 A KR960011699 A KR 960011699A
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- data signal
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Abstract
본 발명은 각종 데이타를 전송하여 다수의 주변기기를 제어하는 마이크로 프로세서에 관한 것으로서, 더욱 상세하게는 마이크로 프로세서로부터 주변기기에 전송되는 어드레스, 라이트 및 데이타 신호에 외부로부터 노이즈 신호가 혼입되어 주변기기가 오동작되는 것을 방지하도록 된 이상동작 방지기능을 갖는 데이타 전송회로에 관한 것으로, 종래에는 마이크로 프로세서와 주변기기 간에 연결된 전송선로에 노이즈가 혼입되어 주변기기에 노이즈가 함유된 데이타 신호가 전송되어 주변기기가 오동작하는 결점을 가지고 있었다.The present invention relates to a microprocessor that transmits various data to control a plurality of peripheral devices. More particularly, a noise signal is mixed into an address, a write signal, and a data signal transmitted from a microprocessor to a peripheral device, thereby causing the peripheral device to malfunction. The present invention relates to a data transmission circuit having an abnormal operation prevention function. In the related art, noise is mixed in a transmission line connected between a microprocessor and a peripheral device, and a peripheral device malfunctions due to transmission of a data signal containing noise to the peripheral device. .
본 발명은 예시도면 제3도에서와 같이 전송하고자 하는 데이타 신호를 기초로 체크 썸 데이타를 생성시켜 출력하도록 마이크로 프로세서(100)를 구성하고, 라이트/리드 신호를 기초로 데이타 신호와 어드레스 신호를 판독/기록하는 듀얼 포트 램(300)을 구성하며, 상기 듀얼 포트 램(300)으로부터 전송된 데이타 신호의 체크 썸 데이타와 마이크로 프로세서(100)로부터 전송된 체크 썸 데이타를 대비하여 데이타 신호의 정상 전송여부를 판단하여 어드레스 신호와 데이타 신호를 어드레스 디코우더(200) 및 D-플립/플롭(D0-D7)에 전송하는 보조 프로세서(400)로 구성된 것이다.The present invention configures the microprocessor 100 to generate and output check thumb data based on the data signal to be transmitted, as shown in FIG. 3, and reads the data signal and the address signal based on the write / read signal. A dual port RAM 300 for recording and recording, and compares the check thumb data of the data signal transmitted from the dual port RAM 300 with the check thumb data transmitted from the microprocessor 100. It is composed of a coprocessor 400 for transmitting the address signal and the data signal to the address decoder 200 and the D-flip / flop (D 0 -D 7 ).
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제3도는 본 발명에 따른 마이크로 프로세서의 이상동작 방지기능을 갖는 데이타 전송회로를 나타낸 블록도,3 is a block diagram showing a data transmission circuit having an abnormal operation preventing function of a microprocessor according to the present invention;
제4도는 본 발명에 따른 이상동작 방지기능을 갖는 데이타 전송회로를 구비한 마이크로 프로세서의 동작상태를 나타낸 흐름도.4 is a flowchart showing an operation state of a microprocessor having a data transmission circuit having an abnormal operation prevention function according to the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940024785A KR960011699A (en) | 1994-09-29 | 1994-09-29 | Data transmission circuit with abnormal operation prevention function |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940024785A KR960011699A (en) | 1994-09-29 | 1994-09-29 | Data transmission circuit with abnormal operation prevention function |
Publications (1)
Publication Number | Publication Date |
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KR960011699A true KR960011699A (en) | 1996-04-20 |
Family
ID=66766771
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019940024785A KR960011699A (en) | 1994-09-29 | 1994-09-29 | Data transmission circuit with abnormal operation prevention function |
Country Status (1)
Country | Link |
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KR (1) | KR960011699A (en) |
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1994
- 1994-09-29 KR KR1019940024785A patent/KR960011699A/en not_active Application Discontinuation
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E601 | Decision to refuse application |