KR950034536A - 화합물 반도체의 오옴 접속방법 - Google Patents
화합물 반도체의 오옴 접속방법 Download PDFInfo
- Publication number
- KR950034536A KR950034536A KR1019950003321A KR19950003321A KR950034536A KR 950034536 A KR950034536 A KR 950034536A KR 1019950003321 A KR1019950003321 A KR 1019950003321A KR 19950003321 A KR19950003321 A KR 19950003321A KR 950034536 A KR950034536 A KR 950034536A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- augeni
- thickness
- compound semiconductor
- weight percent
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract 13
- 239000004065 semiconductor Substances 0.000 title claims abstract 8
- 150000001875 compounds Chemical class 0.000 title claims abstract 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract 6
- 229910052732 germanium Inorganic materials 0.000 claims abstract 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims abstract 3
- 229910052759 nickel Inorganic materials 0.000 claims abstract 3
- 238000010438 heat treatment Methods 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims 3
- 239000002184 metal Substances 0.000 claims 3
- 229910052751 metal Inorganic materials 0.000 claims 3
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 239000000956 alloy Substances 0.000 abstract 1
- 229910045601 alloy Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/452—Ohmic electrodes on AIII-BV compounds
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Led Devices (AREA)
Abstract
본 발명은 Ⅲ-Ⅴ화합물 반도체의 n 도핑된 반도체 층위에 오옴 접속방법을 하기 위한 방법에 관한 것이다. AuGeNi층은 n형 Ⅲ-Ⅴ화합물 반도체 위에 형성되며, AuGeNi층의 두께는 50 및 200nm 사이에 놓이며, AuGeNi층의 게르마늄 및 니켈 농도로 1중량 퍼센트 이하이다. 250 및 1000nm 사이의 두께를 가진 Au층은 AuGeNi층에 공급된다. 이들 층은 합금되는 것이 아니라 5 및 20초 주기동안 430 및 480℃ 사이의 온도에서 또는 40 및 180분 주기동안 360 및 400℃ 사이의 온도에서 띄임된다. 본 방법으로 만들어진 금속 반도체 접속은 낮은 접속 저항을 가지면 합금 AuGeNi 접속의 비균질성을 제거한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 열 처리전에 접속을 구성한 층에 대한 단면도를 도시한다.
Claims (11)
- 처음에 금속 접속층이 n 도핑된 반도체층에 공급되며, 금층이 상기 금속접속층에 공급되며, 그리고 마지막으로 이렇게 얻은 구조체가 열처리 단계에서 뜨임되며, 상기 금속 접속층은 AuGeNi로 이루어지며, 게르마늄 함유량 또는 니켈 함유량이 1중량 퍼센트를 초과하지 않은 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.
- 제1항에 있어서, 여러층이 40 내지 80분 주기동안 360 내지 390℃의 온도에서 뜨임되는 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.
- 제1항에 있어서, 상기 구조체는 5 내지 20초 주기동안 430 내지 480℃의 온도에서 뜨임되는 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.
- 제1항에 있어서, AuGeNi층의 니켈 함유량은 0.5중량 퍼센트인 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.
- 제1항에 있어서, AuGeNi층의 게르마늄 함유량은 0.4중량 퍼센트인 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.
- 제4항에 있어서, AuGeNi층은 50 및 200nm 사이의 두께를 가지는 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.
- 제1항에 있어서, Au층은 250 및 1000nm 사이의 두께를 가지는 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.
- 제1항에 있어서, TiWN층은 초기에 열처리 단계전에 AuGeNi층을 덮어 씌운 Au층 위에 증착되며 그 다음에 Al을 보강하는 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.
- 제8항에 있어서, TiWN층의 두께는 100 및 500nm 사이에 놓이는 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.
- 제9항에 있어서, 알루미늄층의 두께는 1 및 3 마이크론 사이에 놓이는 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.
- 제1항에 있어서, 접속구조체는 열처리 단계전에 형성되는 것을 특징으로 하는 Ⅲ-Ⅴ 화합물 반도체의 n 도핑된 반도체 층위의 오옴 접속방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4405716A DE4405716C2 (de) | 1994-02-23 | 1994-02-23 | Verfahren zur Herstellung von ohmschen Kontakten für Verbindungshalbleiter |
DEP4405716.4 | 1994-02-23 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950034536A true KR950034536A (ko) | 1995-12-28 |
KR100351195B1 KR100351195B1 (ko) | 2002-12-11 |
Family
ID=6510925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950003321A KR100351195B1 (ko) | 1994-02-23 | 1995-02-21 | 화합물반도체의오믹콘택트제조방법 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5731224A (ko) |
JP (1) | JP3418849B2 (ko) |
KR (1) | KR100351195B1 (ko) |
DE (1) | DE4405716C2 (ko) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1091393B1 (en) * | 1999-02-18 | 2008-04-09 | The Furukawa Electric Co., Ltd. | Electrode for semiconductor device and its manufacturing method |
JP2000307190A (ja) * | 1999-04-23 | 2000-11-02 | Furukawa Electric Co Ltd:The | 面発光型半導体レーザの作製方法 |
US7368316B2 (en) * | 1999-04-23 | 2008-05-06 | The Furukawa Electric Co., Ltd. | Surface-emission semiconductor laser device |
US7881359B2 (en) * | 1999-04-23 | 2011-02-01 | The Furukawa Electric Co., Ltd | Surface-emission semiconductor laser device |
DE10039945B4 (de) * | 2000-08-16 | 2006-07-13 | Vishay Semiconductor Gmbh | Verfahren zum Herstellen einer lichtemittierenden Halbleiteranordnung aus GaAIAs mit Doppelheterostruktur und entsprechende Halbleiteranordnung |
US7084423B2 (en) | 2002-08-12 | 2006-08-01 | Acorn Technologies, Inc. | Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions |
US6833556B2 (en) | 2002-08-12 | 2004-12-21 | Acorn Technologies, Inc. | Insulated gate field effect transistor having passivated schottky barriers to the channel |
DE10261364B4 (de) * | 2002-12-30 | 2004-12-16 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung einer temperbarer Mehrschichtkontaktbeschichtung, insbesondere einer temperbaren Mehrschichtkontaktmetallisierung |
DE102004004780B9 (de) | 2003-01-31 | 2019-04-25 | Osram Opto Semiconductors Gmbh | Verfahren zum Herstellen eines Bauelementes mit einem elektrischen Kontaktbereich und Bauelement mit einem elektrischen Kontaktbereich |
JP2004235649A (ja) * | 2003-01-31 | 2004-08-19 | Osram Opto Semiconductors Gmbh | 電気コンタクト領域を備えたモジュールの製造方法および半導体層列および活性ゾーンを有するモジュール |
DE10329364B4 (de) * | 2003-06-30 | 2007-10-11 | Osram Opto Semiconductors Gmbh | Elektrischer Kontakt für ein optoelekronisches Bauelement und Verfahren zu dessen Herstellung |
US20080014732A1 (en) * | 2006-07-07 | 2008-01-17 | Yanping Li | Application of PVD W/WN bilayer barrier to aluminum bondpad in wire bonding |
JP5393751B2 (ja) * | 2011-09-28 | 2014-01-22 | 株式会社沖データ | 発光装置、発光素子アレイ、および画像表示装置 |
US9362376B2 (en) | 2011-11-23 | 2016-06-07 | Acorn Technologies, Inc. | Metal contacts to group IV semiconductors by inserting interfacial atomic monolayers |
US9620611B1 (en) | 2016-06-17 | 2017-04-11 | Acorn Technology, Inc. | MIS contact structure with metal oxide conductor |
WO2018094205A1 (en) | 2016-11-18 | 2018-05-24 | Acorn Technologies, Inc. | Nanowire transistor with source and drain induced by electrical contacts with negative schottky barrier height |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4679311A (en) * | 1985-12-12 | 1987-07-14 | Allied Corporation | Method of fabricating self-aligned field-effect transistor having t-shaped gate electrode, sub-micron gate length and variable drain to gate spacing |
US4662060A (en) * | 1985-12-13 | 1987-05-05 | Allied Corporation | Method of fabricating semiconductor device having low resistance non-alloyed contact layer |
US5322814A (en) * | 1987-08-05 | 1994-06-21 | Hughes Aircraft Company | Multiple-quantum-well semiconductor structures with selective electrical contacts and method of fabrication |
US4853346A (en) * | 1987-12-31 | 1989-08-01 | International Business Machines Corporation | Ohmic contacts for semiconductor devices and method for forming ohmic contacts |
US5064772A (en) * | 1988-08-31 | 1991-11-12 | International Business Machines Corporation | Bipolar transistor integrated circuit technology |
US5067809A (en) * | 1989-06-09 | 1991-11-26 | Oki Electric Industry Co., Ltd. | Opto-semiconductor device and method of fabrication of the same |
JP2907452B2 (ja) * | 1989-08-30 | 1999-06-21 | 三菱化学株式会社 | 化合物半導体用電極 |
DE4113969A1 (de) * | 1991-04-29 | 1992-11-05 | Telefunken Electronic Gmbh | Verfahren zur herstellung von ohmschen kontakten fuer verbindungshalbleiter |
JP3196390B2 (ja) * | 1992-12-25 | 2001-08-06 | 富士電機株式会社 | パラメータ同定器 |
-
1994
- 1994-02-23 DE DE4405716A patent/DE4405716C2/de not_active Expired - Lifetime
- 1994-12-28 US US08/365,243 patent/US5731224A/en not_active Expired - Lifetime
-
1995
- 1995-02-14 JP JP06145995A patent/JP3418849B2/ja not_active Expired - Lifetime
- 1995-02-21 KR KR1019950003321A patent/KR100351195B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE4405716A1 (de) | 1995-08-24 |
JP3418849B2 (ja) | 2003-06-23 |
US5731224A (en) | 1998-03-24 |
DE4405716C2 (de) | 1996-10-31 |
JPH07263375A (ja) | 1995-10-13 |
KR100351195B1 (ko) | 2002-12-11 |
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