KR950021876U - 64/8KHZ composite clock generation circuit using memory - Google Patents

64/8KHZ composite clock generation circuit using memory

Info

Publication number
KR950021876U
KR950021876U KR2019930030372U KR930030372U KR950021876U KR 950021876 U KR950021876 U KR 950021876U KR 2019930030372 U KR2019930030372 U KR 2019930030372U KR 930030372 U KR930030372 U KR 930030372U KR 950021876 U KR950021876 U KR 950021876U
Authority
KR
South Korea
Prior art keywords
8khz
memory
generation circuit
clock generation
composite clock
Prior art date
Application number
KR2019930030372U
Other languages
Korean (ko)
Other versions
KR0127532Y1 (en
Inventor
손수현
Original Assignee
엘지정보통신주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘지정보통신주식회사 filed Critical 엘지정보통신주식회사
Priority to KR2019930030372U priority Critical patent/KR0127532Y1/en
Publication of KR950021876U publication Critical patent/KR950021876U/en
Application granted granted Critical
Publication of KR0127532Y1 publication Critical patent/KR0127532Y1/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03828Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
    • H04L25/03834Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using pulse shaping

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
KR2019930030372U 1993-12-29 1993-12-29 64/8khz composit clock generation circuit using memory KR0127532Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019930030372U KR0127532Y1 (en) 1993-12-29 1993-12-29 64/8khz composit clock generation circuit using memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019930030372U KR0127532Y1 (en) 1993-12-29 1993-12-29 64/8khz composit clock generation circuit using memory

Publications (2)

Publication Number Publication Date
KR950021876U true KR950021876U (en) 1995-07-28
KR0127532Y1 KR0127532Y1 (en) 1998-11-02

Family

ID=19373377

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019930030372U KR0127532Y1 (en) 1993-12-29 1993-12-29 64/8khz composit clock generation circuit using memory

Country Status (1)

Country Link
KR (1) KR0127532Y1 (en)

Also Published As

Publication number Publication date
KR0127532Y1 (en) 1998-11-02

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