KR950010823B1 - Exclusive logic adding system and its method of binary level logic and multiple level logic - Google Patents

Abstract

The binary multi-valued ANDing operator comprises a multi-valued signal input line for transmitting a multi-valued logic signal supplied from a multi-valued logic signal source; a multi-valued signal minimum value input line for transmitting the minimum value signal of the multi-valued logic signal; and a selection unit for inputting the multi-valued logic signal and its minimum value signal at its input terminals and a binary signal at its control terminal and outputting one of the multi-valued logic signal and its minimum value signal according to the binary signal.

Description

Multivalued Logic and Binary Logic Logic Operators and Methods

1 is a truth representation of a binary AND operation apparatus.

2 is an input / output connection diagram of a binary AND product.

3 is a block diagram of a prior art for processing the AND operation of a binary-valued signal.

4 is a representation of truth that differs from binary-multivalued AND operations.

5 is a block diagram of a binary-valued multiplication product operator according to the present invention.

6 is an exemplary configuration diagram of a binary-valued multiplication operator.

* Explanation of symbols for main parts of the drawings

1: Binary AND Product 2: Arithmetic Adder

3: Binary-valued multiplication operator

The present invention relates to a logical product operator and a calculation method, and more particularly, to a logical product operator and operation method of multi-valued logic and binary logic.

Most modern electronic equipment is based on digital signal processing, which processes signals digitally. In this case, digital signal processing is a signal processing method that obtains a desired result by processing digital data generated by passing an analog signal through an analog-to-digital (A / D) converter according to a purpose.

In general, a digital signal is represented by a binary having a binary value, and an arithmetic unit that performs logical operations between these binary numbers is used in many digital signal processing apparatuses. Of these logical operations, the conventional AND operation targets binary input only.

The truth table of the conventional binary AND operation apparatus is shown in FIG. This logical product operation symbol is usually represented by '·' and the signal relationship of the conventional binary logical operator is shown in FIG.

The truth table for the first and binary logical products represents the input and output of the binary logic operator of FIG. That is, if the two inputs of FIG. 2 are logic "0" and logic "0", the output is logic "0", and if the inputs are logic "0" and logic "1", the output is logic "0", logic In the case of "1" and logic "1", the output becomes logic "1". Here, the logic "0" or logic "1" represents a logic value "0" or "1" and is actually mapped to an actual voltage such as 1 Volt or 0 Volt. These binary AND products are commonly used for most digital signals represented by binary columns.

However, what happens when the input of one of the two inputs of the logical product operator does not have a binary logic value is a problem.

In fact, the output of the binary logic operator for the binary logic values described above has binary logic values, but after their operations such as arithmetic sum (arithmetic addition) or arithmetic product (arithmetic multiplication) are performed, Will change. In this case, in order to solve the computation problem of multi-valued logic values and binary logic values, it is possible to implement a number of binary logic operators.

That is, the configuration according to the prior art for performing a binary-multivalued logical product using a binary logical operator is shown in FIG.

As shown in the figure, the conventional arithmetic unit for binary multi-valued multiplication operation uses a binary logic operator, and thus cannot directly process multi-valued logic values. Therefore, a multiple (k) binary logical operator (1) which receives a binary logic value in common to one input stage and receives a multivalued logic value as a multiple (k) binary logic value to another input stage, respectively, A binary-multi-valued AND operation was performed by a circuit configuration including an arithmetic adder 2 that receives an output of a large number (k) binary AND products 1 and performs arithmetic addition. Of course, the arithmetic adder 2 is for generating multi-valued signals, and in some cases, an arithmetic multiplier may be used, and the arithmetic adder is always implemented as a full adder.

As a result, as described above, in order to perform a two-valued multiplication operation using a conventional two-valued AND, a two-valued AND is required as much as a multi-valued value. The circuit configuration is complicated.

Accordingly, the present invention has been made to solve the problems of the prior art, a binary-valued multiplication operator that includes a logical multiplication operation function of binary binary number and can be directly logical multiplication between multi-valued logic value and binary logic value And to provide a method.

In order to achieve the above object, a two-value multiplication logical product operator includes a multi-value signal input line for transmitting a multi-value logic signal r that is an operation target provided from a multi-value logic value signal source and a minimum value signal of the multi-value signal ( The multi-valued signal minimum value input line for fixedly transmitting Min of R), the multi-valued logic signal from the multi-valued signal input line and the multi-valued signal minimum value input line, and the minimum value signal are respectively input to the input terminal, and the control terminal receives a different operation target. And a selection means for receiving a binary signal and selecting and outputting one of the minimum value myth multivalued signals of the multivalued logic signal according to the value of the binary signal input to the control terminal.

In addition, according to the present invention, the binary-valued multiplication product calculation method includes a first step of receiving a binary value and a multivalued logic value as a logical operation target value, and receiving a minimum value of the multivalued logic value and the binary value. And a second step of taking a minimum value of an input multivalued logic value if the value is '0' and taking a multivalued logic value if the binary value is '1' and outputting it as an operation output value.

Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG. 4.

4 is a truth table of an AND operation according to the present invention, which takes a binary and multi-valued logic value according to the present invention, and FIG. 5 is a binary-valued AND product performing an operation according to the truth table of FIG. The configuration diagram.

As shown in FIG. 4, the binary-to-multivalued logical product operation using the truth table indicates the minimum value of the multivalued logic signal when the binary logic signal is '0', and the multivalued logic signal when the binary logic signal is '1'. To get the output.

For example, if the range of values that a multi-valued logic input value can have is a number from "0" to "10", and the value of the multi-valued logic input value currently input is "7", the binary logic input value is "0". If the output is "0" and the binary logic input value is "1", the output value is "7". This logical operation can be realized by the configuration of the binary-multi-valued AND product according to the present invention shown in FIG.

As shown in FIG. 5, the binary-value multiplication logical product operator according to the present invention includes a multi-value signal input line for transmitting a multi-value logic signal r that is an operation target provided from a multi-value logic value signal source, and a minimum value of the multi-value signal. A multi-valued signal minimum value input line for fixedly transmitting a signal Min of R, a multi-value logic signal from the multi-value signal input line and the multi-value signal minimum value input line, and the minimum value signal are respectively input to an input terminal, If the binary signal, which is another calculation target, is input, and the binary signal input to the control terminal is '0', the minimum value of the multi-value signal is selected and output. If the binary signal is '1', the multi-value signal is selected and output. The switch 3 is comprised.

The switch may be implemented as an electronic control switch or a 2: 1 multiplexer having a control stage.

In addition, the AND operation of the binary and multivalued logic includes an AND operation of existing binary logics. That is, when the value that the multi-valued logic input value can have is only a logic value of '0' or '1', it has the same result as the truth table of the binary logic operation of FIG.

When the binary-valued multiplication-operation operator according to the present invention described above is used, a complicated circuit configuration as shown in FIG. 3 is not required to perform the binary-valued multiplication-OR operation.

First, look at another logic expression in the logic circuit output of the circuit shown in Figure 3, when the output is S,

In Equation (1), Si denotes a binary logic value forming a multivalued logic value, P denotes a binary logic value that is an object of logical multiplication, and for the calculation of the above logical expression, as shown in FIG. K binary binary operators are required. In the calculation of Equation (1), if the binary-valued multiplication logical operator of FIG. 5 is used, the configuration is the same as that of FIG. 6, and FIG. 6 is an example of the configuration of the binary-valued multiplication logical operation circuit using the present invention. As shown in the figure, an arithmetic adder 4 that receives a plurality of k binary values and outputs a multivalued logic value by arithmetic addition, and a multivalued logical value that is an output of the arithmetic adder 4 ( r) is input to one input terminal, the minimum value (Min of R) of the multi-valued logic value is input to the other input terminal, and the switch 3 is configured to receive the binary logic value to the control terminal. At this time, the minimum value of the multivalued logic value is already given at the time of designing the circuit, and thus is input as a given fixed value.

The output S 'of FIG. 6 can be expressed by the following equation.

Where ⊙ is a binary-valued multiplication operator.

If the binary-multi-valued AND operation apparatus to which the present invention shown in FIG. 6 is applied has the same circuit configuration and output result according to the prior art of FIG. 3, the binary-valued multiplication AND operation is performed with the simple configuration shown in FIG. It is proven that you can.

Proof of the above is possible because arithmetic addition and binary logical products are linear operators, so the exchange and distribution laws of these operators hold.

To show that the two equations are the same, compare S and S 'with K = 3 and S ₁ = (100110101), S ₂ = (011001010), S ₃ = (110101100), and P = (0101110010). First, the calculated value S by the formula (1) is as follows.

S = (100110101) (010110010) + (011001010) (010110010) + (110101100) (010110010)

= (000110010) + (010000010) + (0100100000) = (020210010) (Equation 3)

In addition, the calculated value S 'of Formula (2) is as follows.

S '= [(100110101) + (011001010) + (110101100)] ⊙ (010110010)

= (221212211) ⊙ (010110010) = (0202210010) (Equation 4)

It can be seen from the above two equations (3) and (4) that the two calculation results have the same value. Accordingly, the circuit configuration using the present invention shown in FIG. 6 is different from the conventional configuration shown in FIG. You can see that it performs the same operation.

In the configuration of FIG. 6, the circuit case of the conventional binary AND and arithmetic adder is taken as an example, but the present invention is similarly applicable to a logic circuit composed of a binary logic and an arithmetic multiplier.

Therefore, the present invention configured and operated as described above can save a large number of binary AND operators compared to the prior art, enabling economical and simple circuit configuration when implementing binary-multi-valued AND operations. It works.

Claims (4)

A multi-value signal input line for transmitting a multi-value logic signal r, which is an operation target provided from a multi-value logic value signal source, and a multi-value signal minimum value for fixedly transferring the minimum value signal Min of R of the multi-value signal; The multi-value logic signal and the minimum value signal from the multi-value signal input line and the multi-value signal input value input line are respectively input to the input terminal, and the control terminal receives a binary signal, which is another operation target, to the binary signal value input to the control terminal. And a selection means for selecting and outputting one of a minimum value signal and a multivalue signal of the multivalued logic signal according to the present invention. The binary-valued multiplication operator according to claim 1, wherein said selecting means comprises an electronic control switch having a control stage. The binary-valued multiplication operator of claim 1, wherein the selecting means comprises a 2: 1 multiplexer. The first step of receiving a binary logic value and a multivalued logic value as a logical operation target value, and receiving the minimum value of the multivalued logic value, and taking the minimum value of the multivalued logic value inputted when the binary logic value is '0' And a second step of taking a multivalued logic value and outputting the multivalued logic value as an arithmetic output value when the binary logic value is '1'.