KR930017200A - 접합전계효과 트랜지스터 및 그 제조방법 - Google Patents

접합전계효과 트랜지스터 및 그 제조방법 Download PDF

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Publication number
KR930017200A
KR930017200A KR1019920000590A KR920000590A KR930017200A KR 930017200 A KR930017200 A KR 930017200A KR 1019920000590 A KR1019920000590 A KR 1019920000590A KR 920000590 A KR920000590 A KR 920000590A KR 930017200 A KR930017200 A KR 930017200A
Authority
KR
South Korea
Prior art keywords
field effect
effect transistor
junction field
layer
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1019920000590A
Other languages
English (en)
Korean (ko)
Inventor
정태화
김영순
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019920000590A priority Critical patent/KR930017200A/ko
Priority to JP5002530A priority patent/JPH05275453A/ja
Priority to TW082100146A priority patent/TW234198B/zh
Priority to EP93300307A priority patent/EP0552067A2/en
Publication of KR930017200A publication Critical patent/KR930017200A/ko
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/611—Insulated-gate field-effect transistors [IGFET] having multiple independently-addressable gate electrodes influencing the same channel
    • H10D30/615—Insulated-gate field-effect transistors [IGFET] having multiple independently-addressable gate electrodes influencing the same channel comprising a MOS gate electrode and at least one non-MOS gate electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02392—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02395—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02433—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647—Lateral overgrowth
    • H01L21/0265—Pendeoepitaxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/051—Manufacture or treatment of FETs having PN junction gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/83—FETs having PN junction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/328—Channel regions of field-effect devices of FETs having PN junction gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1019920000590A 1992-01-16 1992-01-16 접합전계효과 트랜지스터 및 그 제조방법 Withdrawn KR930017200A (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019920000590A KR930017200A (ko) 1992-01-16 1992-01-16 접합전계효과 트랜지스터 및 그 제조방법
JP5002530A JPH05275453A (ja) 1992-01-16 1993-01-11 接合ｆｅｔ及びその製造方法
TW082100146A TW234198B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-01-16 1993-01-12
EP93300307A EP0552067A2 (en) 1992-01-16 1993-01-18 Field effect transistor and a fabricating method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920000590A KR930017200A (ko) 1992-01-16 1992-01-16 접합전계효과 트랜지스터 및 그 제조방법

Publications (1)

Publication Number Publication Date
KR930017200A true KR930017200A (ko) 1993-08-30

Family

ID=19327989

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920000590A Withdrawn KR930017200A (ko) 1992-01-16 1992-01-16 접합전계효과 트랜지스터 및 그 제조방법

Country Status (4)

Country Link
EP (1) EP0552067A2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPH05275453A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR930017200A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
TW (1) TW234198B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100351888B1 (ko) * 1997-12-31 2002-11-18 주식회사 하이닉스반도체 반도체소자의 배선구조 및 형성방법

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2412009B (en) * 2004-03-11 2006-01-25 Toshiba Research Europ Limited A semiconductor device and method of its manufacture
US8779554B2 (en) * 2012-03-30 2014-07-15 Taiwan Semiconductor Manufacturing Company, Ltd. MOSFETs with channels on nothing and methods for forming the same
JPWO2022230293A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 2021-04-30 2022-11-03

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4295267A (en) * 1980-07-18 1981-10-20 Trw Inc. Two-mask VJ-FET transistor structure
US4499481A (en) * 1983-09-14 1985-02-12 The United States Of America As Represented By The Secretary Of The Navy Heterojunction Schottky gate MESFET with lower channel ridge barrier
JPS61260679A (ja) * 1985-05-15 1986-11-18 Fujitsu Ltd 電界効果トランジスタ
FR2631744A1 (fr) * 1988-04-29 1989-11-24 Thomson Csf Transistor a effet de champ, son procede de realisation, et procede d'integration monolithique d'un transistor a effet de champ et d'un laser

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100351888B1 (ko) * 1997-12-31 2002-11-18 주식회사 하이닉스반도체 반도체소자의 배선구조 및 형성방법

Also Published As

Publication number Publication date
EP0552067A3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1994-12-21
JPH05275453A (ja) 1993-10-22
TW234198B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1994-11-11
EP0552067A2 (en) 1993-07-21

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Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19920116

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19920116

Comment text: Request for Examination of Application

PG1501 Laying open of application
E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 19941213

Patent event code: PE09021S01D

PC1202 Submission of document of withdrawal before decision of registration

Comment text: [Withdrawal of Procedure relating to Patent, etc.] Withdrawal (Abandonment)

Patent event code: PC12021R01D

Patent event date: 19941228

WITB Written withdrawal of application