KR930008168B1 - Video crispener - Google Patents

Abstract

The digital video signal crispener includes a first differentiator for digitally differntiating an input video signal, a coring seciton for reshaping the first differentiated waveform, an absolute value converter for converting the reshaped first differentiated waveform into an absolute value, a second differentiator for digitally redifferentiating the reshaped first differentiated waveform, an amplifying limiter for amplifying the second differentiated output and limiting it at a predetermined level, a multiplier for multiplying the output of the absolute value converter and the output of the amplifying limiter, a delay controller for delaying the input video signal for a time, and an adder for summing the output of the delay controller and the output of the multiplier, thereby obtaining a digital video signal from a limited frequency band to wide frequency band and removing overshoot and preshoot.

Description

Video signal crispner

1 is a schematic diagram of Crispner.

2 is an operational waveform diagram of FIG.

3 is a response waveform diagram of the frequency of the differentiator.

4 is an operational waveform diagram of a digital crispner.

5 is a block diagram of the present invention.

6 is a schematic diagram of an embodiment of the first or second differentiator during the fifth step.

7 is a configuration diagram of an embodiment of the coring portion during the fifth.

8 is a configuration diagram of another embodiment of the coring portion during the fifth embodiment.

9 is an operational waveform analysis diagram of FIG.

10 is an operational waveform analysis diagram.

11 is a schematic diagram of another embodiment of a digital crispner.

12 is a configuration diagram of an embodiment of the coring portion during the eleventh.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal crispner in a video signal processing system, and more particularly to a digital video signal crispner.

In general, a method of extending a band range of a signal having a limited bandwidth can be broadly divided into two methods.

First, there is a method of detecting a high frequency component by a transition of a signal and adding it to the original signal. This method has the disadvantage of overshoot and undershoot, which is only valid when extending the bandwidth of signals with relatively small amplitudes.

Second is Crispener. Crispner is a transition-processing device whose purpose is to generate non-linear process components of frequency components higher than the bandwidth upperlimit of the input signal. It also serves to reduce the transition without undershoots and plastics.

Faroudja's proposed "Video Crispener" (US patent 4,030,121) shows a first signal differentiator (1) and a delay unit as shown in FIG. 1 to display a video signal to be crispened as shown in FIG. (7), and as a result, the first differential signal 1 obtains a first differential signal waveform as shown in FIG. 2B, and the first differential signal is differentiated again in the second derivative 2 To obtain a second derivative signal waveform as shown in (2c). The second differential signal is then applied to the amplifier 4 via the limiter 3 to obtain a waveform such as clipped (2d).

In addition, the first differential signal is applied to the absolute value unit 5 using a full wave rectifier.

The outputs of the amplifier 4 and the absolute value section 5 are multiplied by the multiplier 6 and then applied to the adder 8 and summed with the original signal delay output from the delay section 7 as shown in (2g). You will get an output video signal that has been crimped.

This crispner output has no undershoot overshoot if the delay correction is accurate and has a narrow transition proportional to the transition of the input signal. On the other hand, the fact that the output waveform 2b of the first differentiator 1 substantially coincides with the start point and end point of the transition of the input signal is a characteristic of the analog implementation, and thus, undershoot and overshoot can be prevented.

On the other hand, the devices required for the digital implementation of Crispner are as follows.

The digital implementation in the first differentiator 1 of FIG. 1 can be expressed by the following equations by definition. In analog, the definition of derivative is

If you digitalize this

ego,

= T: sampling period,

Since tα = nT

y '(nT) ET- ¹ [y [nT] -y [(n-1) T]]

Similarly for the second derivative

y "(nT) ET ^-3 {y (n + 1) T-2y (nT) + y [(n-1) T]}

Can be expressed as: Therefore, the differential in a digital system is defined as follows.

y (n) = x (n) -x (n-1)

The magnitude response to the frequency of these differentiators is different from the sampling period And is proportional to the frequency when the frequency is much smaller than 2 fse (fsc: 3.58 MHZ), and this relationship is shown in FIG.

But in this case, the group delay is when T is the sampling period As such, it is impossible to create a digital delay.

As a solution of this, the derivative of 2T intervals is obtained, and the group delay T is obtained.

As a result, the differentiator is expressed as y (n) = x (n) -x (n-2).

Here, when the basic configuration circuit of Crispner of FIG. 1 is implemented as a digital circuit, the output waveform for each point is shown, where (4a) is an input signal waveform, and (4b) is a first differential waveform. It can be expressed as (4c) is a second derivative waveform, with respect to the input signal. It can be expressed as

(4d) is a waveform of limited amplification, (4e) is an absolute value conversion waveform of the first derivative, (4f) is a waveform inverted by multiplying the (4e) and (4d) waveforms, and (4g) Shows the final output.

The sampling frequency is 4fsc, the input signal is a ramp signal, the delay is controlled, each point represents a pixel, and the frequency of the input signal is calculated as described below. Becomes

That is, 5 (point) x 70 nsec = 350 nsec.

Therefore, a transition of 2 × 350 nsec = 700 nsec You will get the same result.

The final clock waveform shown in (4g) of FIG. 4 shows undershoot and overshoot, and shows a nonlinear transition.

Undershoot and overshoot occur because the waveform of the first derivative extends outside the start and end points of the transition.

Also, in the case of nonlinear transition, the transition part in the middle of the second differential waveform is due to the nonlinear relationship.

Accordingly, an object of the present invention is to provide a method of removing overshoot and undershoot by performing a coring process on the first derivative waveform.

Hereinafter, the present invention will be described with reference to the accompanying drawings.

5 is a block diagram of the present invention, which includes a first differentiator 9 for digitally differentiating an input video signal, a coring unit 10 for reforming the first differential waveform, and the reformed first differential waveform. An absolute value converter 12 for converting the absolute value, a second derivative 13 for digitally differentiating the reconstructed first differential waveform, and an amplification limiter for amplifying and limiting the second differentiated output at a constant level ( 16), a multiplier 15 multiplying the output of the absolute value converter 12 and the output of the amplification limiter 16, a delay adjuster 11 for predetermined delay of the input video signal, and the delay adjuster ( 11) an adder 14 which adds an output and an output of the multiplier 15.

FIG. 6 is an example of the first and second differentiators 9 and 13 during the fifth step. The first delay unit 17 delays an input video signal by one clock and the output signal of the first delay unit 17. And a subtractor 19 for outputting the difference between the input video signal and the output signal of the second delayer 18.

FIG. 7 is a block diagram of the coring unit 10 during a fifth step, in which a third delayer 20 for delaying a first differential signal and a fourth delayer for delaying an output of the third delayer 20 are predetermined. (21) and the first differential signal and the fourth delayer (21) output signal are inputted to output the minimum value if both input data are positive and the maximum value if negative, and zero if the sign is different. It consists of the maximum or minimum value selection part 22 which outputs.

8 is a diagram illustrating an example of a coring part of FIG. 7, which includes a third delayer 20 delaying a first differential signal and a fourth delayer delaying an output signal of the third delayer 20. 21), and a comparator 25 for comparing the first differential signal and the fourth delayer 21 output, and an exclusive logical combination of the code bits of the first differential signal and the fourth delayer 21 output. A first exclusive oragate 27 and a second exclusive oragate 28 for exclusively combining the code bits of the fourth delayer 21 output signal with the comparator 25 output signal; The multiplexer 26 selectively outputs the first differential signal or the fourth delayer 21 output signal according to the output state of the second exclusive orifice 28.

9 is a waveform analysis diagram of an embodiment of a coring unit, where 9a) is a first order differential waveform, 9b) is a Z- ² delay waveform, and 9c) is a coring unit output.

FIG. 10 is a point-by-point waveform analysis diagram of the digital crispner according to FIG. 5, in which 10a) is an input video signal waveform, 10b) is a first order differential waveform, 10c) is a corrugated signal waveform, and 10d) Is a second differential signal waveform, 10e) is an absolute waveform of the corrugated signal, 10f) is an amplified limited signal waveform, and 10g) is a waveform inverting the multiplication result of the above 10e) waveform and (10f), 10h ) Are addition waveforms of the above (10a) and (10g) waveforms.

11 is a circuit diagram of another embodiment of a digital crispner, comprising: a first differential 29 for digitally differentiating an input video signal, an absolute value converter 31 for absolute conversion of the first differential waveform, and a first differential waveform of FIG. A code correction unit 33 for correcting a code, a coring unit 32 for reordering the output signal of the absolute value conversion unit 31, an output signal of the coring unit 32, and an output signal of the code correction unit 33; The second derivative (36) for digitally differentiating again, an amplification limiting unit (37) for amplifying and outputting the second differentiated signal to a predetermined level, the output signal of the coring unit (32) and the amplifying limiting unit ( 37. A multiplier 35 for multiplying an output signal, a delay adjusting unit 30 for predetermined delay of the input video signal, an adder for adding the multiplier 35 output signal and the delay adjusting unit 30 output signal ( 34).

12 is a detailed block diagram of an embodiment of a coring part during an eleventh, and includes fifth and sixth delayers 38 and 39 for sequentially delaying first derivative signals, the first differential signal, and the sixth delay. And a minimum value selector 40 for outputting the minimum value of the output signal.

The present invention will be described in detail based on the above configuration.

In FIG. 5, when the composite video signal is first differentiated from the first differentiator 9 and input to the coring unit 10, the coring unit 10 reshapes the first differential waveform.

The first differentiator 9 and the second differentiator 13 described later may include two latches 17 and 18 and a subtractor 19, as shown in FIG.

The rearranged coring unit 10 output signal is applied to the absolute value converting unit 12 and the secondary differentiator 13 to be absolute converted or differentially differentiated, respectively.

The signal output from the second differentiator 13 is multiplied by the absolute value converting section 12 output signal by the multiplier 15 via the amplification limiting section 16.

The output signal of the multiplier 15 is applied to the adder 14 and added to the delay component of the composite video signal to which the adder 14 is applied via the delay adjuster 11 to generate a final crispner output.

Here, the coring unit 10 may be configured as shown in FIG. 7 or 8. First, as shown in FIG. 7, the two retarders 20 and 21 and the maximum or minimum value selector 22 are illustrated. In case of, the minimum value is selected between two data if the data input between two clock delays and the current input signal is positive for the first differential waveform to be input, and the maximum value is selected if the data is negative.

If the sign of the current data and the two clock delayed data are different, a zero value is given and the waveform analysis thereof is shown in FIG. 9.

That is, P3 to P7 and P15 to P19 of the pixels having the first differential waveform as shown in (9a) and the waveform having the second differential delayed by 9 clock delay (9b) are both positive data, so the maximum or minimum value selector ( 20) select the minimum value, and P9 to P13 select the maximum value because both data are negative. On the other hand, in P8 and P14, the sign of the two data is different so that the output is zero regardless of the data.

The reason why the output is zeroed for data with different signs is that there is a possibility that nonlinear characteristics are generated when the maximum or minimum value is selected.

In this method, the use of two clock delayed data in the current data is because the first and second derivatives are processed between the two clock delayed data and the current data. In the ring, the maximum or minimum value must be selected between the current data and the 4 clock delayed data.

A specific embodiment of the coring circuit for performing the above operation is a coring circuit having the configuration as shown in FIG.

The first differential waveform data and the second clock delayed data are compared in the comparator 25, and the comparison result and the sign bit of any one of the two input data are exclusive-OR in the first exclusive oragate 27. To control the multiplexer 26.

The first exclusive OR result causes the maximum value to be selected when the data is negative and the minimum value when the data is negative.

The multiplexer 26 output is zeroed via an exclusive oragate 27 to detect the case where the sign of the two data is reversed.

When the first and second differentiators have the characteristics of H (Z) = 1-Z- ² , and the characteristics of the coring part 10 have the configuration of FIG. 7 or 8 as described above, FIG. If a waveform block result as shown in FIG. 10 can be obtained, a waveform analysis result of each point of the digital crispner as shown in FIG. 10 is obtained.

An input waveform such as (10a) is a case where the transition has a frequency component of about 1.8 MHZ, and an example in which the transition direction is continuously changed in order to grasp the characteristics of the coring unit 10 will be given. The analogy to a real TV picture is a continuous band in the vertical direction. The first differential waveform for the input waveform is as shown in (10b), and in the case of analog, the differential waveform does not cause undershoot or overshoot because it enters almost exactly between the start point and the end point of the transition of the input waveform. In some cases, the differential waveform is not as smooth as analog processing because of the limitations of the differential itself.

The reason is that in analog derivatives, the derivative points are continuous, whereas in digital, the derivative points are discontinuous by the sampling frequency and the sampling points are considerably separated. Therefore, when the first differential waveform is re-formed through the coring unit 10, an error-free waveform is obtained as shown by (10C).

When the rearranged waveform is always positive, the waveform is the same as 10e through the absolute value converting unit 12, and the second derivative of the rearranged waveform obtains the waveform as 10d.

When the secondary waveform is amplified by the amplification limiter 16 and cut at an appropriate level, a waveform such as 10f is generated.

As shown in (10f), the maximum value of the output waveform of the limited amplifier 16 performs the X1 operation in the multiplier 15, and the minimum value performs the X-1 operation.

When the absolute value converter 12 output is multiplied by the output of the limiting amplifier 16 and then inverted, the waveform becomes 10g. If the waveform (10g) adds data from the first input signal delayed and adjusted by the adder 14 via the line of the delay adjuster 11, the result is the same as that of the final output 10h.

Comparing the (10h) waveform and the (10a) waveform, the waveform of the (10a) waveform has four sampled pixels during the transition period, whereas the two of the (10h) waveform are only two.

In other words, the transition time The frequency component is changed from 1.8MHZ to 3.58MHZ.

Next, another embodiment of the digital crispner will be described with reference to FIGS. 11 and 12.

The components are the same as those of the embodiment of Crispner shown in FIG. 7 described above, but the connection relationship is somewhat different, and the code correction unit 33 is further provided.

That is, first outputting the first differentiator 29 output signal to the absolute value converting unit 31 and then converting the absolute value first, and then applying the absolute converted signal to the coring unit 32, and outputting the first differentiator 29 output signal. The code is corrected to the code corrector 33, and then corrected to the second differentiator 36.

The second differentiator 36 differentiates the signals input from the coring unit 32 and the code correction unit 33 and applies them to the amplification limiting unit 37 so that the signal limited to a predetermined level after amplification is multiplier 35. Is multiplied by the output of the coring unit 32.

The output signal of the multiplier 35 is added to the composite video signal input delayed by the adder 34 to generate a final crispner output as in the case of the above-described embodiment. In addition, the waveform for each point coincides with the waveform for each point on the basic configuration of the digital crispner shown in FIG.

That is, a in FIG. 11 a → 5 in FIG.

B of FIG. 11 → b of FIG.

D of FIG. 11 → d of FIG.

E of FIG. 11 → e of FIG.

F in FIG. 11 → f in FIG.

G of FIG. 11 → g of FIG.

H of FIG. 11 → h of FIG.

However, according to such a configuration, unlike the case of the crispner of FIG. 5 described above, the coring part 32 only needs to select a minimum value between the data currently input and the data delayed by two clocks, as shown in FIG.

This is because the output of the derivative input to the coring unit 32 is always positive.

As described above, by digitally implementing a crispner that reduces the transition time of the video signal, it is advantageous not only to obtain a digital video signal having a wide frequency band from a limited frequency band but also to eliminate overshoot and preshoot. .

Claims (7)

A video signal processing system comprising: a first differential (9) for digitally differenting an input video signal, a coring unit (10) for reordering the first differential waveform, and an absolute value conversion for the reconstructed primary differential waveform An absolute value converter 12, a second derivative 13 for digitally differentiating the reconstructed first differential waveform, an amplification limiter 16 for amplifying and limiting the second differentiated output at a constant level; A multiplier 15 multiplying the output of the absolute value converter 12 and the output of the amplification limiter 16, a delay adjuster 11 for predetermined delay of the input video signal, and an output of the delay adjuster 11. And an adder (14) that adds the output of the multiplier (15). The method of claim 1, wherein the first and second differentiators (9) and the second differentiator (13) comprises: a first delay (17) for delaying the input video signal by one clock and an output signal of the first delay (17). And a subtractor (19) for outputting a difference between the input video signal and the output signal of the second delayer (18). 3. The method of claim 2, wherein the first and second differentiators 9 and 13 further comprise a delay circuit for delaying the output of the second delayer 18 by two clocks to subtract a four clock delayed signal from the input video signal. And digital video signal crispner. The third delayer 20 according to claim 2 or 3, wherein the coring unit 10 delays the first differential signal by a predetermined delay, and the fourth delayer delays the output of the third delayer 20 by a predetermined delay. (21) and the first differential signal and the fourth delayer (21) output signal are inputted to output the minimum value if both input data are positive and the maximum value if negative, and zero if the sign is different. Digital image signal crispner, characterized in that consisting of a maximum or minimum value selector 22 for outputting. 5. A comparator (25) according to claim 4, wherein a maximum or minimum value selector (22) compares the output of said first differential signal and said fourth delayer (21), said first differential signal and said fourth delayer. (21) exclusive logic of a first exclusive oragate 27 which exclusively combines the code bits of each output signal, and the code bits of the output signal of the fourth delayer 21 and the output signal of the comparator 25; Selectively outputting the first differential signal or the fourth delayer 21 output signal according to the output state of the second exclusive orifice 28 and the second exclusive oragate 28 to be combined And a multiplexer (26). In a video signal processing system, a first derivative (29) for digitally differenting an input video signal, an absolute value converter (31) for absolute conversion of the first differential waveform, and a sign correction for correcting the code of the first differential waveform Digital re-differentiation of the chief part 33, the coring part 32 which reorders the absolute value converting part 31 output signal, and the coring part 32 output signal and the code correction part 33 output signal again. Multiplying the differential differentiator 36, an amplification limiting portion 37 for amplifying the second derivative signal and limiting the output to a predetermined level, and outputting the output signal of the coring portion 32 and the amplifying limiting portion 37 Multiplier 35; a delay generator 30 for delaying the input video signal; and an adder 34 for adding the multiplier 35 output signal and the delay adjuster 30 output signal. Digital video signal crispner. 7. The method of claim 6, further comprising outputting the minimum values of the fifth and sixth delays (38, 39) for sequentially delaying the first differential signal and the output signal of the first differential signal and the sixth delay (39). And a minimum value selector (40).