KR930007236Y1 - High voltage stabilization circuit for fbt - Google Patents

High voltage stabilization circuit for fbt Download PDF

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KR930007236Y1
KR930007236Y1 KR2019910011851U KR910011851U KR930007236Y1 KR 930007236 Y1 KR930007236 Y1 KR 930007236Y1 KR 2019910011851 U KR2019910011851 U KR 2019910011851U KR 910011851 U KR910011851 U KR 910011851U KR 930007236 Y1 KR930007236 Y1 KR 930007236Y1
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voltage
fbt
high pressure
circuit
output
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KR2019910011851U
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Korean (ko)
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KR930003878U (en
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서인영
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삼성전기주식회사
황선두
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/18Generation of supply voltages, in combination with electron beam deflecting
    • H04N3/185Maintaining dc voltage constant
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F38/00Adaptations of transformers or inductances for specific applications or functions
    • H01F38/42Flyback transformers
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12035Zener diode

Abstract

내용 없음.No content.

Description

FBT의 고압안정화회로FBT high pressure stabilization circuit

제1도는 종래의 회로 구성도.1 is a conventional circuit configuration diagram.

제2도는 본 고안의 회로 구성도.2 is a circuit diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

20 : 수평출력회로 30 : FBT20: horizontal output circuit 30: FBT

40 : 전압변환회로 Q1-Q5: 트랜지스터40: voltage conversion circuit Q 1- Q 5 : transistor

본 고안은 TV수상기의 수평출력회로에 연결된 FBT의 고압안정화 회로에 관한 것이다.The present invention relates to a high-pressure stabilization circuit of the FBT connected to the horizontal output circuit of the TV receiver.

종래에는 제1도에 도시된 도시와 같은 고압안정화 회로에서 수평출력회로(20)에 연결된 FBT(30)로부터 발생된 고압(HV)을 전압검출수단(R5)(R6)에 의해 검출하고, 이 검출전압을 증폭트렌지스터(Q3)에 입력하여 일정레벨까지 증폭한 후 저압변환회로(40)에 입력하여 필요한 전압으로 변환하였다.Conventionally, in the high pressure stabilization circuit as shown in FIG. 1, the high voltage HV generated from the FBT 30 connected to the horizontal output circuit 20 is detected by the voltage detecting means R 5 and R 6 . The detected voltage was input to the amplifying transistor Q 3 to be amplified to a predetermined level, and then input to the low voltage conversion circuit 40 to convert it into a required voltage.

상기 저압변환회로(40)의 출력전압으로 제어용 트랜지스터(Q2)를 동작시켜 콜렉터에 연결된 저항(R2)에 의해 메인 트랜지스터(Q1)의 베이스전압을 제어하였다.The control transistor Q 2 was operated with the output voltage of the low voltage conversion circuit 40 to control the base voltage of the main transistor Q 1 by the resistor R 2 connected to the collector.

상기 메인 트랜지스터(Q1)의 출력전압은 상기 FBT(30)의 입력전압이 되어 FBT의 전압을 조절하였다.The output voltage of the main transistor Q 1 becomes the input voltage of the FBT 30 to adjust the voltage of the FBT.

이때, 만일 상기 FBT(30)의 출력고압(HV)이 변화하면 이 고압변동량은 상기 고압 검출수단(R5)(R6)에 검출되어 증폭 트랜지스터(Q3)에서 증폭되고, 이 증폭전압은 전압변환회로(40)를 통해 제어트랜지스터(Q2)의 조절로 고압변동량을 보상할 수 있는 정도로 되었다.At this time, if the output high voltage HV of the FBT 30 changes, the high voltage variation is detected by the high voltage detecting means R 5 and R 6 and amplified by the amplifying transistor Q 3 , and the amplified voltage is Through the voltage conversion circuit 40, the control transistor Q 2 is adjusted to compensate for the high voltage variation.

상기 제어트랜지스터(Q2)의 동작변화는 메인 트랜지스터(Q1)의 출력전압이 변환되어 FBT(30)의 고압변동량을 보상해준다.The operation change of the control transistor Q 2 compensates the high voltage variation of the FBT 30 by converting the output voltage of the main transistor Q 1 .

그러나, 이와 같은 종래의 고압안정화회로에서는 FBT의 2차 전류가 최소 OmA로부터 최대 1.5mA까지의 고압변동량을 보상하여 줌으로써 고압변동량이 커지게 된다.However, in the conventional high pressure stabilization circuit, the secondary current of the FBT compensates for the high voltage variation from the minimum OmA to the maximum 1.5 mA, thereby increasing the high pressure variation.

상기 고압변동량이 커지게 되면 고압안정화 회로자체가 민감한 회로가 되어야 한다.If the high pressure variation is large, the high pressure stabilization circuit itself should be a sensitive circuit.

이처럼, 민감한 회로를 구성하면 회로의 오동작 및 신뢰성 저하가 우려되고 회로주변의 미미한 변화에도 민감하게 동작할 염려가 있다.As such, the configuration of a sensitive circuit may cause a malfunction of the circuit and a decrease in reliability, and may operate sensitively to a slight change around the circuit.

따라서, 본 고안은 상기한 종래의 문제점을 해결하기 위하여 안출한 것으로, 본 고안의 목적은 FBT의 고압 변동량을 검출하고 증폭하여 상기 FBT의 2차 전압단에 연결된 트랜지스터에 공급함으로써 FBT에 추가전류를 공급하여 고압을 안정화시키는 FBT의 고압안정화 회로를 제공함에 있다.Therefore, the present invention has been devised to solve the above-mentioned conventional problems, and an object of the present invention is to detect and amplify the high-voltage fluctuation of the FBT, and supply an additional current to the FBT by supplying it to a transistor connected to the secondary voltage terminal of the FBT. It is to provide a high pressure stabilization circuit of FBT to stabilize the high pressure by supplying.

상기한 본 고안의 목적을 달성하기 위한 기술적 구성은, 고압출력변동을 검출하는 고압변동검출수단과, 상기 고압변동 검출수단에 의해 검출된 고압을 증폭하고 전압변환을 시켜 전류제어를 하는 전류제어 트랜지스터와, 상기 전류제어 트랜지스터의 전류를 상기 FBT의 2차측 코일 저압단에 인가시키는 FBT 전류제어수단과, 상기 FBT의 2차측 코일 저압단에 제너다이오드를 연결하여 상기 전류제어 트랜지스터의 에미터-콜렉터간 전압차를 조절하는 전압조절 수단과를 구비하여 FBT에 전류를 추가로 공급함으로써 출력고압을 안정화시키도록 한 것을 특징으로 한다.The technical configuration for achieving the object of the present invention is a high-voltage fluctuation detecting means for detecting a high-voltage output fluctuation, and a current control transistor for amplifying the high voltage detected by the high-voltage fluctuation detecting means and performing a voltage conversion to control the current FBT current control means for applying the current of the current control transistor to the secondary coil low voltage terminal of the FBT, and a zener diode connected to the secondary coil low voltage terminal of the FBT to emitter-collector of the current control transistor. And a voltage regulating means for adjusting the voltage difference to stabilize the output high pressure by additionally supplying current to the FBT.

이하 첨부된 도면에 의하여 본 고안의 바람직한 실시예를 상세히 설명하면 다음과 같다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

제2도는 본 고안의 회로구성도로서, 수평출력회로(20)가 FBT(30) 1차측 코일의 인단에 연결되고 타단에는 전원전압단(B+)이 연결된다.2 is a circuit configuration diagram of the present invention, in which the horizontal output circuit 20 is connected to the inner end of the primary coil of the FBT 30 and the power supply voltage terminal B + is connected to the other end thereof.

상기 FBT(30)의 2차측 코일의 일단에는 고압출력단(HV)이 연결되고 타단에는 제너다이오드(ZD)을 연결한다.One end of the secondary coil of the FBT 30 is connected to the high voltage output terminal (HV) and the other end is connected to the zener diode (ZD).

상기 고압출력단(HV)에는 고압변동을 검출하는 검출분압 저항(R9)(R10)을 직렬로 연결하고, 상기 두저항(R9)(R10)사이에 증폭 트랜지스터(Q5)의 베이스를 연결함과 콘덴서(C2)를 연결하여 접지시킨다.A high voltage output terminal (HV) is connected in series with a detection voltage divider (R 9 ) (R1 0 ) for detecting a high voltage change, and a base of the amplifying transistor (Q 5 ) between the two resistors (R 9 ) (R 10 ). Connect and ground the capacitor (C 2 ).

상기 트랜지스터(Q5)의 에미터는 저항(R8)을 통해 접지시킴과 아울러 전압변환회로(40)를 통하여 전류제어용 트랜지스터(Q4)의 베이스에 연결한다.The emitter of the transistor Q 5 is grounded through the resistor R 8 and connected to the base of the current control transistor Q 4 through the voltage conversion circuit 40.

상기 두 트랜지스터(Q4)(Q5)의 콜렉터는 공통으로 전원단(Vcc)에 연결하고 상기 트랜지스터(Q4)의 에미너는 저항(R7)을 통하여 상기 FBT(30) 2차측 코일의 타단에 연결한다.The collectors of the two transistors Q 4 and Q 5 are commonly connected to the power supply terminal Vcc and the emitter of the transistor Q 4 is connected to the other end of the secondary coil of the FBT 30 through the resistor R 7 . Connect to

이하 이들의 작용효과를 설명한다.The effect of these will be described below.

수평출력회로(20)의 동작에 따라 FBT(30)의 1차측 코일 전압이 2차측 코일로 유기된다.As the horizontal output circuit 20 operates, the primary coil voltage of the FBT 30 is induced to the secondary coil.

상기 2차측에 유기된 전압이 고압으로 고압출력단(HV)을 통해 출력된다.The induced voltage on the secondary side is output through the high voltage output terminal (HV) at high voltage.

이때, 상기 출력고압이 변동이 생겨 기준고압보다 높게되면 이 출력고압은 고압검출 저항(R9)(R10)에 의해 검출된다.At this time, when the output high pressure is higher than the standard high pressure due to the variation, the output high pressure is detected by the high pressure detecting resistor R 9 (R 10 ).

상기 검출된 고압변동량은 증폭트랜지스터(Q5)의 베이스에 인가되어 증폭되고, 이 증폭전압은 에미터를 통해 전압변화회로(40)에 입력된다.The detected high voltage variation is applied to the base of the amplifying transistor Q 5 and amplified, and the amplified voltage is input to the voltage change circuit 40 through an emitter.

상기 전압변환회로(40)는 상기 증폭전압을 입력으로 받아 출력전압으로 전류제어용 트랜지스터(Q4)의 베이스에 하이신호를 인가하여 도통시킨다.The voltage conversion circuit 40 receives the amplification voltage as an input and applies a high signal to the base of the current control transistor Q 4 as an output voltage to conduct the amplification voltage.

상기 트랜지스터(Q4)가 도통되면 콜렉터 전압이 베이스를 통해 에미터로 흘러 저항(R7)을 거쳐 상기 FBT(30)의 2차측 코일 타단에 인가된다.When the transistor Q 4 is conducted, a collector voltage flows through the base to the emitter and is applied to the other end of the secondary coil of the FBT 30 through the resistor R 7 .

여기에서, 상기 FBT(30)의 2차측 코일 타단에 인가되는 신호는 전류신호이다.Here, the signal applied to the other end of the secondary coil of the FBT 30 is a current signal.

상기 FBT(30)의 2차측 코일 타단에는 제너다이오드(ZD)가 연결되어 상기 트랜지스터(Q4)의 에미터-콜렉터 양단간의 전압차가 지나치게 커지지 않도록 한다.A zener diode ZD is connected to the other end of the secondary coil of the FBT 30 so that the voltage difference between the emitter and collector of the transistor Q 4 is not excessively increased.

상기 FBT(30)의 고압변동량이 크면 클수록 이 변동량은 상기 검출전압 (R9)(R10)에 의해 검출되어 증폭 트랜지스터(Q5)에서 증폭된 후 전압변환회로(40)로 입력된다.As the high voltage variation of the FBT 30 is larger, the variation is detected by the detection voltage R 9 (R 10 ), amplified by the amplifying transistor Q 5 , and then input to the voltage conversion circuit 40.

상기 전압변환회로(40)에 입력된 전압은 변환되는데 상기 FBT(30)의 출력고압이 올라가면 상기 전압변환회로(40)의 출력전압은 떨어지고, 상기 FBT(30)의 출력고압이 떨어지면 상기 전압변환회로(40)의 출력전압은 올라간다.The voltage inputted to the voltage conversion circuit 40 is converted. When the output high pressure of the FBT 30 rises, the output voltage of the voltage conversion circuit 40 falls, and when the output high pressure of the FBT 30 falls, the voltage conversion is performed. The output voltage of the circuit 40 goes up.

상기와 같이 변환된 전압변환회로(40)의 출력 전압은 전류제어 트랜지스터 (Q4)로 입력되어 FBT(30)의 2차측 코일 저압단이 전류를 공급하게 한다.The output voltage of the voltage conversion circuit 40 converted as described above is input to the current control transistor Q 4 to cause the secondary coil low voltage terminal of the FBT 30 to supply current.

따라서 FBT는 자체 전류증가로 인하여 출력고압이 안정화된다.Therefore, the FBT stabilizes the output high voltage due to the increase of its current.

상기 FBT의 출력고압이 안정화됨으로써 회로의 신뢰도가 증가되고, 부품수의 절감으로 인하여 제품의 사이즈가 감소되며 제품원가도 절감되는 유익한 효과가 있다.As the output high pressure of the FBT is stabilized, the reliability of the circuit is increased, the size of the product is reduced due to the reduction of the number of parts, and the cost of the product is also reduced.

Claims (1)

수평출력회로(20)에 FBT(30)를 연결하여 고압을 출력하는 회로에 있어서, 상기 고압출력변동을 검출하는 고압변동검출수단(R9)(R10)과, 상기 고압변동 검출수단에 의해 검출된 고압을 증폭하고 전압변환을 시켜 전류제어를 하는 전류제어에 트랜지스터 (Q4)와, 상기 전류제어 트랜지스터의 전류를 상기 FBT의 2차측 코일 저압단에 인가시키는 FBT전류제어수단과, 상기 FBT의 2차측 코일 저압단에 저너다이오드(ZD)를 연결하여 상기 전류제어 트랜지스터의 에미터-콜렉터간 전압차를 조절하는 전압조절 수단가를 구비하여 FBT에 전류를 추가로 공급흐름으로써 출력고압을 안정화 시키도록 한 것을 특징으로 하는 FBT의 고압 안정화회로.A circuit for outputting a high pressure by connecting the FBT 30 to the horizontal output circuit 20, the high pressure fluctuation detecting means for detecting the high pressure output variation (R 9 ) (R 10 ) and the high pressure fluctuation detecting means; A transistor Q 4 for amplifying the detected high voltage, converting the voltage, and performing current control, FBT current control means for applying a current of the current control transistor to the secondary coil low voltage stage of the FBT; A voltage adjusting means for controlling the voltage difference between the emitter and collector of the current control transistor by connecting a low voltage diode (ZD) to the secondary coil low voltage terminal of the current control transistor to stabilize the output high pressure by supplying additional current to the FBT. High pressure stabilization circuit of the FBT characterized in that.
KR2019910011851U 1991-07-26 1991-07-26 High voltage stabilization circuit for fbt KR930007236Y1 (en)

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KR2019910011851U KR930007236Y1 (en) 1991-07-26 1991-07-26 High voltage stabilization circuit for fbt

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KR2019910011851U KR930007236Y1 (en) 1991-07-26 1991-07-26 High voltage stabilization circuit for fbt

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KR930007236Y1 true KR930007236Y1 (en) 1993-10-13

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