KR930001749B1 - 프로그래머블 논리회로 - Google Patents
프로그래머블 논리회로 Download PDFInfo
- Publication number
- KR930001749B1 KR930001749B1 KR1019900002255A KR900002255A KR930001749B1 KR 930001749 B1 KR930001749 B1 KR 930001749B1 KR 1019900002255 A KR1019900002255 A KR 1019900002255A KR 900002255 A KR900002255 A KR 900002255A KR 930001749 B1 KR930001749 B1 KR 930001749B1
- Authority
- KR
- South Korea
- Prior art keywords
- signal
- input
- output
- logic
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1731—Optimisation thereof
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP01-042402 | 1989-02-22 | ||
| JP1042402A JPH02222217A (ja) | 1989-02-22 | 1989-02-22 | プログラマブル論理回路 |
| JP89-42402 | 1989-02-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR900013720A KR900013720A (ko) | 1990-09-06 |
| KR930001749B1 true KR930001749B1 (ko) | 1993-03-12 |
Family
ID=12635075
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019900002255A Expired - Fee Related KR930001749B1 (ko) | 1989-02-22 | 1990-02-22 | 프로그래머블 논리회로 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5027012A (https=) |
| EP (1) | EP0384429A3 (https=) |
| JP (1) | JPH02222217A (https=) |
| KR (1) | KR930001749B1 (https=) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IT1250908B (it) * | 1990-06-22 | 1995-04-21 | St Microelectronics Srl | Struttura di porta d'uscita a tre stati particolarmente per circuiti integrati cmos |
| US5270587A (en) * | 1992-01-06 | 1993-12-14 | Micron Technology, Inc. | CMOS logic cell for high-speed, zero-power programmable array logic devices |
| US5294846A (en) * | 1992-08-17 | 1994-03-15 | Paivinen John O | Method and apparatus for programming anti-fuse devices |
| US5399925A (en) * | 1993-08-02 | 1995-03-21 | Xilinx, Inc. | High-speed tristate inverter |
| US5424655A (en) * | 1994-05-20 | 1995-06-13 | Quicklogic Corporation | Programmable application specific integrated circuit employing antifuses and methods therefor |
| JPH0993118A (ja) * | 1995-09-22 | 1997-04-04 | Kawasaki Steel Corp | パストランジスタ論理回路 |
| US6097221A (en) | 1995-12-11 | 2000-08-01 | Kawasaki Steel Corporation | Semiconductor integrated circuit capable of realizing logic functions |
| US5886541A (en) * | 1996-08-05 | 1999-03-23 | Fujitsu Limited | Combined logic gate and latch |
| US6191607B1 (en) * | 1998-09-16 | 2001-02-20 | Cypress Semiconductor Corporation | Programmable bus hold circuit and method of using the same |
| JP3555080B2 (ja) | 2000-10-19 | 2004-08-18 | Necエレクトロニクス株式会社 | 汎用ロジックモジュール及びこれを用いたセル |
| US7075976B1 (en) | 2001-03-19 | 2006-07-11 | Cisco Technology, Inc. | Tri-state transmitter |
| JP4156864B2 (ja) | 2002-05-17 | 2008-09-24 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
| JP2003338750A (ja) | 2002-05-20 | 2003-11-28 | Nec Electronics Corp | 汎用ロジックセル、これを用いた汎用ロジックセルアレイ、及びこの汎用ロジックセルアレイを用いたasic |
| JP2005064701A (ja) * | 2003-08-08 | 2005-03-10 | Rohm Co Ltd | クロック入出力装置 |
| US9876501B2 (en) | 2013-05-21 | 2018-01-23 | Mediatek Inc. | Switching power amplifier and method for controlling the switching power amplifier |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3439185A (en) * | 1966-01-11 | 1969-04-15 | Rca Corp | Logic circuits employing field-effect transistors |
| US4124899A (en) * | 1977-05-23 | 1978-11-07 | Monolithic Memories, Inc. | Programmable array logic circuit |
| US4558236A (en) * | 1983-10-17 | 1985-12-10 | Sanders Associates, Inc. | Universal logic circuit |
| US4620117A (en) * | 1985-01-04 | 1986-10-28 | Advanced Micro Devices, Inc. | Balanced CMOS logic circuits |
| US4706216A (en) * | 1985-02-27 | 1987-11-10 | Xilinx, Inc. | Configurable logic element |
| US4710649A (en) * | 1986-04-11 | 1987-12-01 | Raytheon Company | Transmission-gate structured logic circuits |
| US4910417A (en) * | 1986-09-19 | 1990-03-20 | Actel Corporation | Universal logic module comprising multiplexers |
| US4758745B1 (en) * | 1986-09-19 | 1994-11-15 | Actel Corp | User programmable integrated circuit interconnect architecture and test method |
| US4749886A (en) * | 1986-10-09 | 1988-06-07 | Intersil, Inc. | Reduced parallel EXCLUSIVE or and EXCLUSIVE NOR gate |
| JPS63260319A (ja) * | 1987-04-17 | 1988-10-27 | Ricoh Co Ltd | 論理集積回路装置 |
| US4749887A (en) * | 1987-06-22 | 1988-06-07 | Ncr Corporation | 3-input Exclusive-OR gate circuit |
| US4912348A (en) * | 1988-12-09 | 1990-03-27 | Idaho Research Foundation | Method for designing pass transistor asynchronous sequential circuits |
-
1989
- 1989-02-22 JP JP1042402A patent/JPH02222217A/ja active Granted
-
1990
- 1990-02-16 US US07/480,898 patent/US5027012A/en not_active Expired - Fee Related
- 1990-02-21 EP EP19900103330 patent/EP0384429A3/en not_active Ceased
- 1990-02-22 KR KR1019900002255A patent/KR930001749B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| EP0384429A2 (en) | 1990-08-29 |
| EP0384429A3 (en) | 1990-12-05 |
| JPH0586091B2 (https=) | 1993-12-09 |
| JPH02222217A (ja) | 1990-09-05 |
| KR900013720A (ko) | 1990-09-06 |
| US5027012A (en) | 1991-06-25 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| R17-X000 | Change to representative recorded |
St.27 status event code: A-3-3-R10-R17-oth-X000 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| G160 | Decision to publish patent application | ||
| PG1605 | Publication of application before grant of patent |
St.27 status event code: A-2-2-Q10-Q13-nap-PG1605 |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
|
| PR1002 | Payment of registration fee |
St.27 status event code: A-2-2-U10-U11-oth-PR1002 Fee payment year number: 1 |
|
| LAPS | Lapse due to unpaid annual fee | ||
| PC1903 | Unpaid annual fee |
St.27 status event code: A-4-4-U10-U13-oth-PC1903 Not in force date: 19960313 Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE |
|
| PC1903 | Unpaid annual fee |
St.27 status event code: N-4-6-H10-H13-oth-PC1903 Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE Not in force date: 19960313 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |
|
| PN2301 | Change of applicant |
St.27 status event code: A-5-5-R10-R13-asn-PN2301 St.27 status event code: A-5-5-R10-R11-asn-PN2301 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |