KR910008415B1 - 센트로닉스 호환 병렬 접속시 응답 및 비지신호 발생회로 - Google Patents

센트로닉스 호환 병렬 접속시 응답 및 비지신호 발생회로 Download PDF

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Publication number
KR910008415B1
KR910008415B1 KR1019890011724A KR890011724A KR910008415B1 KR 910008415 B1 KR910008415 B1 KR 910008415B1 KR 1019890011724 A KR1019890011724 A KR 1019890011724A KR 890011724 A KR890011724 A KR 890011724A KR 910008415 B1 KR910008415 B1 KR 910008415B1
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KR
South Korea
Prior art keywords
signal
busy
response
cpu
generating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019890011724A
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English (en)
Korean (ko)
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KR910005172A (ko
Inventor
오수환
Original Assignee
삼성전자 주식회사
정용문
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Publication date
Application filed by 삼성전자 주식회사, 정용문 filed Critical 삼성전자 주식회사
Priority to KR1019890011724A priority Critical patent/KR910008415B1/ko
Priority to US07/565,477 priority patent/US5388216A/en
Priority to FR9010340A priority patent/FR2651626A1/fr
Priority to DE4025975A priority patent/DE4025975A1/de
Priority to GB9018099A priority patent/GB2236932B/en
Publication of KR910005172A publication Critical patent/KR910005172A/ko
Application granted granted Critical
Publication of KR910008415B1 publication Critical patent/KR910008415B1/ko
Priority to SG152994A priority patent/SG152994G/en
Priority to HK10095A priority patent/HK10095A/xx
Expired legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40Network security protocols
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0004Parallel ports, e.g. centronics

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  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Information Transfer Systems (AREA)
KR1019890011724A 1989-08-17 1989-08-17 센트로닉스 호환 병렬 접속시 응답 및 비지신호 발생회로 Expired KR910008415B1 (ko)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1019890011724A KR910008415B1 (ko) 1989-08-17 1989-08-17 센트로닉스 호환 병렬 접속시 응답 및 비지신호 발생회로
US07/565,477 US5388216A (en) 1989-08-17 1990-08-10 Circuit for controlling generation of an acknowledge signal and a busy signal in a centronics compatible parallel interface
FR9010340A FR2651626A1 (en) 1989-08-17 1990-08-14 Circuit for causing generation of a reception-acknowledgement signal and of a busy signal in a Centronics-compatible parallel interface
DE4025975A DE4025975A1 (de) 1989-08-17 1990-08-16 Schaltung zur steuerung der erzeugung eines bestaetigungssignals und eines belegtsignals in einer centronics-kompatiblen parallelschnittstelle
GB9018099A GB2236932B (en) 1989-08-17 1990-08-17 Controlling generation of an acknowledge signal and a busy signal in an interface
SG152994A SG152994G (en) 1989-08-17 1994-10-20 Controlling generation of an acknowledge signal and a busy signal in an interface
HK10095A HK10095A (en) 1989-08-17 1995-01-26 Controlling generation of an acknowledge signal and a busy signal in an interface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890011724A KR910008415B1 (ko) 1989-08-17 1989-08-17 센트로닉스 호환 병렬 접속시 응답 및 비지신호 발생회로

Publications (2)

Publication Number Publication Date
KR910005172A KR910005172A (ko) 1991-03-30
KR910008415B1 true KR910008415B1 (ko) 1991-10-15

Family

ID=19289014

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890011724A Expired KR910008415B1 (ko) 1989-08-17 1989-08-17 센트로닉스 호환 병렬 접속시 응답 및 비지신호 발생회로

Country Status (2)

Country Link
KR (1) KR910008415B1 (https=)
FR (1) FR2651626A1 (https=)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3751609T2 (de) * 1986-09-01 1996-07-04 Nippon Electric Co Datenprozessor mit Hochgeschwindigkeitsdatenübertragung.

Also Published As

Publication number Publication date
FR2651626B1 (https=) 1993-01-08
FR2651626A1 (en) 1991-03-08
KR910005172A (ko) 1991-03-30

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