KR900003829B1 - 패케이지 구조를 갖는 반도체장치 제조방법 - Google Patents

패케이지 구조를 갖는 반도체장치 제조방법 Download PDF

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Publication number
KR900003829B1
KR900003829B1 KR1019870002470A KR870002470A KR900003829B1 KR 900003829 B1 KR900003829 B1 KR 900003829B1 KR 1019870002470 A KR1019870002470 A KR 1019870002470A KR 870002470 A KR870002470 A KR 870002470A KR 900003829 B1 KR900003829 B1 KR 900003829B1
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KR
South Korea
Prior art keywords
pellets
lead base
pellet
semiconductor chip
package structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019870002470A
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English (en)
Korean (ko)
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KR870009466A (ko
Inventor
도시오 하마노
시게오 나쓰메
Original Assignee
후지쓰가부시끼가이샤
야마모도 다꾸마
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Application filed by 후지쓰가부시끼가이샤, 야마모도 다꾸마 filed Critical 후지쓰가부시끼가이샤
Publication of KR870009466A publication Critical patent/KR870009466A/ko
Application granted granted Critical
Publication of KR900003829B1 publication Critical patent/KR900003829B1/ko
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00—Packaging processes not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H10W76/42—Fillings
    • H10W76/47—Solid or gel fillings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/60—Seals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1019870002470A 1986-03-19 1987-03-19 패케이지 구조를 갖는 반도체장치 제조방법 Expired KR900003829B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP61-59481 1986-03-19
JP61059481A JPS62217645A (ja) 1986-03-19 1986-03-19 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR870009466A KR870009466A (ko) 1987-10-26
KR900003829B1 true KR900003829B1 (ko) 1990-06-02

Family

ID=13114541

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870002470A Expired KR900003829B1 (ko) 1986-03-19 1987-03-19 패케이지 구조를 갖는 반도체장치 제조방법

Country Status (5)

Country Link
US (1) US4999319A (https=)
EP (1) EP0238418B1 (https=)
JP (1) JPS62217645A (https=)
KR (1) KR900003829B1 (https=)
DE (1) DE3782071T2 (https=)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5264393A (en) * 1988-11-25 1993-11-23 Fuji Photo Film Co., Ltd. Solid state image pickup device and method of manufacturing the same
US5098864A (en) * 1989-11-29 1992-03-24 Olin Corporation Process for manufacturing a metal pin grid array package
US5086018A (en) * 1991-05-02 1992-02-04 International Business Machines Corporation Method of making a planarized thin film covered wire bonded semiconductor package
US5273940A (en) * 1992-06-15 1993-12-28 Motorola, Inc. Multiple chip package with thinned semiconductor chips
JP2888040B2 (ja) * 1992-07-10 1999-05-10 日本電気株式会社 半導体装置およびその製造方法
US5834339A (en) 1996-03-07 1998-11-10 Tessera, Inc. Methods for providing void-free layers for semiconductor assemblies
US5663106A (en) * 1994-05-19 1997-09-02 Tessera, Inc. Method of encapsulating die and chip carrier
US5776796A (en) * 1994-05-19 1998-07-07 Tessera, Inc. Method of encapsulating a semiconductor package
JP3199963B2 (ja) * 1994-10-06 2001-08-20 株式会社東芝 半導体装置の製造方法
US5929517A (en) 1994-12-29 1999-07-27 Tessera, Inc. Compliant integrated circuit package and method of fabricating the same
US5723787A (en) * 1996-03-04 1998-03-03 Alliedsignal, Inc. Accelerometer mounting system
US6083768A (en) 1996-09-06 2000-07-04 Micron Technology, Inc. Gravitationally-assisted control of spread of viscous material applied to semiconductor assembly components
US6214640B1 (en) 1999-02-10 2001-04-10 Tessera, Inc. Method of manufacturing a plurality of semiconductor packages
US6977440B2 (en) * 2001-10-09 2005-12-20 Tessera, Inc. Stacked packages
DE10297316T5 (de) * 2001-10-09 2004-12-09 Tessera, Inc., San Jose Gestapelte Baugruppen
US7335995B2 (en) * 2001-10-09 2008-02-26 Tessera, Inc. Microelectronic assembly having array including passive elements and interconnects
USD540978S1 (en) 2004-06-08 2007-04-17 The Coleman Company, Inc. Flashlight lens
CN102779910A (zh) * 2011-05-10 2012-11-14 弘凯光电股份有限公司 发光二极管封装方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3706840A (en) * 1971-05-10 1972-12-19 Intersil Inc Semiconductor device packaging
JPS50144758A (https=) * 1974-05-09 1975-11-20
US4218701A (en) * 1978-07-24 1980-08-19 Citizen Watch Co., Ltd. Package for an integrated circuit having a container with support bars
JPS5632736A (en) * 1979-08-24 1981-04-02 Nec Corp Sealing method of hybrid integrated circuit device
DE3040867C2 (de) * 1980-10-30 1985-01-17 Telefunken electronic GmbH, 7100 Heilbronn Verfahren zur Herstellung einer Halbleiteranordnung
JPS5814545A (ja) * 1981-07-17 1983-01-27 Citizen Watch Co Ltd Ｉｃの実装方法
JPS5880845A (ja) * 1981-11-09 1983-05-16 Hitachi Ltd 固体撮像装置の製造方法
US4477828A (en) * 1982-10-12 1984-10-16 Scherer Jeremy D Microcircuit package and sealing method
JPS59145534A (ja) * 1983-02-09 1984-08-21 Matsushita Electric Ind Co Ltd 半導体デバイスの封止方法
JPS59159547A (ja) * 1983-03-03 1984-09-10 Matsushita Electric Ind Co Ltd 半導体素子の保護方法
JPS6017936A (ja) * 1983-07-12 1985-01-29 Sumitomo Bakelite Co Ltd 半導体封止用樹脂組成物
US4818812A (en) * 1983-08-22 1989-04-04 International Business Machines Corporation Sealant for integrated circuit modules, polyester suitable therefor and preparation of polyester
JPS6080258A (ja) * 1983-10-07 1985-05-08 Fuji Xerox Co Ltd 樹脂封止型半導体装置の製造方法
JPS60111431A (ja) * 1983-11-21 1985-06-17 Toshiba Corp 電子部品の製造方法
JPS60154543A (ja) * 1984-01-24 1985-08-14 Nec Corp 合成樹脂基板を用いた半導体装置
JPS60222450A (ja) * 1984-04-20 1985-11-07 Mitsui Toatsu Chem Inc リジンエステルトリイソシアナ−トの製造方法
JPS6153321A (ja) * 1984-08-23 1986-03-17 Toshiba Corp 半導体封止用エポキシ樹脂組成物及びそれを用いた樹脂封止型半導体装置

Also Published As

Publication number Publication date
EP0238418A2 (en) 1987-09-23
KR870009466A (ko) 1987-10-26
EP0238418B1 (en) 1992-10-07
JPH0528906B2 (https=) 1993-04-27
US4999319A (en) 1991-03-12
JPS62217645A (ja) 1987-09-25
DE3782071T2 (de) 1993-02-11
DE3782071D1 (de) 1992-11-12
EP0238418A3 (en) 1990-05-16

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