KR890002811B1 - Laser diode - Google Patents

Laser diode Download PDF

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Publication number
KR890002811B1
KR890002811B1 KR1019860009285A KR860009285A KR890002811B1 KR 890002811 B1 KR890002811 B1 KR 890002811B1 KR 1019860009285 A KR1019860009285 A KR 1019860009285A KR 860009285 A KR860009285 A KR 860009285A KR 890002811 B1 KR890002811 B1 KR 890002811B1
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South Korea
Prior art keywords
light emitting
region
emitting device
stem
heat sink
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KR1019860009285A
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Korean (ko)
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KR880006772A (en
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김번중
김기준
남춘우
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삼성전자 주식회사
강진구
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Priority to KR1019860009285A priority Critical patent/KR890002811B1/en
Priority to DE19873735818 priority patent/DE3735818A1/en
Priority to GB08725476A priority patent/GB2197126A/en
Priority to JP62273615A priority patent/JPS63122293A/en
Priority to FR878715203A priority patent/FR2606211B1/en
Publication of KR880006772A publication Critical patent/KR880006772A/en
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Publication of KR890002811B1 publication Critical patent/KR890002811B1/en

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    • H01L25/167Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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    • H01L2924/102Material of the semiconductor or solid state bodies
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    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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    • H01S5/00Semiconductor lasers
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    • H01S5/00Semiconductor lasers
    • H01S5/06Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
    • H01S5/068Stabilisation of laser output parameters
    • H01S5/06825Protecting the laser, e.g. during switch-on/off, detection of malfunctioning or degradation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Abstract

The package includes an LED element and an overcurrent protection circuit placed on the same base chip (25) with a heat sink (7). The overcurrent protection circuit comprising a resistor (32) is formed on the base chip (25) with connectors (27,28) connected to stems (20,21). Then the LED element is placed on the region (50). The back plate (7) of the base chip is coated with metal and attached to the heat sink (17), then the heat generated in the chip is radiated easily.

Description

히트 싱크를 겸한 과전류 파괴방지용 집적회로를 내장한 발광소자 패키지Light-Emitting Device Package with Integrated Integrated Circuit for Overcurrent Protection Against Heat Sink

제1도는 종래의 발광소자 과전류 보호회로도.1 is a conventional light emitting device overcurrent protection circuit diagram.

제2도는 종래의 발광소자를 내장한 패키지의 단면도.2 is a cross-sectional view of a package incorporating a conventional light emitting device.

제3도는 종래의 제2도의 패키지를 사용한 제1도의 실시도.3 is an embodiment of FIG. 1 using the conventional FIG. 2 package.

제4도는 본 발명에 따른 실리콘 보조칩의 단면도.4 is a cross-sectional view of a silicon subsidiary chip according to the present invention.

제5도는 본 발명에 따른 실리콘 보조칩을 내장한 패키지의 단면도.5 is a cross-sectional view of a package containing a silicon auxiliary chip according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

25 : 실리콘 반도체 기판 31 : 분리영역25 silicon semiconductor substrate 31 isolation region

26 : 집적저항 32 : 저항영역26: integrated resistance 32: resistance area

30, 30' : 보호저항 접속부 50 : 발광소자 부착영역30, 30 ': protection resistance connection part 50: light emitting element attachment area

27, 28 : 금도선27, 28: gold road

본 발명은 광통신에서 사용되는 발광소자의 방열 및 과전류 보호를 위한 집적회로를 내장하고 있는 발광소자 패키지에 관한 것이다.The present invention relates to a light emitting device package having an integrated circuit for heat dissipation and overcurrent protection of a light emitting device used in optical communication.

광통신에서 광원으로 사용되는 발광소자는 원소 주기율표 3족 및 5족 원소의 혼합반도체로 만들어지고 있다. 발광 소자중 특히 레이저 다이오드와 같은 발광소자는 단파장과 장파장의 광원으로 사용되며 단거리 및 장거리 광통신에 주로 많이 사용되고 있다.Light emitting devices used as light sources in optical communication are made of mixed semiconductors of Group 3 and 5 elements of the Periodic Table of the Elements. Among light emitting devices, light emitting devices such as laser diodes are used as light sources of short wavelength and long wavelength, and are mainly used for short and long distance optical communication.

상기와 같은 레이저 다이오드를 구동하기 위해서는 적어도 드레쉬홀드 전압 이상으로 전압을 인가하여 전류를 흘리지 않으면 안된다. 그러나 상기의 발광소자 재료로 사용되는 상기 혼합 반도체는 열전도율이 나쁘기 때문에 별도의 방열기구를 사용하지 않는다면 드레쉬홀드 전압의 변동으로 안정된 광출력을 발생할 수가 없게 된다. 또한 발광 다이오드를 구동하기 위한 공급전압의 급작스런 변동으로 인해 과전류가 흘러 다이오드가 타버리는 것을 보호하기 위한 보호회로를 사용하지 않으면 안된다.In order to drive such a laser diode, a current must be applied by applying a voltage at least above the threshold voltage. However, since the mixed semiconductor used as the light emitting device material has a poor thermal conductivity, a stable light output cannot be generated due to a change in the threshold voltage unless a separate heat dissipation mechanism is used. In addition, due to a sudden change in the supply voltage for driving the light emitting diode, a protection circuit must be used to protect the diode from burning out due to an overcurrent.

제1도는 종래의 발광소자 구동회로중 과전류 보호회로를 나타낸 도면이다. 도면중 정전원단자(1)는 저항(4)에 접속되어 있으며 발광소자(3)는 저항(4)에 애노드가 접속되고 캐소드는 접지되어 있다. 이때 발광소자(3)의 순방향 저항보다 훨씬 큰 저항(4)은 저항(4)가 없을때 보다 정전원단자(1)의 이상전압 발생시 과도하게 흐르는 전류의 양을 대폭 감소시켜 주므로 상기 소자(3)가 타는 것을 보호하여 주게 된다.1 is a view showing an overcurrent protection circuit of a conventional light emitting device driving circuit. In the figure, the electrostatic terminal 1 is connected to the resistor 4, the light emitting element 3 has an anode connected to the resistor 4, and the cathode is grounded. In this case, the resistor 4 much larger than the forward resistance of the light emitting device 3 greatly reduces the amount of excessively flowing current when an abnormal voltage of the electrostatic terminal 1 is generated than when the resistor 4 is absent. To protect the ride.

또한 제2도는 발광소자를 내장한 패키지를 나타낸 종래의 도면으로서 발광소자칩(15)은 방열판재(17)와 도전성 접착제(16)로 붙어있다. 이 방열판재(17)는 열전도율이 좋은 구리나 다이야몬드에 전도성이 좋은 금을 도포한 것으로써 패키지(19)의 몸체(40)이거나 전기용접 또는 기계적 패키지(19)의 금속몸체(40) 표면에 접착되어 있다. 또한 상기 칩(15)의 다른쪽 전극(18)은 금선(23)을 통해 외부로 연결되는 스템(20)에 연결되어 있으며 몸체(40)에 연결된 스템(21)과는 절연체(22)를 통해 전기적으로 절연되어 있다.2 is a conventional view showing a package in which a light emitting device is incorporated, wherein the light emitting device chip 15 is attached with a heat sink 17 and a conductive adhesive 16. The heat dissipation plate 17 is coated with copper having high thermal conductivity or gold with good conductivity, and is formed on the surface of the body 40 of the package 19 or on the surface of the metal body 40 of the electrical welding or mechanical package 19. It is glued. In addition, the other electrode 18 of the chip 15 is connected to the stem 20 connected to the outside through the gold wire 23 and the stem 21 connected to the body 40 through the insulator 22. It is electrically insulated.

이 경우 전류가 스템(20)과 금선(23)과 발광소자칩(15)과 접착제(16)과 방열판재(17)과 스템(21)의 경로로 흐르면 상기 칩(15)의 P-N 접합면에서 발생한 빛은 투시창(24)를 통하여 방사되고 방열판재(17)를 통해 패키지(19)에서 외부로 방출되게 되어 있었다.In this case, when a current flows in the path of the stem 20, the gold wire 23, the light emitting device chip 15, the adhesive 16, the heat sink 17, and the stem 21, the PN junction surface of the chip 15 The generated light was emitted through the viewing window 24 and emitted from the package 19 to the outside through the heat sink 17.

따라서 전술할 바와같이 열의 방출과 과전류 보호회로를 구비한 장치를 만들기 위해서는 제3도에 도시한 바와같이 PCB 기판(6)에 저항(9)과 제2도의 방열판재(17)를 구비하고 발광소자를 내장하는 패키지(19)를 배치하고 도선(13)에 정전압을 공급하며 도선(11)을 상기 저항(9)과 발광소자의 애노드측의 리드(8)와를 접속하고 캐소드측의 리드(10)는 도선(14)와 접속하여 접지를 시키는 구성으로 종래에 사용하여 왔다.Therefore, as described above, in order to make a device having heat dissipation and an overcurrent protection circuit, a resistor 9 and a heat sink plate 17 of FIG. 2 are provided on the PCB substrate 6 as shown in FIG. A package 19 having a built-in package and supplies a constant voltage to the conductive line 13, and connects the conductive line 11 with the resistor 9 and the lead 8 on the anode side of the light emitting element, and the lead 10 on the cathode side. Has been used conventionally in a configuration in which the ground wire is connected to the conductive wire 14 to ground.

그러나 상기와 같은 방법은 방열기구 및 보호회로를 별도로 설치함으로서 그 부피가 커질뿐만 아니라 제품조립에 수고를 하여야 하는 문제점이 있게 된다.However, the method as described above has a problem in that the installation of the heat dissipation mechanism and the protection circuit is not only increased in volume but also a labor in assembling the product.

따라서 본 발명의 목적은 발광소자의 구동 보호회로를 방열판재와 함께 내장한 발광소자 패키지를 제공함에 있다.Accordingly, an object of the present invention is to provide a light emitting device package in which the driving protection circuit of the light emitting device is integrated with a heat sink.

이하 본 발명을 도면을 참조하여 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the drawings.

제4도는 본 발명에 따른 실리콘 보조칩의 단면도를 보인 도면이다.4 is a cross-sectional view of a silicon auxiliary chip according to the present invention.

도면중 기판(25)은 단결정 실리콘 기판으로서 고저항을 갖는 기판이 사용된다. 제1도전형과 반대가 되는 제2도전형의 분리영역(31)이 형성되며 상기 분리영역(31)내에는 상기 제1도전형과 동일 도전형의 저항영역(32)이 확산된다. 그후 상기 기판(25) 표면 전면에 실리콘 산화막층 또는 질화막층을 형성하고 보호 저항을 형성하기 위한 영역과 후술하는 발광소자를 부착하기 위한 영역을 통상의 사진식각 방법에 의해 에칭해내고 진공층착 방법에 의해 알루미늄 또는 금을 진공 증착하여 상기 저항영역(32)에 의해 형성되는 보호저항 접속영역(30)(30')가 상기 발광소자를 부착하기 위한 발광소자 부착 영역(50)을 제외하고 모두 에칭해낸후 상기 기판 후면에 금 또는 알루미늄을 진공중착한 금속층(7)을 형성한다.In the figure, the board | substrate 25 is a board | substrate with high resistance as a single crystal silicon substrate. An isolation region 31 of the second conductivity type, which is opposite to the first conductivity type, is formed, and a resistance region 32 of the same conductivity type as the first conductivity type is diffused in the isolation region 31. Thereafter, a silicon oxide layer or a nitride layer is formed on the entire surface of the substrate 25, and a region for forming a protection resistor and a region for attaching a light emitting device, which will be described later, are etched by a conventional photolithography method, Vacuum deposition of aluminum or gold to etch away all of the protective resistance connection regions 30 and 30 'formed by the resistance region 32 except for the light emitting element attachment region 50 for attaching the light emitting element. Thereafter, a metal layer 7 in which gold or aluminum is vacuum deposited on the back of the substrate is formed.

상기에 있어 발광소자 부착영역(50)은 발광소자의 칩면적보다 크게 형성하여야 함을 유의하여야 한다.In the above, it should be noted that the light emitting device attachment region 50 should be formed larger than the chip area of the light emitting device.

한펴 제5도는 본 발명에 따라 제4도의 실리콘 보조칩을 사용하여 발광소자를 내장시킨 패키지를 나타낸 도면이다.5 is a view showing a package in which a light emitting device is built using the silicon auxiliary chip of FIG. 4 according to the present invention.

도면중 몸체(40)와 일체가 되게 형성된 방열판재(17)와 스템(21) 및 스템(21)과 절연물질(22)을 통해 전기적 절연이 되게 형성되어 패키지 내부로 돌출하고 있는 스템(20) 및 광의 방사를 위한 투시창(24)을 가지고 있는 캡(60)으로 구성된 부분이 종래의 TO5 또는 TO18형의 패키지와 동일한 구성이다.The stem 20 which is formed to be electrically insulated through the heat sink 17 and the stem 21 and the stem 21 and the insulating material 22 formed integrally with the body 40 in the figure protruding into the package 20 And a cap 60 having a see-through window 24 for emitting light has the same configuration as a conventional TO5 or TO18 type package.

따라서 제4도의 실리콘 보조칩을 제조한 후 제5도의 패키지중 캡(60)이 씌어지지 않는 상태에서 상기 패키지(19)의 몸체(40)를 가열한 후 초음파 또는 금과 인듐의 합금으로 된 프리폼을 사용하여 방열판재(17)의 측벽의 부착면(7)에 제4도의 실리콘 보조칩의 후면 금속층(7)을 부착시킨후 다시 제4도의 발광소자 부착영역(50)에 발광소자(15)의 캐소드를 대향시켜 열전도성과 전기적 전도성이 좋은 도전성 접착제(51)로 접착을 시킨다. 상기 도전성 접착제(51)는 금으로된 프리폼이 사용될 수 있다. 상기와 같은 실리콘 보조칩과 발광소자의 부착 즉 다이 부착이 완료된 후 도선용접을 한다.Therefore, after the silicon auxiliary chip of FIG. 4 is manufactured, the body 40 of the package 19 is heated while the cap 60 of the package of FIG. 5 is not covered, and then ultrasonic waves or a preform made of an alloy of gold and indium. Attaching the back metal layer 7 of the silicon auxiliary chip of FIG. 4 to the attaching surface 7 of the side wall of the heat sink plate 17 using the light emitting device 15 to the light emitting device attachment region 50 of FIG. Opposite the cathodes thereof are bonded with a conductive adhesive 51 having good thermal conductivity and electrical conductivity. The conductive adhesive 51 may be a gold preform. After the attachment of the silicon auxiliary chip and the light emitting device as described above is completed, the wire welding is performed.

스템(20)의 패키지(19) 내부의 끝단부(62)와 제4도의 제1 보호저항 접속영역(30)과를 금도선(28)으로 도선용접하고 제4도의 제2보호저항 접속영역(30')가 상기 발광소자(15)의 애노드측 전극과를 금도선(27)으로 용접을 하여 도선용접의 공정을 완료한다. 그후 질소분위기 내에서 캡(60)을 씌워 밀봉을 하면 패키지(19) 내부는 질소로 충만되어 내부 금속의 산화를 방지할 수 있게 된다.The end portion 62 in the package 19 of the stem 20 and the first protective resistance connecting region 30 of FIG. 4 are conductingly welded with gold conductor 28, and the second protective resistance connecting region of FIG. 30 ') welds the anode side electrode of the light emitting element 15 with the gold conductor 27 to complete the process of conducting the conductor welding. Then, when the cap 60 is sealed in the nitrogen atmosphere, the inside of the package 19 is filled with nitrogen to prevent oxidation of the internal metal.

따라서 스템(20)에 정전압을 인가하고 스템(21)을 접지시키면 발광 소자(15)의 P-N 접합으로부터 방출되는 빛은 투시창(24)을 통해 방사되게 된다.Therefore, when a constant voltage is applied to the stem 20 and the stem 21 is grounded, light emitted from the P-N junction of the light emitting device 15 is emitted through the viewing window 24.

또한 발광소자의 재료인 GaAs 혹은 InP의 열전도율은 상온에서 각각 0.46w/cm℃, 0.68w/cm ℃이고 실리콘의 경우는 1.5 w/cm℃이므로 실리콘으로 된 보조칩의 사용은 열전도에서 훨씬 유리하며 상기 실리콘 보조칩의 두께를 얇게 하면 훨씬 유리하며 약 200-300/m 정도이면 충분하다.In addition, the thermal conductivity of GaAs or InP, which is a material of the light emitting device, is 0.46w / cm ℃ and 0.68w / cm ℃, respectively, at room temperature, and 1.5w / cm ℃ for silicon. A thinner silicon sub-chip is much more advantageous and about 200-300 / m is sufficient.

따라서 본 발명에 따른 실리콘 보조칩의 사용은 발광소자의 보조 방열판으로 이용이 되며 실리콘 칩상에 보호회로를 구성함으로써 PCB회로 구성시 별도의 저항소자 및 그에 따른 납땜, 부품삽입등 부수작업량의 감소효과를 가져올 수 있다.Therefore, the use of the silicon subsidiary chip according to the present invention is used as a subsidiary heat sink of the light emitting device, and by forming a protection circuit on the silicon chip, the effect of reducing the amount of additional work such as a separate resistance element and consequent soldering and component insertion when configuring a PCB circuit. Can bring

Claims (1)

몸체(40)와 일체로된 방열판재(17)와 제1스텝(21) 및 상기 스템(21)과 절연물질(22)을 통해 절연되고 패키지(19) 내부로 신장된 제2 스템(20)과 투시창(24)을 가진 캡(60)으로 구성된 발광소자 패키지에 있어서, 발광소자 부착영역(50)과 상기 발광소자 부착영역(50)과 이격하여 제2 도전형의 분리영역(31)을 형성하고 상기 분리영역(31)내에 제1도전형의 저항영역(32)을 형성하고 상기 분리영역(31)과 저항영역(32) 상부에 절연층(29)을 형성하며 상기 저항영역(32)의 소정부분 절연층을 개구로 하여 제1 및 제2 보호저항 접속부(30)(30')를 형성하며 후면 금속층(7)을 형성한 실리콘 보조칩을 구비하여 상기 실리콘 보조칩의 후면금속층(7)을 상기 방열판재(17)에 부착하며 상기 발광소자(15)를 상기 실리콘 보조칩의 발광소자 부착영역(50)에 부착하며 상기 제1보호저항 접속부(30)와 제1 스템 및 상기 제2 보호저항 접속부(30')와 제2 스템과를 도선 용접하여 형성된 히트 싱크를 겸한 과전류 파괴 방지용 집적회로를 내장한 발광소자 패키지.The second stem 20 insulated through the heat sink 17 and the first step 21 integrated with the body 40 and the stem 21 and the insulating material 22 and extending into the package 19. And a cap 60 having a see-through window 24, wherein the second conductive type separation region 31 is formed to be spaced apart from the light emitting element attaching region 50 and the light emitting element attaching region 50. The resistive region 32 of the first conductive type is formed in the isolation region 31, and the insulating layer 29 is formed on the isolation region 31 and the resistance region 32. The backside metal layer 7 of the silicon auxiliary chip includes a silicon auxiliary chip having a predetermined portion of the insulating layer as an opening, forming the first and second protective resistance connecting portions 30 and 30 ', and forming the back metal layer 7. Is attached to the heat sink plate 17, and the light emitting device 15 is attached to the light emitting device attachment region 50 of the silicon auxiliary chip. The first stem and the second protection resistor connecting portion 30 'and a light emitting device built-in over-current preventing destruction of the integrated circuit also serves as a heat sink formed by the welding wire and the second stem.
KR1019860009285A 1986-11-04 1986-11-04 Laser diode KR890002811B1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1019860009285A KR890002811B1 (en) 1986-11-04 1986-11-04 Laser diode
DE19873735818 DE3735818A1 (en) 1986-11-04 1987-10-22 CAPSULE OF A LIGHTING ELEMENT WITH INTEGRATED RADIATOR AND OVERLOAD CURRENT PROTECTION CIRCUIT
GB08725476A GB2197126A (en) 1986-11-04 1987-10-30 A light emitting semi- conductor device having current overload protection
JP62273615A JPS63122293A (en) 1986-11-04 1987-10-30 Light emitting device package
FR878715203A FR2606211B1 (en) 1986-11-04 1987-11-03 LIGHT EMITTING COMPONENT PACKAGE WITH INTEGRATED RADIATOR CIRCUIT FOR OVERCURRENT PROTECTION

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019860009285A KR890002811B1 (en) 1986-11-04 1986-11-04 Laser diode

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KR880006772A KR880006772A (en) 1988-07-25
KR890002811B1 true KR890002811B1 (en) 1989-07-31

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KR (1) KR890002811B1 (en)
DE (1) DE3735818A1 (en)
FR (1) FR2606211B1 (en)
GB (1) GB2197126A (en)

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KR930015139A (en) * 1991-12-18 1993-07-23 이헌조 Manufacturing method of light emitting diode capable of changing light intensity
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JPH08264898A (en) * 1995-03-23 1996-10-11 Mitsubishi Electric Corp Semiconductor laser device
DE19612388C2 (en) * 1996-03-28 1999-11-04 Siemens Ag Integrated semiconductor circuit, in particular an optoelectronic component with overvoltage protection
KR20030049211A (en) * 2001-12-14 2003-06-25 서오텔레콤(주) Led
DE102006015335B4 (en) 2006-04-03 2013-05-02 Ivoclar Vivadent Ag Semiconductor radiation source and light curing device
GB2479120A (en) * 2010-03-26 2011-10-05 Cambridge Display Tech Ltd Organic electrolumunescent device having conductive layer connecting metal over well defining layer and cathode
FR3001357B1 (en) * 2013-01-22 2015-02-06 Sylumis MECHANICAL FASTENING AND ELECTRICAL CONNECTION BRACKET OF LIGHT EMITTING DIODES

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GB1483849A (en) * 1974-09-21 1977-08-24 Nippon Electric Co Semiconductor laser device equipped with a silicon heat sink
JPS546787A (en) * 1977-06-17 1979-01-19 Matsushita Electric Ind Co Ltd Luminous element
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FR2445617A1 (en) * 1978-12-28 1980-07-25 Ibm France IMPROVED BREAKDOWN VOLTAGE RESISTANCE ACHIEVED BY DOUBLE ION IMPLANTATION IN A SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF
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KR880006772A (en) 1988-07-25
FR2606211B1 (en) 1991-07-12
FR2606211A1 (en) 1988-05-06
JPS63122293A (en) 1988-05-26
GB2197126A (en) 1988-05-11
GB8725476D0 (en) 1987-12-02

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