KR20190057033A - Multalayered electronic component - Google Patents

Abstract

The present invention provides a multilayered electronic component for forming a seed layer on a surface of a capacitor body by an atomic layer deposition (ALD) method, and forming an external electrode through a plating process to enhance moisture resistance reliability and electric connectivity. The multilayered electronic component comprises: the capacitor body having a first and a second surface facing each other, a third and a fourth surface connected to the first and the second surface and facing each other, and a fifth and a sixth surface connected to the first and the second surface and to the third and the fourth surface, and facing each other, and having a plurality of dielectric layers and a first and a second internal electrode alternately arranged with the dielectric layers interposed therebetween to expose one ends through the third and the fourth surface; a first and a second thin film layer including at least one among TiN, Ru, Pt, Ir and Ti, arranged on the third and the fourth surface and connected to the first and the second internal electrode; and a first and a second external electrode formed on the first and the second thin film layer, wherein the first and the second thin film layer individually have thickness of 60 nm or less and deviation of 10% or less.

Description

[0001] MULTILAYERED ELECTRONIC COMPONENT [0002]

The present invention relates to a multilayer electronic component.

Due to the tendency of the electronic parts set to become thinner and thinner, various electronic components are gradually becoming thinner and thinner, and this tendency is also seen in a multilayer capacitor (MLCC).

In order to maintain a high capacity in a small size stacked electronic component, it is necessary to increase the effective volume ratio, which is the available volume relative to the volume of the entire capacitor body of the ceramic used as the dielectric.

As a method for increasing the effective volume ratio, technology development is progressing in a direction of gradually increasing the thickness of the internal electrode and the external electrode.

However, in the conventional method of forming the electrodes of the stacked capacitor, there is a limitation in realizing an electrode having a certain thickness or less.

In addition, since the conventional method has a problem of deterioration in performance and reliability due to thinning, a new method for solving the problem is increasing.

Korean Patent Laid-Open Publication No. 2016-0001026

SUMMARY OF THE INVENTION An object of the present invention is to provide a laminated electronic component capable of improving moisture resistance.

An aspect of the present invention provides a semiconductor device comprising a first and a second surface facing each other, a third surface and a fourth surface connected to the first surface and the second surface and facing each other, And first and second surfaces alternately arranged such that one end thereof is exposed through the third surface and the fourth surface with the dielectric layer therebetween, A capacitor body including two internal electrodes; First and second thin film layers including at least one of TiN, Ru, Pt, Ir, and Ti, disposed on third and fourth surfaces of the capacitor body, respectively, and connected to the first and second internal electrodes, respectively; And first and second external electrodes formed on the first and second thin film layers; Wherein the first and second thin film layers each have a thickness of 60 nm or less and a deviation of 10% or less, respectively.

In one embodiment of the present invention, the first thin film layer and the second thin film layer may have a thickness ratio of a center to a corner of 0.9 or more.

In one embodiment of the present invention, the first and second external electrodes may comprise copper.

In an embodiment of the present invention, the first and second external electrodes may be formed of a multi-layered structure of a copper layer, a nickel layer, and a tin layer.

In an embodiment of the present invention, the first and second external electrodes may be formed of a double layer structure of a nickel layer and a tin layer.

In one embodiment of the present invention, the first thin film layer extends from a third surface of the capacitor body to a portion of first, second, fifth and sixth surfaces, and the second thin film layer extends from a fourth The first, second, fifth, and sixth planes of the surface.

According to another aspect of the present invention, there is provided a method of fabricating a semiconductor device, comprising: forming a seed layer and firing by coating a material including at least one of TiN, Ru, Pt, Ir, and Ti with a thin film ALD (Atomic Layer Deposition) method around the capacitor body; Forming a conductive layer on a surface of the seed layer by a plating process; Forming a polymer layer to cover both longitudinal ends of the capacitor body; Etching the portions of the conductive layer not covered by the polymer layer to form first and second external electrodes to be spaced apart from each other; Removing a seed layer formed on a portion of the capacitor body not covered by the first and second external electrodes to form first and second thin film layers which are spaced apart from each other; And removing the polymer layer; Wherein the first and second thin film layers each have a thickness of 60 nm or less and a deviation of 10% or less, respectively.

In one embodiment of the present invention, the first and second thin film layers may have a thickness ratio of a center to a corner of 0.9 or more.

In an embodiment of the present invention, the conductive layer may be made of copper.

In an embodiment of the present invention, the conductive layer may be formed by sequentially plating copper, nickel, and tin to form a multi-layer structure of a copper layer, a nickel layer, and a tin layer.

In an embodiment of the present invention, the conductive layer may be formed by sequentially plating nickel and tin to form a double layer structure of a nickel layer and a tin layer.

According to one embodiment of the present invention, there is an effect that moisture resistance reliability and electrical connectivity of the multilayer electronic component can be improved.

1 is a perspective view of a multilayer electronic component according to an embodiment of the present invention.
2 is a sectional view taken along the line I-I 'in Fig.
FIG. 3 is a cross-sectional view showing a further formed plating layer in FIG. 2. FIG.
4 is a cross-sectional view showing a capacitor body in which a thin film layer as a seed layer is formed in a multilayer electronic device according to an embodiment of the present invention.
5 is a cross-sectional view showing a further conductive layer formed in FIG.
FIG. 6 is a cross-sectional view showing a further polymer layer formed in FIG. 5; FIG.
7 is a cross-sectional view showing a state in which the first and second external electrodes are provided by removing a part of the conductive layer in FIG.
FIG. 8 is a cross-sectional view showing a part of the thin film layer removed in FIG. 7. FIG.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below.

Further, the embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art.

The shape and size of elements in the drawings may be exaggerated for clarity.

In the drawings, like reference numerals are used to designate like elements that are functionally equivalent to the same reference numerals in the drawings.

In addition, to include an element throughout the specification does not exclude other elements unless specifically stated otherwise, but may include other elements.

FIG. 1 is a perspective view of a multilayer electronic component according to an embodiment of the present invention, FIG. 2 is a sectional view taken along line I-I 'of FIG. 1, and FIG. 3 is a sectional view showing a further formed plating layer in FIG.

1 to 3, a multilayer electronic device according to an embodiment of the present invention includes a capacitor body 110, first and second thin film layers 151 and 152, first and second external electrodes 131 and 132, 132).

The capacitor body 110 includes a plurality of dielectric layers 111 and a plurality of first and second inner electrodes 121 and 122 arranged alternately with a plurality of dielectric layers 111 interposed therebetween.

The capacitor body 110 also includes first and second surfaces 1 and 2 facing each other in the Z direction and third and fourth surfaces 1 and 2 connected to the first and second surfaces 1 and 2 and facing each other in the X direction. And fourth and fifth surfaces 3 and 4 connected to the first and second surfaces 1 and 2 and connected to the third and fourth surfaces 3 and 4 and facing each other in the Y direction, (5, 6).

The first and second internal electrodes 121 and 122 may be exposed through the third and fourth surfaces 3 and 4 of the capacitor body 110, respectively.

The first and second thin film layers 151 and 152 are respectively disposed on the third and fourth surfaces 3 and 4 of the capacitor body 110 and the exposed portions of the first and second inner electrodes 121 and 122 And can be electrically connected to each other.

The first and second thin film layers 151 and 152 include at least one of TiN (titanium nitride), Ru (ruthenium), Pt (platinum), Ir (iridium) and Ti (titanium).

At this time, the thicknesses of the first and second thin film layers 151 and 152 are 60 nm or less, respectively. If the thickness of the first and second thin film layers 151 and 152 exceeds 60 nm, an unnecessary process time may be increased and a plating failure may increase.

In addition, the first and second thin film layers 151 and 152 have a deviation of 10% or less, respectively. Here, the deviation means a difference between the maximum value and the minimum value of the thickness of the first or second thin film layer 151 or 152.

The thickness ratio of the first and second thin film layers 151 and 152 to the center may be 0.9 or more.

The first thin film layer 151 may also extend to a portion of the first, second, fifth, and sixth sides 1, 2, 5, 6 at the third side 3 of the capacitor body 110 . The second thin film layer 152 may extend to a portion of the first, second, fifth, and sixth sides 1, 2, 5, 6 at the fourth side 4 of the capacitor body 110.

The first and second external electrodes 131 and 132 are formed on the first and second thin film layers 151 and 152, respectively.

The first and second external electrodes 131 and 132 are respectively disposed on the third and fourth surfaces 3 and 4 of the capacitor body 110 so that the first and second internal electrodes 121 and 122 are exposed And are electrically connected to each other.

The first and second external electrodes 131 and 132 are connected to a portion of the first and second surfaces 1 and 2 of the capacitor body 110 and to a portion of the fifth and sixth surfaces 5 and 6, Can be extended.

In addition, the first and second external electrodes 131 and 132 may be formed of a plated layer, and may include, for example, a copper layer including copper.

The first and second external electrodes may be formed of copper layers 131 and 132, nickel layers 133 and 134 and nickel layers 133 and 134 formed on the copper layers 131 and 132 Layer structure of the tin layers 135 and 136 formed on the tin layer (not shown).

Meanwhile, according to another embodiment of the present invention, the first and second external electrodes may have a double layer structure of a nickel layer and a tin layer, omitting the copper layer.

Table 1 below shows the change in moisture resistance reliability according to the maximum thickness of the thin film layer in the comparative example in which the thin film layer is formed by the sputter method and the embodiment in which the thin film layer is formed by the ALD method. Here, TiN is used as the material of the thin film layer. In addition, the moisture resistance reliability is a percentage of the number of samples in which no reliability defect has occurred as a result of testing 100 samples. The reliability test was conducted by applying a voltage of 9.5 VV for 20 hours under the conditions of 85 캜 and 85%.

Thin film thickness (nm) Comparative Example (%) Example (%) 10 48 100 20 48 100 30 55 100 40 59 100 50 78 100 60 97 100 70 100 100 80 100 100 90 100 100 100 100 100

Referring to Table 1, when the thin film layer is formed by sputtering, it is confirmed that the samples having a thickness of 60 nm or less have moisture resistance reliability of 97% or less, which is a problem in moisture resistance reliability.

On the other hand, when the thin film layer is formed by the ALD of the embodiment, even when the thickness of the thin film layer is 60 nm or less, the moisture-proof reliability is 100%, which shows excellent moisture permeation blocking performance through the moisture permeation path.

Therefore, according to the present invention, the maximum thickness of the thin film layer can be set to 60 nm or less.

Hereinafter, a step of manufacturing the multilayer electronic component of the present embodiment will be described.

4, the periphery of the capacitor body 110 having the dielectric layer 111 and the first and second internal electrodes 121 and 122 is coated by a thin film ALD (Atomic Layer Deposition) method and dried to form a seed layer (150) is formed and fired.

At this time, the thickness of the seed layer 150 can be entirely uniformly and thinly adjusted by using the ALD method with a conformality of 1: 0.9 or more. Therefore, even a very small gap can be coated with a thin film.

Also, the thickness of the seed layer 150 through the ALD method may be 600 nm or less, and the deviation may be 10% or less. The seed layer 150 may have a corner / center ratio of 0.9 or more and very uniformly.

In addition, the seed layer 150 may be formed of a material including at least one of TiN, Ru, Pt, Ir, and Ti.

The seed layer 150 serves as a seed for forming a conductive layer to be described later, and the film can be densely formed to effectively block the moisture infiltration path, thereby improving moisture resistance reliability of the multilayer electronic component.

Next, as shown in FIG. 5, a conductive layer 130 is formed on the surface of the seed layer 150 by a plating process.

The conductive layer 130 may be made of copper, or copper, nickel, and tin may be sequentially plated to have a multi-layer structure of a copper layer, a nickel layer, and a tin layer.

On the other hand, as another example, the conductive layer may be formed by sequentially plating nickel and tin to form a double layer structure of a nickel layer and a tin layer.

Next, as shown in FIG. 6, polymer layers 141 and 142 made of a material such as epoxy are formed so as to cover both ends in the X direction of the capacitor body 110. The polymer layers 141 and 142 serve as an anti-etching film at the time of etching described later.

7, the portions of the conductive layer 130 not covered by the polymer layers 141 and 142 are etched so that the first and second external electrodes 131 and 132 are separated from each other in the X direction .

8, the seed layer 150 formed on the portion of the capacitor body 110 not covered by the first and second external electrodes 131 and 132 is removed through SiC polishing or the like, The first and second thin film layers 151 and 152 are disposed on the surface of the substrate 110 so as to be spaced apart from each other in the X direction.

At this time, the first and second thin film layers 151 and 152 are interposed between the surface of the capacitor body 110 and the first and second external electrodes 131 and 132.

At this time, the thicknesses of the first and second thin film layers 151 and 152 are 60 nm or less, respectively, and the deviation is 10% or less.

The thickness ratio of the first and second thin film layers 151 and 152 to the center may be 0.9 or more.

Next, the polymer layers 141 and 142 are removed to complete the laminated electronic component 100 shown in Fig.

In the conventional laminated capacitor, the plating solution penetrates through the portion where the density of the external electrode is decreased during the plating process during the fabrication process, thereby damaging the internal electrode and causing reliability failure.

In addition, if lifting phenomenon occurs between the capacitor body and the external electrode during the process, this part becomes an infiltration path of moisture, which degrades the moisture resistance reliability.

In order to improve moisture resistance, a method of forming an organic film by impregnating coating method on the end of the external electrode is disclosed. In this case, a material such as PDMS (Polydimethylsiloxane) can be used.

However, in this impregnation method, when the floating between the capacitor body and the external electrode occurs, some of the gaps can be filled, but when the gap is thin, it is difficult to penetrate to the depth, so that the pore remains inside the external electrode Problems can arise.

However, according to the present embodiment, after the external electrodes are fired, the thin film layer of a multilayer structure can be coated on the entire surface of the multilayer electronic component through a thin film ALD (Atomic Layer Deposition) method, thereby improving moisture resistance reliability.

In addition, when lifting occurs at the interface between the capacitor body and the external electrode, even if the gap is thin, it is possible to penetrate to the depth, thereby preventing the pores from remaining inside the external electrode.

The thus manufactured stacked electronic component can be used for by passing, interstage coupling, filter, etc. of the IT device.

Further, in the conventional external electrode coating process, since the liquid paste is dipped in the vertical direction and then dried, there is a limit in forming the electrodes uniformly while forming a low height.

Further, in the case of dipping, there is a technical limitation in improving the capacity by increasing the effective volume ratio of the multilayer capacitor, and the outer electrode coating shape becomes a shape in which the center is convex and the corner is thinly coated.

For example, the height of the middle outer electrode is about 20 μm, while the height of the electrode at the corner is about 1.5 μm, and the corner / center ratio is 0.07.

Therefore, in a portion where the height of the electrode is low, a radiation crack is generated in the heat treatment process of the electrode, which leads to a moisture permeation path, thereby decreasing the reliability. Further, the outer electrode having a low height formed at the corner portion also becomes a plating liquid and a moisture infiltration path, thereby causing defects.

In the conventional method of forming a thin film external electrode, an MLCC fired chip is entirely deposited by a sputtering method to form a metal thin film, a portion where a band portion is to be formed is formed of a polymer material such as epoxy, And the polymer layer is removed to finally produce a chip in which external electrodes are formed only on the band portion and the WT surface.

In the case of the external electrode formed by such a sputtering method, it is possible to form a uniform external electrode having a low thickness (> 2um) and to increase the corner / center ratio to 0.7 ~ 1.0 level, have.

However, the sputtering method has a new shadowing effect, which limits the uniform coating of the entire chip by a single process.

However, according to the present embodiment, when the conventional sputtering process is used, sputtering of the seed layer twice can be replaced by one ALD process, thereby reducing the number of steps of the entire process.

Further, since the external electrode is formed through the plating process without firing, the electrical connection with the internal electrode can be improved compared to the external electrode formed using the conductive paste (e.g., copper paste) containing impurities such as the conventional dispersant.

In addition, the electrical connection with the internal electrode can be improved by a high step coverage compared to the conventional sputtering process.

In addition, the seed layer formed by the ALD method can bring the corner / center ratio very uniformly at least 0.9 or more, and a dense film can be formed even at a low thickness, thereby greatly improving the moisture resistance reliability. Here, the center is a numerical value of the thickest portion of the connection portions of the external electrodes, and the corner represents the connection portion of the connection portion and the band portion to the corner portion of the external electrode.

For example, when the thin film layer is formed by dipping, the corner / center ratio is on the order of 0.07, and when formed by sputtering, the corner / center ratio is 0.7, which is significantly lower than in the present invention. That is, in the case of the present invention, it is possible to effectively cover the corners even with a thin thickness. At this time, the average values are calculated by measuring 20 or more for each product in each method.

The thus manufactured stacked electronic component can be used for by passing, interstage coupling, filter, etc. of the IT device.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, and that various changes and modifications may be made therein without departing from the scope of the invention. It will be obvious to those of ordinary skill in the art.

110: Capacitor body
111: dielectric layer
121 and 122: first and second inner electrodes
130: conductive layer
131, 132: first and second outer electrodes
141, 142: polymer layer
150: Seed layer
151 and 152: first and second thin film layers

Claims (6)

First and second surfaces opposed to each other, third and fourth surfaces connected to the first and second surfaces and opposed to each other, the first and second surfaces being connected to the third and fourth surfaces, A capacitor including first and second internal electrodes alternately arranged such that one end thereof is exposed through the third and fourth surfaces with a dielectric layer interposed therebetween and a fifth and a sixth surface opposed to each other, body;
First and second thin film layers including at least one of TiN, Ru, Pt, Ir, and Ti, disposed on third and fourth surfaces of the capacitor body, respectively, and connected to the first and second internal electrodes, respectively; And
First and second external electrodes formed on the first and second thin film layers; / RTI >
Wherein the first and second thin film layers each have a thickness of 60 nm or less and a deviation of 10% or less, respectively.
The method according to claim 1,
Wherein the first and second thin film layers have a thickness ratio of a center to a corner of 0.9 or more.
The method according to claim 1,
Wherein the first and second external electrodes comprise copper.
The method according to claim 1,
Wherein the first and second external electrodes are formed of a multilayer structure of a copper layer, a nickel layer, and a tin layer.
The method according to claim 1,
Wherein the first and second external electrodes are formed of a double layer structure of a nickel layer and a tin layer.
The method according to claim 1,
The first thin film layer extending from the third surface of the capacitor body to a portion of the first, second, fifth and sixth surfaces,
Wherein the second thin film layer extends from a fourth surface of the capacitor body to a portion of the first, second, fifth, and sixth surfaces.

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