KR20180046511A - Organic light emitting display device - Google Patents

Abstract

According to the present specification, disclosed is an organic light emitting display device which comprises: a substrate in which a display region having an image represented therein and a non-display region surrounding the display region are defined; a first wire positioned in the non-display region of the substrate; a first planarization layer for planarizing an upper part of the first wire; a second wire positioned on the first planarization layer; and a second planarization layer for planarizing an upper part of the second wire.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light-

The present invention relates to an organic light emitting display.

The image display device that realizes various information on the screen is a core technology of the information communication age and it is becoming thinner, lighter, more portable and higher performance. Accordingly, an organic light emitting display device for displaying an image by controlling the amount of light emitted from the organic light emitting device has attracted attention.

The organic light emitting device is advantageous in that it can be made thin as a self-luminous device using a thin light emitting layer between electrodes. A general organic light emitting display has a structure in which a pixel driving circuit and an organic light emitting element are formed on a substrate, and light emitted from the organic light emitting element passes through a substrate or a barrier layer to display an image.

Since the organic light emitting display device is implemented without a separate light source device, it is easy to be implemented as a flexible display device. At this time, flexible materials such as plastic, metal foil and the like can be used as substrates of organic light emitting display devices.

Recently, as the size and resolution of the organic light emitting display have been reduced, the number of required wirings has increased, but the space for arranging the wirings has become insufficient. In such a situation, it is an important task to secure a space for arranging various elements such as electric wiring. Furthermore, a method of efficiently arranging various parts and elements is being studied.

SUMMARY OF THE INVENTION It is an object of the present invention to propose a wiring arrangement structure applied to an organic light emitting display device and an organic light emitting display device. The problems of the present invention are not limited to the above-mentioned problems, and other problems not mentioned can be clearly understood by those skilled in the art from the following description.

According to an embodiment of the present invention, an organic light emitting display is provided. The organic light emitting diode display includes a substrate on which a display region in which an image is displayed and a non-display region surrounding the display region are defined; A first wiring in a non-display area of the substrate; A first planarization layer for planarizing an upper portion of the first wiring; A second wiring on the first planarization layer; And a second planarization layer for planarizing an upper portion of the second wiring.

The details of other embodiments are included in the detailed description and drawings.

Embodiments of the present invention can provide an organic light emitting display in which the problem of arrangement of leads in a non-display area is improved. More specifically, the embodiments of the present invention can provide an organic light emitting display in which conductors are efficiently arranged in a limited space of an outer frame. Accordingly, the OLED display according to the exemplary embodiment of the present invention can implement a narrow bezel. The effects according to the embodiments of the present invention are not limited by the contents exemplified above, and more various effects are included in the specification.

1 is a plan view showing an organic light emitting display according to an embodiment of the present invention.
2 is a cross-sectional view illustrating a portion of a display region of an OLED display according to an exemplary embodiment of the present invention.
3 is a cross-sectional view illustrating a portion of a non-display region of an organic light emitting display according to a related art.
4A and 4B are views showing a part of a non-display region of the OLED display according to an embodiment of the present invention.

Brief Description of the Drawings The advantages and features of the present disclosure, and how to accomplish them, will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers and the like disclosed in the drawings for describing the embodiments of the present invention are illustrative, and thus the present invention is not limited thereto. Like reference numerals refer to like elements throughout the specification. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. Where the terms "comprises", "having", "done", and the like are used in this specification, other portions may be added unless "only" is used. Unless the context clearly dictates otherwise, including the plural unless the context clearly dictates otherwise. In interpreting the constituent elements, it is construed to include the error range even if there is no separate description.

In the case of a description of the positional relationship, for example, if the positional relationship between two parts is described as 'on', 'on top', 'under', and 'next to' Or " direct " is not used, one or more other portions may be located between the two portions. An element or layer is referred to as being another element or layer "on ", including both intervening layers or other elements directly on or in between. When a component is described as being "connected", "coupled", or "connected" to another component, the component may be directly connected or connected to the other component, Quot; intervening "or that each component may be" connected, "" coupled, "or " connected" through other components.

Although the first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

The sizes and thicknesses of the individual components shown in the figures are shown for convenience of explanation and the present invention is not necessarily limited to the size and thickness of the components shown. Various embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a plan view showing an organic light emitting display according to an embodiment of the present invention.

Referring to FIG. 1, the OLED display 100 includes at least one active area (A / A), and an array of pixels is disposed in the display area. At least one non-display area (I / A) may be disposed around the display area. That is, the non-display area may be adjacent to one or more sides of the display area. In Fig. 1, the non-display area surrounds a display area of a rectangular shape. However, the shape of the display region and the shape / arrangement of the non-display region adjacent to the display region are not limited to the example shown in Fig. The display area and the non-display area may be in a form suitable for the design of the electronic device on which the display device 100 is mounted. Illustrative forms of the display area are pentagonal, hexagonal, circular, oval, and the like.

Each pixel in the display area A / A may be associated with a pixel driving circuit. The pixel driving circuit may include one or more switching transistors and one or more driving transistors. Each pixel driving circuit may be electrically connected to a signal line (a gate line, a data line, and the like) to communicate with a gate driver, a data driver, and the like located in the non-display area.

The gate driver and the data driver may be implemented as a thin film transistor (TFT) in the non-display area I / A. Such a driver may be referred to as a gate-in-panel (GIP). In addition, some components, such as a data driver IC, are mounted on a separate printed circuit board, and circuit films such as flexible printed circuit boards (FPCB), chip-on-film (COF), tape- (Pads, bumps, pins, etc.) disposed in the non-display area. The printed circuit (COF, PCB, etc.) may be located behind the display device 100.

The organic light emitting display 100 may include various additional components for generating various signals or driving pixels in the display area. Additional components for driving the pixel may include an inverter circuit, a multiplexer, an electrostatic discharge (ESD) circuit, and the like. The OLED display 100 may also include additional components associated with functions other than pixel driving. For example, the organic light emitting diode display 100 may include additional elements for providing a touch sensing function, a user authentication function (e.g., fingerprint recognition), a multi-level pressure sensing function, a tactile feedback function, have. The above-mentioned additional elements may be located in the non-display area and / or an external circuit connected to the connection interface.

The organic light emitting display according to the present invention may include a substrate 101 on which a thin film transistor and an organic light emitting diode are arranged, an encapsulation layer 120, a barrier film 140, and the like.

The substrate 101 supports the various components of the organic light emitting diode display 100. The substrate 101 may be formed of a transparent insulating material, for example, an insulating material such as glass, plastic, or the like. The substrate (array substrate) may also be referred to as a concept including an element and a functional layer formed thereon, for example, a switching TFT, a driving TFT connected to the switching TFT, an organic light emitting element connected to the driving TFT,

The organic light emitting element is disposed on the substrate 101. The organic light emitting device includes an anode, an organic light emitting layer, and a cathode. The organic light emitting device may have a single light emitting layer structure that emits one light, or may include a plurality of light emitting layers to emit white light. When the organic light emitting element emits white light, a color filter may further be provided. The organic light emitting element may be formed at the central portion of the substrate 101 to correspond to the display area.

The sealing layer 120 may cover the organic light emitting element. The encapsulation layer protects the organic light emitting device from external moisture or oxygen. A barrier film is placed on the encapsulating layer.

The OLED display 100 may include a plurality of pixels, and one pixel may include a plurality of subpixels. At this time, the subpixel is a minimum unit for expressing one color.

One subpixel may include a plurality of transistors, a capacitor, and a plurality of wirings. The subpixel may be composed of two transistors and one capacitor 2T1C, but it is not limited thereto and may be implemented as a subpixel using 4T1C, 7T1C, 6T2C, and the like. In addition, the sub-pixel may be implemented to be suitable for the organic light emitting display 100 of the top emission type.

2 is a cross-sectional view illustrating a portion of a display region of an OLED display according to an exemplary embodiment of the present invention.

The organic light emitting diode display of Fig. 2 has an exemplary structure in which two planarization layers are formed. In the OLED display 100, thin film transistors 102, 104, 106 and 108, organic light emitting devices 112, 114 and 116 and various functional layers are disposed on a substrate (or an array substrate) .

The substrate 101 may be a glass or plastic substrate. In the case of a plastic substrate, a polyimide-based material or a polycarbonate-based material may be used to have flexibility. In particular, polyimide can be applied to high-temperature processes and is widely used as a plastic substrate because it is a material that can be coated.

The buffer layer 130 is a functional layer for protecting an electrode / electric wire from impurities such as alkali ions or the like flowing out from the substrate 101 or the lower layers. The buffer layer may be formed of silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof. The buffer layer 130 may include a multi-buffer 131 and / or an active buffer 132. The multi-buffer 131 may be formed by alternately stacking silicon nitride (SiNx) and silicon oxide (SiOx), and may delay diffusion of moisture and / or oxygen impregnated into the substrate 101. The active buffer 132 protects the semiconductor layer 102 of the transistor and functions to block various kinds of defects introduced from the substrate 101. The active buffer 132 may be formed of amorphous silicon (a-Si) or the like.

The thin film transistor may have a configuration in which a semiconductor layer 102, a gate insulating film 103, a gate electrode 104, an interlayer insulating film 105, and source and drain electrodes 106 and 108 are sequentially arranged. The semiconductor layer 102 is located on the buffer layer 130. The semiconductor layer 102 may be made of polysilicon (p-Si), in which case a predetermined region may be doped with an impurity. Further, the semiconductor layer 102 may be made of amorphous silicon (a-Si), or may be made of various organic semiconductor materials such as pentacene. Further, the semiconductor layer 102 may be made of oxide. The gate insulating film 103 may be formed of an insulating inorganic material such as silicon oxide (SiOx) or silicon nitride (SiNx), or may be formed of an insulating organic material or the like. The gate electrode 104 may be formed of various conductive materials such as Mg, Al, Ni, Cr, Mo, W, Au, Or the like.

The interlayer insulating film 105 may be formed of an insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), or may be formed of an insulating organic material or the like. A contact hole through which the source and drain regions are exposed may be formed by selective removal of the interlayer insulating film 105 and the gate insulating film 103.

The source and drain electrodes 106 and 108 are formed on the interlayer insulating film 105 in the form of a single layer or a multi-layered structure as an electrode material. If necessary, a passivation layer composed of an inorganic insulating material may cover the source and drain electrodes 106 and 108.

The first planarization layer 107-1 may be located on the thin film transistor. The first planarization layer 107-1 protects the thin film transistor and the like and flattens the upper surface thereof. The first planarization layer 107-1 may be formed in various shapes and may be formed of various materials such as an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylene resin, But are not limited to, at least one of a phenol-based resin and a phenol-based resin.

Various metal layers serving as wires / electrodes may be disposed on the first planarization layer 107-1.

The second planarization layer 107-2 is located on the top of the first planarization layer 107-1. The reason why the planarization layer is two in the present embodiment is attributed to the increase of various signal wirings as the display device evolves to a high resolution. Thus, it is difficult to arrange all the wiring in one layer while ensuring the minimum spacing, so that an additional layer is made. This additional layer (second planarizing layer) provides a margin for wiring arrangement, which makes it easier to design the wire / electrode arrangement. Also, when a dielectric material is used for the planarization layers 107-1 and 107-2, the planarization layers 107-1 and 107-2 may be used to form a capacitance between metal layers It is possible.

The organic light emitting device may have a structure in which a first electrode 112, an organic light emitting layer 114, and a second electrode 116 are sequentially arranged. That is, the organic light emitting device includes a first electrode 112 formed on the planarization layer 107, an organic light emitting layer 114 disposed on the first electrode 112, and a second electrode (not shown) disposed on the organic light emitting layer 114 116).

The first electrode 112 may be electrically connected to the drain electrode 108D of the driving thin film transistor through the connection electrode 108-2. When the organic light emitting display 100 is a top emission type, the first electrode 112 may be made of an opaque conductive material having high reflectance. For example, the first electrode 112 may be formed of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr) . The connection electrode 108-2 may be made of the same material as the source and drain electrodes 106 and 108. [

The bank 110 is formed in the remaining region except for the light emitting region. Accordingly, the bank 110 has a bank hole for exposing the first electrode 112 corresponding to the light emitting region. The bank 110 may be made of an inorganic insulating material such as a silicon nitride film (SiNx), a silicon oxide film (SiOx), or an organic insulating material such as BCB, acrylic resin or imide resin.

The organic light emitting layer 114 is positioned on the first electrode 112 exposed by the bank 110. [ The organic light emitting layer 114 may include a light emitting layer, an electron injection layer, an electron transport layer, a hole transport layer, a hole injection layer, and the like.

And the second electrode 116 is located on the organic light emitting layer 114. When the OLED display 100 is a top emission type, the second electrode 116 may be a transparent conductive layer such as indium tin oxide (ITO) or indium zinc oxide (IZO) Thereby emitting the light generated in the organic light emitting layer 114 to the upper portion of the second electrode 116.

The encapsulation layer 120 is located on the second electrode 116. The sealing layer 120 prevents oxygen and moisture penetration from the outside in order to prevent oxidation of the light emitting material and the electrode material. When the organic light emitting device is exposed to moisture or oxygen, a pixel shrinkage phenomenon in which the light emitting region is reduced or a dark spot in the light emitting region may occur. The encapsulation layer may be made of an inorganic film made of glass, metal, aluminum oxide (AlOx) or silicon (Si) material, or alternatively, an organic film and an inorganic film alternately stacked. The inorganic film serves to block penetration of moisture or oxygen, and the organic film serves to flatten the surface of the inorganic film. The reason why the encapsulation layer is formed of a plurality of thin film layers is to make the movement path of water or oxygen longer and more complicated than in the case of a single layer so as to make penetration of moisture / oxygen into the organic light emitting element difficult.

The barrier film 140 is positioned on the sealing layer 120 to encapsulate the entire substrate 101 including the organic light emitting device. The barrier film 140 may be a phase difference film or an optically isotropic film. When the barrier film has optically isotropic properties, the incident light incident on the barrier film is transmitted without phase delay. Further, an organic film or an inorganic film may be further disposed on the upper or lower surface of the barrier film. The organic film or the inorganic film formed on the upper or lower surface of the barrier film serves to prevent penetration of moisture or oxygen from the outside.

The adhesive layer 145 may be positioned between the barrier film 140 and the encapsulating layer 120. The adhesive layer 145 bonds the sealing layer 120 and the barrier film 140. The adhesive layer 145 may be a thermosetting or natural curing adhesive. For example, the adhesive layer 145 may be made of a material such as B-PSA (Barrier pressure sensitive adhesive).

A touch panel (film), a polarizing film, a top cover, and the like may be further disposed on the barrier film 140.

3 is a cross-sectional view illustrating a portion of a non-display region of an organic light emitting display according to a related art.

The non-display area I / A may be located outside the display area A / A as shown in the figure, and a driving circuit (e.g., GIP), power supply wiring, or the like may be disposed thereon.

The substrate 301 shown in Fig. 3 is the same as the substrate 101 described in Figs. The interlayer insulating film 305, the buffer layer 330, the bank 310 and the organic light emitting elements 312, 314 and 316 are formed by the interlayer insulating film 105, the buffer layer 130, the bank 110, And organic light emitting elements 112, 114, and 116, respectively.

The various driving circuits and the electrodes / wires connected thereto in the non-display area can be made of the gate metal 304 'and / or the source / drain metal 308'. At this time, the gate metal 304 'is formed in the same process as the gate electrode of the TFT, and the source / drain metal 308' is formed in the same process with the same material as the source / drain electrode of the TFT. Meanwhile, the cathode 316 may be supplied with power through a connection with the metal layer 312 '. The metal layer 312 'may be formed of the same material as the anode 312 of the organic light emitting diode.

The conventional organic light emitting display device has the planarization layer 307 as a single layer in the display area A / A and / or the non-display area I / A. In such a single planarized layer structure, a circuit (e.g., GIP) and / or a wiring is placed on the same plane on the bezel. That is, as shown in FIG. 3, the wirings 308 'are arranged on the same layer (for example, the buffer layer 305). This arrangement occupies considerable lateral widths, which limits the implementation of narrower bezels.

Accordingly, the inventors of the present invention have derived a new structure for implementing a narrow bezel.

4A and 4B are views showing a part of a non-display region of the OLED display according to an embodiment of the present invention.

In the organic light emitting display shown in FIGS. 4A and 4B, a structure for implementing a narrow bezel is applied. 4A and 4B, the same constituent elements as those of FIGS. 1 and 2 are denoted by the same reference numerals, and a duplicate description thereof will be omitted.

In the illustrated embodiment, a planarization layer is provided in two layers 107-1 and 107-2. This is to accommodate a wiring structure extending to a high resolution screen as described above.

The first planarizing layer 107-1 flattens the top of various circuit elements (thin film transistors, capacitors, conductors, etc.) on the substrate. A protective layer 109-1 made of an inorganic material may be disposed between the first planarization layer 107-1 and the circuit element. Above the first planarization layer 107-1, various functional metal layers may be disposed. At this time, inorganic layers 109-2 and 109-3 for arranging the metal layers may be provided on the first planarization layer 107-1. For example, the inorganic layer includes a buffer layer 109-2 and a protective layer 109-3. The metal layer may be disposed on the buffer layer 109-2 and covered with a protective layer 109-3.

The organic light emitting devices 112, 114, and 116 may be disposed on the second planarization layer 107-2. At this time, a metal layer 112 'connected to the organic light emitting device may be disposed on the second planarization layer 107-2. An encapsulation layer covers the top of the organic light emitting device. The sealing layer may be composed of an inorganic film made of glass, metal, aluminum oxide (AlOx) or silicon (Si) based material, or alternatively, an organic film and an inorganic film alternately stacked.

The wirings 108-1 and 108-2 on the outer side are arranged in two or more layers. The wirings may be wires that transmit signals and / or power to various drive circuits (gate drive circuits, data drive circuits, etc.). For example, the wirings 108-1 and 108-2 of the outer frame may be disposed above and below the first planarization layer 107-1, respectively. That is, the first wiring 108-1 is disposed on the buffer layer 130 and / or the insulating layer 105 on the substrate 101, and the second wiring 108-2 is disposed on the first planarization layer 107-1 ) And the second planarization layer 107-2.

4A is a plan view of an OLED display according to an embodiment of the present invention. The wirings are arranged at a boundary portion between a display region and a non-display region of the organic light emitting display, and are disposed in two or more layers. Referring to FIG. 4B, the first wiring 108-1 and the second wiring 108-2 are arranged vertically with the first planarization layer 107-1 interposed therebetween, and at least part of the first wiring 108-1 and the second wiring 108-2 overlap each other in the vertical direction . The shape, size, and density of the wiring arrangement shown are exemplary only, and the spirit of the present specification is not limited thereto. In another embodiment, the first wirings 108-1 and the second wirings 108-2 may be provided so as not to overlap with each other in the vertical direction.

Referring to FIG. 4B, the substrate 101 is defined by a display area A / A in which an image is displayed and a non-display area I / A surrounding the display area. The first wiring 108-1 and the non- And the second wiring 108-2 is in the non-display area I / A. The first wiring 108-1 may be made of the same material as the source and drain electrodes 106 and 108 of FIG. The second wiring 108-2 may be made of the same material as the connection electrode 108-2 or the source / drain electrode of FIG. For example, the first wiring 108-1 is a wiring associated with a gate-in-panel (GIP) circuit and the second wiring 108-2 is a wiring associated with a GIP Can be wiring. Meanwhile, the substrate 101 may be a flexible substrate having flexibility.

The first planarization layer 107-1 is planarized on the first wiring 108-1 and the second wiring 108-2 is disposed on the first planarization layer 107-1. Then, the second planarization layer 107-2 planarizes the upper portion of the second wiring 108-2.

The buffer layer 130, the insulating layer 105, and the like may be positioned between the substrate 101 and the first wiring 108-1. An inorganic layer 109-1 covering the first wiring 108-1 may be located under the first planarization layer 107-1. A buffer layer 109-2 covering the upper portion of the first planarization layer 1047-1 may be located below the second wiring 108-2.

A metal layer 112 'may be positioned on the second planarization layer 107-2. The cathode 116 may be powered through a connection with the metal layer 112 '. Here, the metal layer 112 'may be a metal made of the same material as the anode 112 of the organic light emitting diode. That is, the metal layer 112 'may serve as a lead for transmitting a power supply voltage to the cathode 116. As shown in FIG. 4B, the metal layer 112 'may contact the cathode at an upper portion of the first wiring 108-1 and the second wiring 108-2.

The first wiring 108-1 and the second wiring 108-2 can be arranged without a short through the multilayer structure shown in the drawing, and the occupation width thereof can be reduced. Experiments have confirmed that the width of the bezel (non-display area) is reduced by 15 to 20% through such multilayer wiring arrangement.

While the embodiments of the present invention have been described in detail with reference to the accompanying drawings, it is to be understood that the present invention is not limited to these embodiments, and various modifications may be made without departing from the scope of the present invention. Therefore, the embodiments disclosed herein are for the purpose of describing rather than limiting the technical spirit of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. It is to be understood that each of the features of the various embodiments of the present invention may be combined or combined with each other, partially or wholly, and may be technically variously interlocked and driven by one of ordinary skill in the art and that each embodiment may be implemented independently of one another, .

The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents should be construed as falling within the scope of the present invention.

Claims (10)

A substrate on which a display region in which an image is displayed and a non-display region surrounding the display region are defined;
A first wiring in a non-display area of the substrate;
A first planarization layer for planarizing an upper portion of the first wiring;
A second wiring on the first planarization layer; And
And a second planarization layer for planarizing an upper portion of the second wiring. The method according to claim 1,
And a buffer layer disposed between the substrate and the first wiring. The method according to claim 1,
And an inorganic layer covering the first wiring and below the first planarization layer. The method according to claim 1,
Further comprising a buffer layer covering the top of the first planarization layer and below the second wiring. The method according to claim 1,
Wherein at least a part of the first wiring and the second wiring overlap each other in the vertical direction. 6. The method of claim 5,
Further comprising a metal layer on the second planarization layer, wherein the metal layer is in contact with a cathode at an upper portion of the first wiring and the second wiring. The method according to claim 6,
Wherein the metal layer serves as a lead for transmitting a power supply voltage to the cathode. The method according to claim 1,
Wherein the first wiring is a wiring associated with the GIP circuit. 9. The method of claim 8,
And the second wiring is a wiring for transmitting a control signal to the GIP circuit. The method according to claim 1,
Wherein the substrate is a flexible substrate.

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