KR20150131540A - puncturing apparatus and puncturing method thereof - Google Patents

Abstract

Disclosed is a puncturing apparatus. The present puncturing apparatus comprises: an interleaver which is configured with a plurality of rows and columns, writes inputted codeword bits in the columns, and performs interleaving by reading each row in the columns having codeword bits written therein; and a puncturing unit for puncturing the preset number of bits among bits outputted from the interleaver.

Description

≪ Desc / Clms Page number 1 > PUNCTURING APPARATUS AND PUNCTURING METHOD THEREOF &

The present invention relates to a perforating apparatus and a perforating method thereof, and more particularly, to a perforating apparatus for perforating a predetermined number of bits and a perforating method thereof.

The polar codes are error correction codes developed by Arikan in 2009 and are theoretically codes that achieve channel capacity in a binary input discrete memoryless symmetric channel . However, when a pole code is designed with a 2x2 kernel matrix, there is a disadvantage that the length of the code is limited to a power of two.

The polar sign is generated by a generator matrix G of K × N size generated based on the channel polarization phenomenon. Here, the G matrix is a matrix composed of binary values, where N = 2 ⁿ (n is a natural number of 1 or more), and K is a natural number of N or less.

Accordingly, a polar codeword x corresponding to u, which is a row vector of length K composed of binary values, can be calculated as Equation (1).

Here, the addition of binary values is performed by a modulo-2 operation, and the polar codeword x is a row vector of length N consisting of binary values. At this time, the pole codeword x changes according to the change of the u value. The mapping relation of u and x is referred to as a polar code.

On the other hand, since the length N of the polar sign has only a power value of 2, there is a problem that the length of the sign is limited.

One of the methods used to solve this problem is the puncturing technique. Perforation is a method of varying the code length and code rate without removing some of the bits constituting the codeword. At this time, the code before puncturing can be referred to as a mother code.

Meanwhile, FIG. 1 shows an example of puncturing 3 bits (= p) with respect to a polar sign having K = 4 and N = 8 when puncturing bits are p.

1, when the pole codeword x corresponding to the generated u through the generation matrix G x _0, x _1, x _2, is x _3, x _4, x _5, x _6, x _7-bit configuration, Puncturing the x ₁ , x ₄ , and x ₇ bits out of the eight codeword bits leaves only the remaining x ₀ , x ₂ , x ₃ , x ₅ , and x ₆ bits.

Since such a puncturing scheme can be performed on a bit-by-bit basis, theoretically, all code lengths smaller than N can be created. On the other hand, when puncturing is performed, various puncturing patterns may exist depending on N and p, and even if the same number of bits are punctured, error rate performance of code varies according to puncturing pattern, It is important.

One of the puncturing methods for polar codes is quasi-uniform puncturing. The quasi-uniform puncturing scheme is a technique for aligning the indexes of the polar codeword bits in bit-reversal order and then puncturing the codeword bits corresponding to the corresponding index in order.

In order to perform bit-reversed sorting, bit indexes of 0, 1, ..., N-1 are expressed by n bits with respect to a code length N = 2 ⁿ . For example, index 0 may be expressed as 00 ... 0, index 1 as 00 ... 1, ..., and index N-1 as 11 ... 1. Then, all the converted n bits are rotated symmetrically, and then the corresponding bits are changed to a decimal index again.

An example of such a method is shown in FIG. 2 in which a bit-reversed order is generated for N = 4 or N = 8. Specifically, FIG. 2 (a) shows a method for generating a bit-reversed order for N = 4, and FIG. 2 (b) shows a method for generating a bit-reversed order for N = 8.

After aligning the bit indices in bit-reverse order with respect to length N, p codeword bits are punctured in order from the beginning. For example, in the case of FIG. 2 (a), when N = 4 and p = 2, if puncturing is performed by the quasi-uniform method, x ₀ and x ₂ bits are punctured and N = 8 and p = 2, then puncturing in a quasi-uniform manner would result in x ₀ , x ₄ bits being punctured.

On the other hand, the quasi-uniform puncturing scheme allows the design of polar codes of various lengths through simple bit-reverse sorting and sequential puncturing, but there is a problem that the puncturing order is uniquely determined. That is, even if the order of the bits to be punctured is changed by one, the puncturing is performed by another method.

Accordingly, it is not difficult to design a perforation technique having a similar erroneous performance while avoiding a quasi-uniform perforation technique. Therefore, a solution to such a problem is sought.

It is an object of the present invention to provide various types of pole-puncturing patterns using an interleaver in a puncturing technique.

According to an aspect of the present invention, there is provided a puncturing apparatus including a plurality of columns and a plurality of rows, the apparatus comprising: a plurality of columns and rows for inputting codeword bits to the plurality of columns, An interleaver which performs interleaving by reading each row of the plurality of columns and a puncturing unit which punctures a predetermined number of bits among the bits output from the interleaver.

Here, the interleaver may sequentially write the input codeword bits from the first row of the first column to the last row of the last column of the plurality of columns.

The interleaver may rearrange the order of the plurality of columns in which the codeword bits are written, and sequentially read the codeword bits written in the respective rows of the plurality of columns in which the order is rearranged.

The puncturing unit may sequentially puncture a predetermined number of bits out of the bits output from the interleaver.

Meanwhile, a puncturing method according to an embodiment of the present invention uses an interleaver composed of a plurality of columns and rows to write input codeword bits to the plurality of columns, Performing interleaving by reading a row and puncturing a predetermined number of bits out of bits output from the interleaver.

The interleaving may sequentially write the input codeword bits from the first row of the first column to the last row of the last column of the plurality of columns.

In addition, the interleaving may sequentially rearrange the order of the plurality of columns in which the codeword bits are written, and then sequentially write the codeword bits written in the respective rows of the plurality of ordered columns.

The puncturing step may sequentially puncture a predetermined number of bits out of the bits output from the interleaver.

According to various embodiments of the present invention, a puncturing pattern for various types of polar codes can be defined according to the structure and operation method of the interleaver in that an interleaver is used in puncturing a polarity code.

1 is a diagram showing an example of performing puncturing on a polar sign,
2 is a diagram illustrating a method for generating a bit-reversed order,
3 is a block diagram for explaining a configuration of a punching apparatus according to an embodiment of the present invention;
4 is a view for explaining a structure of an interleaver according to an embodiment of the present invention;
FIGS. 5 to 8 illustrate interleaving operations of an interleaver according to an embodiment of the present invention, and FIGS.
9 is a flowchart illustrating a puncturing method according to an embodiment of the present invention.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

3 is a block diagram for explaining a configuration of a punching apparatus according to an embodiment of the present invention. Referring to FIG. 3, the puncturing apparatus 100 includes an interleaver 110 and a perforation 120.

The interleaver 110 performs interleaving on the input codeword bits. For this purpose, the interleaver 110 may be composed of a plurality of columns and rows.

In this case, the number of columns and rows constituting the interleaver 110 can be determined based on the number of bits of codeword bits input.

For example, assume that the input bits are N = 2 ^n- bit codeword bits x = [x ₀ , x ₁ , ..., x _{N -1} ] generated by the polar sign. In this case, as shown in FIG. 4, the interleaver 110 includes N _c = 2 ^m (1? ^M? N-1) columns, and each column is composed of N _r = N / N _c rows .

In this manner, when the interleaver 110 is composed of a plurality of columns and rows, the interleaver 120 writes the input codeword bits into a plurality of columns, and outputs each row of the plurality of columns in which codeword bits are written And interleaving can be performed by reading. Reference is made to Fig. 5 for a more detailed description.

Specifically, the interleaver 110 can sequentially write bits input from the first row to the last column of the last column of the first column among the plurality of columns.

5 (a), when the codeword bits x = [x ₀ , x ₁ , ..., x _N-1 ] are input, the interleaver 110 outputs the first row Added to the bit x _0, and can light by one of x _1, x _2, ... bits to the light in the column direction N _c codeword bits from the row in the first column.

Thereafter, the interleaver 110 can sequentially write the next bit of the written bit in the last row of the first column from the first row to the last row of the second column. Then, the interleaver 110 repeats this operation to the third column, the fourth column, ..., the last column, and writes the bits in the column direction in each row of all the columns.

In this way, the interleaver 110 writes bits from the first row to the last row of the column, writes the bits from the first row to the last row in the next column when bits are written to all the rows of the column, You can write.

Thereafter, the interleaver 110 may rearrange the order of the plurality of columns in which the codeword bits are written.

In this case, the interleaver 110 may rearrange the order of the plurality of columns in which the codeword bits are written in bit-reverse order as shown in FIG. 5 (b).

More specifically, the interleaver 110 is 2 ^m dogs given a plurality of column indexes 0,1, ..., 2 ^m -1, and each consisting of, an index given to each column, and n bits representing the bit corresponding to each column And rearranging the plurality of columns by rearranging the corresponding bits to a decimal index.

For example, when the interleaver 110 is composed of four columns, the indexes 0, 1, 2, and 3 may be sequentially assigned from the first column to the fourth column. Lt; / RTI > Accordingly, if each bit corresponding to each column is symmetrically shifted, it becomes 00, 10, 01, and 11, and if it is changed to a decimal number, it becomes 0, 2, Accordingly, the interleaver 110 is arranged so that the first column is the first, the second column is the third, the third column is the second, and the fourth column is the fourth. You can rearrange the order of the columns.

In the above example, the codeword bits are written in a plurality of columns, and the order of the plurality of columns in which the codeword bits are written is rearranged. However, this is merely an example.

That is, if information on the sort order according to the bit-reversed order of the columns of the interleaver 110 is stored in the puncturing apparatus 100, the interleaver 110 sequentially writes the input bits into a plurality of columns, It is possible to sequentially write the bits inputted using the pre-stored information into the column corresponding to the sort order according to the bit-reverse order, instead of reordering the order of the plurality of columns written in bit-reverse order.

In the above example, the interleaver 110 determines that the existing first column in which the bits are written is first, the existing second column in which the bits are written is the third, and the existing third column in which the bits are written The second is to rearrange the input bits into the first, third, second, and fourth columns, not the order of the multiple columns so that the existing fourth column written with the bits is fourth. .

Thereafter, the interleaver 110 may sequentially read the codeword bits written to each row of the plurality of ordered columns.

Specifically, the interleaver 110 may sequentially read the codeword bits written in each row of the plurality of ordered columns. That is, as shown in FIG. 5C, the interleaver 110 reads the bits written in the first row of all the columns in the row direction, reads the bits written in the second row of all the columns in the row direction, , The bits written to the last row of all the rows can be read in the row direction.

For example, as shown in FIG. 6, codeword bits x = [x ₀ , x ₁ , ..., x ₁₅ ] are input to the interleaver 110, and the interleaver 110 includes 4 It is assumed that the interleaving is performed using the four columns. That is, it is assumed that the interleaver 110 performs interleaving for N = 16 and _Nc = 4.

First, as shown in FIG. 6 (a), codeword bits x = [x ₀ , x ₁ , ..., x ₁₅ ] input to the interleaver 110 are sequentially output from the first column to the fourth column Lt; / RTI > Thereafter, the order of the columns is rearranged by bit-reverse sorting so that the order of the existing second column and the existing third column are changed as shown in FIG. 6 (b). That is, the existing first column continues to maintain the first, the existing second column is changed to the third order, the existing third column is changed to the second, and the existing fourth column continues I can keep the fourth.

Since, in Fig. 6 when read, the bits in the fourth row in order from the first row of four column as shown in (c), the interleaver _{(110) [x 0, x} 8, x 4, x 12, x 1, x 9, _{x 5, x 13, x 2} , x 10, x 6, x 14, x 3, x 11, x 7, there codeword bits can be output with the same order as x _15].

The puncturing unit 120 may puncture a predetermined number of bits among the bits output from the interleaver 110. Herein, the puncturing means does not transmit a part of the codeword bits, and the puncturing apparatus 100 may store information on the number of punctured bits and the like.

Specifically, the perforator 120 may sequentially puncture a predetermined number of bits among the bits output from the interleaver 110. That is, the puncturing unit 120 punctures a predetermined number of bits in the order of the bits output from the interleaver 110.

For example, as described above, [x ₀ , x ₈ , x ₄ , x ₁₂ , x ₁ , x ₉ , x ₅ , x ₁₃ , x ₂ , x ₁₀ , x ₆ , x ₁₄ , x ₃ , x ₁₁ , x ₇ , x ₁₅ ] are output from the interleaver 110 and p bits are punctured. In this case, the puncturing unit 120 may puncture p bits sequentially from x ₀ bits.

Thus, it is possible to design a polar code having T different lengths by puncturing a mother code having a codeword length of N. [ The lengths (L ₁ , L ₂ , ..., L _T ) of the _T punctured poles with different lengths are N / 2 <L ₁ <L ₂ <... <L _T <N.

According to an embodiment of the present invention, a puncturing pattern for various types of polar codes can be defined according to the structure and operation method of the interleaver in that an interleaver is used in puncturing a polar code.

In the above example, codeword bits are directly interleaved through the interleaver 110, but this is merely an example. That is, the interleaver 110 interleaves the indexes of the codeword bits, not the codeword bits themselves, and the perforator 120 may puncture the codeword bits having the index sequentially output from the interleaver 110.

In the above example, the interleaver 110 sequentially reads the bits from the first row to the last row of the plurality of columns and outputs the bits that have been written in a plurality of columns, but this is merely an example.

That is, the puncturing apparatus 100 may be provided with a separate memory, and the interleaver 110 may perform a read operation using a memory (not shown) according to the number of bits to be punctured. In this manner, when the interleaver 110 performs a read operation using a memory (not shown), the interleaver 110 may not separately perform an operation of redefining the order of a plurality of columns.

Specifically, for example, assume that p _i = NL _i bits are punctured to design a code having a length of L _i .

In this case, if p _i is greater than or equal to 2 ^m and has a power of 2, the interleaver 110 may sequentially perform a read operation from the first row to the last row of the plurality of columns as described above.

However, when p _i is smaller than 2 ^m , or when p _i is greater than or equal to 2 ^m but not in the form of a power of 2, the interleaver 110 can perform a read operation using a memory (not shown) have. Hereinafter, how the interleaver 110 performs a read operation using a memory (not shown) will be described in detail.

를 z 보다 큰 최소의 정수를 구하는 연산 기호로 정의하고, mod(a,b)를 a를 b로 나누었을 때의 나머지를 구하는 연산 기호로 정의한다. first,

Is defined as an operation symbol for obtaining a minimum integer greater than z, and mod (a, b) is defined as an operation symbol for obtaining the remainder when a is divided by b.

과 같을 때, 인터리버(110)는 j-1 개의 행까지는 첫 번째 행부터 순차적으로 리드를 수행한다. 즉, 인터리버(110)는 부호어 비트들이 라이트된 복수의 열의 첫 번째 행에 라이트된 부호어 비트들을 리드하고, 복수의 열의 두 번째 행에 라이트된 부호어 비트들을 리드하고,..., 복수의 열의 j-1 번째 행에 라이트된 비트들을 리드하여, 복수의 열의 첫 번째 행부터 j-1 번째 행까지 각 행에 라이트된 비트들을 순차적으로 리드할 수 있다.in this case,

, The interleaver 110 sequentially reads from the first row to j-1 rows. That is, the interleaver 110 reads the codeword bits written in the first row of the plurality of columns in which the codeword bits are written, reads the codeword bits written in the second row of the plurality of columns, The bits written in the j-1 &lt; th &gt; row of the column of the column of the first row to the j-1 &lt; th &gt;

Thereafter, the interleaver 110 performs a read operation for the j-th row using a memory (not shown) storing information on the positions of columns in which the modulated bits (p _i , N _c ) are written .

To this end, the memory (not shown) may store information on the positions of columns in which mod (p _i , N _c ) bits to be punctured are written.

In this case, the interleaver 110 may perform reading from the column in which the bits to be punctured are written using the position information stored at the time of reading for the j-th row.

=2이고, mod(6,4)=2가 된다.For example, assume that N = 16, _Nc = 4, and p _i = 6. In this case, j =

= 2, and mod (6, 4) = 2.

In this case, as shown in FIG. 7, the interleaver 110 may read the codeword bits written in the first row of the four columns and output x ₀ , x ₄ , x ₈ , and x ₁₂ . Thereafter, the interleaver 110 may perform the read operation using the information on the location previously stored in the memory (not shown) when reading the second row.

For example, if 2 = mod (6, 4) punctured bits are stored in the memory (not shown) and the indexes 2 and 4 of the column to which the bit to be punctured has been stored are stored, 110 can perform reading from the column in which the bits to be punctured at the time of reading for the second row are written using the information about the previously stored position. That is, in the case of the second row, the interleaver 110 may read x ₅ written in the second column, read x ₁₃ written in the fourth column, and sequentially read the bits written in the remaining columns.

Accordingly, the bits may be output in the order of [x ₀ , x ₄ , x ₈ , x ₁₂ , x ₅ , x ₁₃ , ...] in the interleaver 110, X ₀ , x ₄ , x ₈ , x ₁₂ , x ₅ , and x ₁₃ among the bits output from the bitstream generator 110 may be punctured.

As another example, in a memory (not shown), when mod (p _i , N _c ) bits to be punctured are written to adjacent columns, information about the position of the column in which one of these punctured bits is written may be stored .

In this case, the interleaver 110 may perform reading from the column in which the bits to be punctured are written using the position information stored at the time of reading for the j-th row.

=2이고, mod(6,4)=2가 된다.For example, assume that N = 16, _Nc = 4, and p _i = 6. In this case, j =

= 2, and mod (6, 4) = 2.

8, the interleaver 110 may read the codeword bits written in the first row of the four columns and output x ₀ , x ₄ , x ₈ , and x ₁₂ . Thereafter, the interleaver 110 may perform the read operation using the information on the location previously stored in the memory (not shown) when reading the second row.

For example, when the index 2 of the column to which the bit to be punctured is pre-stored is stored in the memory (not shown) as information on the position of the column in which one of 2 = mod (6, 4) bits is written, Can sequentially read two bits from the column in which the bits to be punctured in the read operation for the second row are written using the information on the previously stored position.

That is, in the case of the second row, the interleaver 110 reads x ₅ written in the second column, reads x ₉ written in the third column sequentially adjacent to the second column, and sequentially writes the bits written in the remaining columns can do.

Accordingly, the bits may be outputted in the order of [x ₀ , x ₄ , x ₈ , x ₁₂ , x ₅ , x ₉ , ...] in the interleaver 110, X ₀ , x ₄ , x ₈ , x ₁₂ , x ₅ , and x ₉ of the bits output from the demodulator 110 may be punctured.

In the above example, the interleaver 110 performs the read operation using a memory (not shown), but this is merely an example. In other words, when an index of bits to be punctured is stored in a memory (not shown), the puncturing unit 120 extracts bits having an index pre-stored in a memory (not shown) among codeword bits output from the interleaver 110, Lt; / RTI &gt;

9 is a flowchart illustrating a puncturing method according to an embodiment of the present invention.

In operation S910, codeword bits input into the plurality of columns are written using an interleaver configured by a plurality of columns and rows, and each row of the plurality of columns in which the codeword bits are written is read and interleaved.

Specifically, codeword bits input from the first row to the last row of the last column of the first column among the plurality of columns can be sequentially written. Then, the codeword bits can be rearranged in the order of the plurality of columns in which the codeword bits are written, and then the codeword bits written in each row of the plurality of ordered columns can be sequentially read.

Thereafter, a predetermined number of bits are punctured from the bits output from the interleaver (S920). In this case, it is possible to sequentially puncture a predetermined number of bits out of the bits output from the interleaver.

Concrete methods for interleaving and puncturing the input codeword bits have been described above.

Meanwhile, a non-transitory computer readable medium having a program for sequentially performing the puncturing method according to the present invention may be provided.

A non-transitory readable medium is a medium that stores data for a short period of time, such as a register, cache, memory, etc., but semi-permanently stores data and is readable by the apparatus. In particular, various applications or programs may be stored on non-volatile readable media such as CD, DVD, hard disk, Blu-ray disk, USB, memory card, ROM,

Also, although a bus is not shown in the above-described block diagram of the punching apparatus, the communication between the respective elements in the punching apparatus may be performed through a bus. The punching apparatus may further include a processor such as a CPU, a microprocessor, or the like that performs the various steps described above.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the present invention.

100: Perforation device 110: Interleaver
120: Thorough study

Claims (8)

In the punching apparatus,
An interleaver configured by a plurality of columns and rows for writing input codeword bits to the plurality of columns and for reading each row of the plurality of columns in which the codeword bits are written to perform interleaving; And
And a puncturing unit puncturing a predetermined number of bits among the bits output from the interleaver. The method according to claim 1,
The interleaver includes:
And sequentially writes the input codeword bits from the first row of the first column to the last row of the last column of the plurality of columns. The method according to claim 1,
The interleaver includes:
Rearranges the order of the plurality of columns in which the codeword bits are written, and sequentially reads the codeword bits written into each row of the plurality of columns in which the order is rearranged. The method according to claim 1,
Wherein the perforations
And punctures a predetermined number of bits sequentially out of bits output from the interleaver. In the punching method of the punching apparatus,
Writing interleaved codeword bits into the plurality of columns using an interleaver configured by a plurality of columns and rows and reading and interleaving each row of the plurality of columns in which the codeword bits are written; And
Puncturing a predetermined number of bits among the bits output from the interleaver. 6. The method of claim 5,
The step of performing the interleaving includes:
Wherein the input codeword bits are sequentially written from the first row of the first column to the last row of the last column of the plurality of columns. 6. The method of claim 5,
The step of performing the interleaving includes:
And rearranging the order of the plurality of columns in which the codeword bits are written, and sequentially reading the codeword bits written into each row of the plurality of columns in which the order is rearranged. 6. The method of claim 5,
Wherein the boring comprises:
And puncturing a predetermined number of bits sequentially out of bits output from the interleaver.

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