KR20150003787A - Method of epitaxial germanium tin alloy surface preparation - Google Patents

Method of epitaxial germanium tin alloy surface preparation Download PDF

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KR20150003787A
KR20150003787A KR1020147030889A KR20147030889A KR20150003787A KR 20150003787 A KR20150003787 A KR 20150003787A KR 1020147030889 A KR1020147030889 A KR 1020147030889A KR 20147030889 A KR20147030889 A KR 20147030889A KR 20150003787 A KR20150003787 A KR 20150003787A
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layer
gesn
sigesn
temperature
surface
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KR1020147030889A
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Korean (ko)
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에롤 안토니오 씨. 산체스
이-치아우 후앙
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어플라이드 머티어리얼스, 인코포레이티드
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Priority to US13/456,500 priority Critical patent/US8647439B2/en
Priority to US13/456,500 priority
Application filed by 어플라이드 머티어리얼스, 인코포레이티드 filed Critical 어플라이드 머티어리얼스, 인코포레이티드
Priority to PCT/US2013/036534 priority patent/WO2013162930A1/en
Publication of KR20150003787A publication Critical patent/KR20150003787A/en

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments
    • H01L21/02661In-situ cleaning
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/0245Silicon, silicon germanium, germanium
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/02452Group 14 semiconducting materials including tin
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
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    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02535Group 14 semiconducting materials including tin
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching

Abstract

There is provided a method of preparing a cleaned surface of germanium tin or silicon germanium tin layers for subsequent deposition. Placing a substrate having an exposed germanium tin or silicon germanium tin layer in a processing chamber, heating the processing chamber, and introducing halide gas into the processing chamber to etch a surface of the substrate using thermal or plasma assisted etching Doped Ge, another GeSn or SiGeSn layer, a doped GeSn or SiGeSn layer on the prepared GeSn or SiGeSn layer by depositing an upper layer on the surface substantially free of oxides and contaminants, Or an upper layer of metal may be deposited. The methods may also include disposition and etching of the sacrificial layer, thermal cleaning using rapid thermal annealing, or a process in a plasma of nitrogen triflate and ammonia gas.

Description

METHOD OF EPITAXIAL GERMANIUM TIN ALLOY SURFACE PREPARATION BACKGROUND OF THE INVENTION [0001]

The techniques described herein relate to surface preparation of germanium tin (GeSn) or silicon germanium tin (SiGeSn) layers for subsequent deposition.

Germanium was one of the first materials used for semiconductor applications such as CMOS transistors. However, since silicon is very abundant compared to germanium, the overwhelming semiconductor material chosen for CMOS fabrication was silicon. As device geometry shrinks according to Moore's Law, the size of the transistor components is a challenge to engineers who are working to create devices that use smaller, faster, lower power and generate less heat. . For example, as the size of the transistor decreases, the channel region of the transistor becomes smaller, the feasibility of the channel's electronic attributes becomes lower, and it has greater resistivity and higher threshold voltage.

By using silicon-germanium stressors inserted in the source / drain regions, the carrier mobility in the silicon channel region is increased, which increases the intrinsic mobility of silicon . However, for future nodes, much higher mobility devices are needed.

Conversion to materials of higher mobility than silicon, such as germanium for pMOSFETs, has been proposed. However, if germanium is not strained, the mobility of germanium is not superior to that of strained silicon. Recently, it has been found that germanium tin (GeSn) grown on the source drain region has a strain that is essential for making good germanium pMOSFET channels, which exploits the germanium / GeSn lattice mismatch. GeSn and silicon germanium tin (SiGeSn) also have a much higher mobility than Ge, and thus they can potentially be used alone in channel applications.

However, during the formation of the GeSn layer and subsequent processing, the surface can be affected or oxidized by other impurities, which affects the subsequent deposition of any overlayer. The top layer material may comprise Ge, doped Ge, a GeSn layer, a SiGeSn layer, a doped GeSn layer, a doped SiGeSn layer, an insulator or a metal. Unlike silicon surfaces, germanium surfaces are not effectively passivated by oxide formation. The formation of unstable germanium oxides under atmospheric conditions causes point defects in the surface, which can cause defects in subsequently deposited layers. Thus, there is a need for a method of preparing the surface of GeSn or SiGeSn for subsequent top layer deposition.

A method of preparing a surface of germanium tin (GeSn) or silicon germanium tin (SiGeSn) layers for subsequent deposition is provided. In one or more embodiments, the method includes positioning a substrate having an exposed GeSn or SiGeSn layer in a process chamber, heating the process chamber to a first temperature, flowing an etch gas, such as halide gas, Etching the surface of the substrate using thermal etching or plasma assisted etching at a first temperature, depositing an overlayer on top of the cleaned surface, Ge, a doped Ge, a GeSn layer, a SiGeSn layer on a GeSn or SiGeSn layer prepared by Ge, a doped Ge, a GeSn layer, a SiGeSn layer, a doped GeSn layer, a doped SiGeSn layer, , A doped GeSn layer, a doped SiGeSn layer, an insulator or a layer of metal may be deposited.

In one or more embodiments, a method of preparing a surface of germanium tin (GeSn) or silicon germanium tin (SiGeSn) layers comprises depositing a protective sacrificial protective germanium layer on the surface of the GeSn or SiGeSn layer, a germanium layer is deposited after GeSn or SiGeSn layer formation and before the wafer is transferred out of the processing chamber, transferring the wafer to a second processing chamber where further deposition is to be performed, Removing the sacrificial germanium layer prior to depositing another layer at the top of the cleaned surface, and removing the sacrificial germanium layer from the cleaned surface at a first temperature, ) To expose the GeSn or SiGeSn surface, the surface of the substrate is etched using thermal or plasma assisted etching at a first temperature May comprise the steps, and the top layer may include a Ge doped Ge, GeSn layer, SiGeSn layer, doped GeSn layer, an SiGeSn doped layer, an insulator or a metal.

In other embodiments, as methods of preparing the surface of the germanium tin (GeSn) or silicon germanium tin (SiGeSn) layer, comprising: placing a substrate having an exposed GeSn or SiGeSn layer in a process chamber, a constant pressure H 2 Heating the chamber to a first temperature while maintaining the flow of H 2 , the temperature being higher than 450 ° C and being maintained for a short period of time, stopping the flow of H 2 into the chamber And cooling the chamber to a second temperature that may be less than 400 ° C, prior to depositing another layer on top of the cleaned GeSn or SiGeSn surface, wherein the top layer comprises Ge, a doped Ge, a GeSn layer, a SiGeSn layer , A doped GeSn layer, a doped SiGeSn layer, an insulator, or a metal.

In yet another embodiment, a method of preparing a cleaned GeSn or SiGeSn surface includes positioning a substrate in a processing chamber, the substrate including an exposed GeSn or SiGeSn layer, adjusting the processing chamber to a first temperature, Flowing the NF 3 and NH 3 plasma gas mixture into the process chamber at a first temperature to form a salt mixture, the salt mixture comprising surface contaminants, 2; placing the cleaned substrate in a deposition chamber in which a vacuum is maintained; and depositing an upper layer on top of the cleaned surface, wherein the upper layer comprises Ge, a doped Ge, a GeSn layer , A SiGeSn layer, a doped GeSn layer, a doped SiGeSn layer, an insulator, or a metal.

The halide gas may include chlorine or hydrogen chloride. The dopant may comprise one of boron (B), phosphorus (P), or arsenic (As).

In order that the features of the invention described above may be understood in detail, a more particular description of the invention, briefly summarized above, may be referred to for embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, since the invention may admit to other embodiments of the same effect.
1 is a flow chart summarizing a method according to an embodiment.
2 is a flow chart summarizing a method according to another embodiment.
Figure 3 is a flow chart summarizing a method according to a further embodiment.
Figure 4 is a flow chart summarizing the method according to a further embodiment.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that the components disclosed in one embodiment may be advantageously utilized in other embodiments without specific reference.

A method of preparing a surface of germanium tin (GeSn) or silicon germanium tin (SiGeSn) layers for subsequent deposition is provided. The methods are described in more detail with reference to the following drawings.

1 is a flow chart summarizing a method 100 according to one embodiment. The semiconductor substrate is located in the process chamber at step 102. The semiconductor substrate may be a stressor layer, or any semiconductor material over which an upper layer of any other function may be formed. In one example, a silicon or germanium substrate on which a GeSn or SiGeSn layer is formed may be used. The semiconductor substrate may have regions of oxide or surface contaminants formed on the GeSn or SiGeSn layer, which may be generated in transport steps between the vacuum environment and the ambient environment. For example, during the transfer steps between the formation of the source / drain regions and the removal of the additional masking prior to deposition, oxides can be formed and surface contaminants can accumulate.

In step 104, the process chamber is heated to a first temperature. The first temperature may be between 300 [deg.] C and 400 [deg.] C, which is selected to prepare a GeSn or SiGeSn layer for subsequent steps. The temperature selection depends on a number of factors including the thickness of the layer, and the amount of time the layer remains at the selected temperature.

A major problem expected at GeSn or SiGeSn layers and at increased temperatures is the Sn segregation from the GeSn or SiGeSn lattice. Germanium crystals typically have a cubic structure with a unit cell dimension of about 566 pm. Each germanium atom has a radius of about 125 pm, and tin atoms have a radius of about 145 pm. The addition of larger metal atoms to the germanium crystal matrix results in the addition of uniaxial compressive stress to the lateral germanium atoms and / or the addition of biaxial tensile strain to the upper germanium atoms Large lattice size is caused. Such strain increases the energy of local electrons and reduces the bandgap of germanium, resulting in higher carrier mobility as compared to unstrained germanium.

In one aspect, the silicon or germanium substrate may have a germanium channel layer, and a layer of the stressor adjacent thereto is formed as part of the transistor gate structure. In this case the GeSn or SiGeSn stressor exerts a uniaxial stress on the neighboring germanium layer. In another embodiment, a germanium channel layer is deposited over the stressor layer such that biaxial tensile strain is applied to the germanium channel layer. However, if the temperature is too high or too long at high temperatures, tin may be partially or completely separated from the germanium crystal matrix, thereby reducing the stress benefit on the bandgap. Thus, the time spent at a specific temperature must be considered for all steps.

At step 106, an etching gas is flowed into the process chamber at a first temperature. The etching gas may be a halide gas. The halide gas may be a gas such as chlorine or hydrogen chloride. However, any halide gas is expected for the etching process. The choice of temperature mentioned above may also be influenced by the choice of halide gas. An exemplary temperature for a short etch to remove surface oxide layers or contaminants with chlorine may be as low as 300 < 0 > C. When using hydrogen chloride in one embodiment, the etching temperature may be as low as 350 ° C to 370 ° C. The etching gas may flow into the chamber at a flow rate of, for example, about 10 sccm to about 300 sccm, such as about 50 sccm to about 200 sccm, such as about 100 sccm. The etch gas may also be mixed with the carrier gas to achieve the desired space velocity and / or mixing performance within the process chamber.

Once the etching gas is present in the chamber, the surface oxide or contaminants may be cleaned from the surface of the GeSn or SiGeSn layer in step 108. The etching process may be performed using a pure thermal etch or a plasma assisted etch process. When using a plasma assist process, the etch temperatures may be lower than the pure thermal etch process. As can be expected, since the plasma can be performed at lower temperatures, the process can be done for a longer period of time before Sn separation occurs.

In step 110, an upper layer is deposited on the surface of the cleaned GeSn or SiGeSn layer. The top layer may be composed of Ge, doped Ge, GeSn layer, SiGeSn layer, doped GeSn layer, doped SiGeSn layer, insulator or metal. The insulators available as an upper layer include a list of all known insulators available in semiconductor applications, and exemplary embodiments include germanium oxide or silicon oxide. The metals available in the top layer include a list of all known metals available in semiconductor applications, and exemplary embodiments include nickel and platinum.

The top layer may be deposited by any technique known in the art to deposit the layers described, such as chemical vapor deposition (CVD) or physical vapor deposition (PVD). In one or more embodiments, germanium oxide and silicon oxide may be deposited by a CVD process. In other embodiments, nickel or platinum may be deposited to form contacts by a PVD process. In one or more CVD processes, the precursors may be mixed with an inert gas, which may be a non-reactive gas, such as nitrogen gas, hydrogen gas, or noble gas such as helium or argon, or combinations thereof . The dopant that may be included in the layer may include phosphorus, boron, or arsenic.

In one embodiment, the top layer can be a doped germanium layer that can be deposited by conventional CVD processes. The germanium precursor may be a germanium hydride such as germane (GeH 4 ) or higher hydrides (Ge x H 2x + 2 ), or a combination thereof. The germanium precursor may be delivered with a dopant source gas. The dopant source gas may include diborane, phosphine, arsine, or a combination thereof. In addition, to achieve the desired spatial velocity and / or mixing performance within the processing chamber, the dopant may be an inert gas, such as nitrogen gas, hydrogen gas, or rare gas such as helium or argon, Can be mixed.

2 is a flow chart summarizing a method 200 according to another embodiment. The semiconductor substrate is placed in the first process chamber in step 202. As discussed above, the semiconductor substrate may be any semiconductor material on which the stressor layer is to be formed. In one example, a silicon or germanium substrate on which a GeSn or SiGeSn layer is formed may be used.

In step 204, a GeSn or SiGeSn layer may be formed on the surface of the substrate. The GeSn or SiGeSn layer may be formed by any method known in the art, such as MOCVD. At this point, in order to prevent contamination of the GeSn or SiGeSn layer, the first processing chamber must be kept sealed.

In step 206, a protective sacrificial cap germanium layer may be deposited on the surface of the substrate. The germanium precursor is typically a germanium hydride such as germane (GeH 4 ), digermane (Ge 2 H 6 ) or higher hydride (Ge x H 2x + 2 ), or combinations thereof. The germanium precursor may be mixed with an inert gas, which may be a non-reactive gas, such as nitrogen gas, hydrogen gas, or rare gas such as helium or argon, or combinations thereof. The ratio of the germanium precursor volumetric flow rate to the carrier gas flow rate can be used to control the gas flow rate through the chamber. The ratio may be any ratio between about 1% and about 99%, depending on the flow rate desired.

The sacrificial cap germanium layer of the sacrificial sacrificial layer in step 206 must be deposited before the process chamber seal is broken and before the wafer is transferred from the process chamber. Further, it is deposited sequentially in the same chamber after the GeSn or SiGeSn layer is deposited. It is important that the GeSn or SiGeSn layer should not be exposed to oxygen or other possible contaminants until the germanium layer is deposited on the surface of the GeSn or SiGeSn layer. The protective sacrificial cap germanium layer may act as a barrier to permit the opening of the current process chamber without contamination of the surface of the GeSn or SiGeSn layer or to allow transport of the substrate with a GeSn or SiGeSn layer between the chambers.

The protective sacrificial cap germanium layer at this stage may be deposited over the exposed surfaces, such as over exposed silicon, germanium, GeSn or SiGeSn layers or photoresists. The protective sacrificial cap germanium layer is used as a protective coating over the GeSn or SiGeSn layer prior to transfer from the process chamber. The protective sacrificial cap germanium layer may be relatively thin. In some embodiments, the germanium layer may be 20 ANGSTROM-100 ANGSTROM thick, e.g., 20 ANGSTROM-40 ANGSTROM thick, 20 ANGSTROM thick in the preferred embodiment.

The protective sacrificial cap germanium layer may be deposited by a CVD process using the precursors listed above. The growth of the germanium layer is generally epitaxial for high structural quality. The pressure in the process chamber may be maintained at about 20 Torr to about 200 Torr, such as about 20 Torr to about 80 Torr, e.g., about 40 Torr. The temperature is from about 150 캜 to about 500 캜, such as from about 300 캜 to about 450 캜, such as about 300 캜. In some embodiments, the pressure may be less than about 20 Torr, but the reduced pressure also reduces the deposition rate. The deposition rate under these conditions is from about 50 A / min to about 500 A / min.

In step 208, the substrate may be transferred to the second process chamber. The germanium layer deposited on the GeSn or SiGeSn layer in the previous step will be oxidized and contaminated during transport, but it will prevent oxidation or other contamination of the GeSn or SiGeSn layer.

In step 210, the second process chamber is heated to a first temperature. The first temperature may be between 300 [deg.] C and 400 [deg.] C, which is selected to prepare a GeSn or SiGeSn layer for subsequent steps. The temperature selection depends on similar factors such as thickness and time, as described in more detail above.

At step 212, an etching gas flows into the second process chamber at a first temperature. The etching gas may be a halide gas. The halide gas may be a gas such as chlorine or hydrogen chloride. However, any halide gas is expected for the etching process. The choice of temperature mentioned above may also be influenced by the choice of halide gas. The known temperature for short etching to remove surface oxide layers or contaminants with chlorine can be as low as 300 ° C. When using hydrogen chloride in one embodiment, the etching temperature may be as low as 350 ° C to 370 ° C. The etching gas may flow into the chamber at a flow rate of, for example, about 10 sccm to about 300 sccm, such as about 50 sccm to about 200 sccm, such as about 100 sccm. The etching gas may also be mixed with the carrier gas to achieve the desired spatial velocity and / or mixing performance within the processing chamber.

Once the etch gas is in the chamber, the protective sacrificial cap germanium layer may be etched from the surface of the GeSn or SiGeSn layer in step 214. The etching process may be performed using a pure thermal etch or a plasma assisted etch process. When using a plasma assist process, the etch temperatures may be lower than the pure thermal etch process. As can be expected, since the plasma can be performed at lower temperatures, the process can be done for a longer period of time before the tin separation from GeSn or SiGeSn occurs. In this embodiment, only the protective sacrificial cap germanium layer has been exposed to atmospheric conditions after the previous processing steps, which prevents oxide formation or contaminants on the GeSn or SiGeSn layer. Thus, by removing the protective sacrificial cap germanium layer, the newly exposed GeSn or SiGeSn layer is substantially free of oxides and contaminants and is ready for deposition in subsequent steps.

In step 216, an upper layer is deposited on the surface of the cleaned GeSn or SiGeSn layer. As mentioned above, the top layer may be composed of Ge, doped Ge, GeSn layer, SiGeSn layer, doped GeSn layer, doped SiGeSn layer, insulator or metal. The top layer may be deposited by any technique known in the art for depositing such layers, such as CVD or PVD. Other parameters and exemplary embodiments for upper layer deposition as described with reference to Figure 1 are of course applicable here as well. For simplicity, they are included here by reference.

3 is a flow chart summarizing a method 300 according to another embodiment. The semiconductor substrate is placed in the rapid thermal processing chamber at step 302. As discussed above, the semiconductor substrate can be a stressor layer, or any semiconductor material on which a layer of any other function is to be formed. In one example, a silicon or germanium substrate on which a GeSn or SiGeSn layer is formed can be used.

H 2 may flow into the process chamber at step 304. The flow of H 2 can be maintained at a constant pressure. In at least one embodiment, the pressure may be maintained between 20 torr and 200 torr.

In step 306, the chamber may be heated to a first temperature while maintaining the H 2 flow. The chamber is heated to a temperature higher than 400 ° C. High temperatures can cause thermal desorption of the surface oxide layer or contaminants on the exposed GeSn or SiGeSn surface. As before, it should be considered to prevent Sn separation of the GeSn or SiGeSn layer during the heating processes. The thermal stability of the GeSn or SiGeSn layer is controlled by a number of factors including the thickness of the layer, the final temperature, the time in the presence of a specific temperature, and the atmosphere. One embodiment of the GeSn or SiGeSn layer can be expected to remain stable at 500 DEG C for 15 minutes.

Constant H 2 flow can increase the thermal desorption of surface oxides and / or contaminants in the presence of high temperatures. Without intending to be bound by theory, a constant flow of H 2 can increase the removal of surface oxides by at least two mechanisms. In one embodiment, H 2 can react with surface oxides to form volatile species, and then the volatile species can be removed from the chamber. In another aspect, thermal desorption can be assisted by purging the atmosphere of previously desorbed oxide or pollutant species, thereby reducing partial pressures of oxide or pollutant species.

In one or more embodiments of this method, the heat treatment may be assisted by the use of a UV source such as a flash lamp. Typical conventional bulbs in RTP reactors produce broad wavelength light. The long wavelength of this light represents the low energy produced. By using a UV source, the oxide can be desorbed from the surface of the GeSn or SiGeSn layer at lower temperatures, or over a shorter time frame, than when using only the rapid thermal annealing process alone.

If the GeSn or SiGeSn layer is substantially free of oxides and contaminants, then at 308, the flow of H 2 into the atmosphere may be discontinued. The GeSn or SiGeSn layer is expected to experience some loss after thermal desorption. Also, considering that thinner germanium layers of less than 20 angstroms can be removed by heat treatment at higher temperatures, such as temperatures in excess of 450 [deg.] C, there is some overlap between the techniques here.

After the H 2 flow is stopped, in step 310, the temperature may be cooled below 400 ° C. The temperatures used in the rapid thermal annealing processes may be higher than the maximum temperatures listed because they are for a very short period of time. As such, in order to prevent the separation of tin from the GeSn or SiGeSn crystal lattice, the temperature must be lowered as soon as the oxide or contaminant species are desorbed.

In step 312, an upper layer is deposited on the surface of the cleaned GeSn or SiGeSn layer. As mentioned above, the top layer may be composed of Ge, doped Ge, GeSn layer, SiGeSn layer, doped GeSn layer, doped SiGeSn layer, insulator or metal. The top layer may be deposited by any technique known in the art for depositing such layers, such as CVD or PVD. Other parameters and exemplary embodiments for upper layer deposition as described with reference to Figure 1 are of course applicable here as well. For simplicity, they are included here by reference.

4 is a flow chart summarizing a method 400 according to another embodiment. The semiconductor substrate is placed in the process chamber at step 402. The processing chamber may be an integral dry clean chamber, such as a SiCoNi chamber available from Applied Materials, Inc. of Santa Clara, California. As discussed above, the semiconductor substrate can be a stressor layer, or any semiconductor material on which a layer of any other function is to be formed. In one example, a silicon or germanium substrate on which a GeSn or SiGeSn layer is formed can be used.

In step 404, the process chamber is heated to a first temperature. The first temperature may be less than 65 ° C, and in a preferred embodiment is between about 20 ° C and 60 ° C.

Next, in step 406, ammonia and nitrogen trifluoride gas are introduced into the chamber to form a plasma gas mixture at a first temperature. Since the vacuum would be advantageous in removing the volatile components produced during the cleaning process, the gases must be introduced under vacuum. The amount of each gas introduced into the chamber can vary and can vary depending on, for example, the thickness of the oxide layer to be removed, the geometry of the substrate to be cleaned, the volume capacity of the plasma, the volume capacity of the processing chamber, Lt; / RTI > In at least one embodiment, gases are added to provide a gaseous mixture of at least 1: 1 molar ratio of ammonia to nitrogen trifluoride. In another embodiment, the molar ratio of the gas mixture is at least about 3: 1 (ammonia to nitrogen triflate). Preferably, the gases are introduced into the chamber at a molar ratio of 5: 1 (ammonia to nitrogen trifluoride) to 30: 1.

Next, the gas mixture can be converted to plasma within the processing chamber using a DC or RF power source. Exemplary embodiments include providing RF power from about 5 watts to about 600 watts using an RF power source to ignite the gas mixture to produce a plasma. Preferred embodiments include using less than 100 watts of RF power. Plasma energy combines ammonia and nitrogen trifluoride gases to form a gaseous highly reactive ammonia fluoride (NH 4 F) compound and / or ammonium hydrogen fluoride (NH 4 F. HF) Decompose into reactive species. NH 4 F and NH 4 F.HF is reacted with silicon dioxide to form ammonium hexafluoro silicate (ammonium hexafluorosilicate) (NH 4) 2 SiF 6, SiF 6, NH 3 and H 2 O; It is believed to react with germanium oxide to form ammonium hexafluorogermanate (NH 4 ) 2 GeF 6 , GeF 6 , NH 3 and H 2 O. NH 3 and H 2 O are gaseous at the reaction temperature and pressure and are removed from the process chamber leaving a thin film of (NH 4 ) 2 SiF 6 remaining on the oxide-free surface of the GeSn or SiGeSn layer.

Next, in step 408, the process chamber may be heated to a second temperature. The second temperature may be a temperature greater than 80 ° C, and in a preferred embodiment is between 80 ° C and 150 ° C. At temperatures above 80 ° C, a thin film of (NH 4 ) 2 SiF 6 or (NH 4 ) 2 GeF 6 may decompose or sublimate into volatile SiF 4 , NH 3 and HF products. The volatile components can be removed from the chamber after leaving the gas phase to leave only the cleaned surface.

In step 410, a substrate having a cleaned GeSn or SiGeSn surface can be transferred into the deposition chamber in the presence of vacuum or inert gas. The inert gas may be selected from a list of all inert gases including nitrogen, argon, helium. The environment in the chamber can be maintained to ensure that no additional surface contaminants accumulate during transfer. The deposition chamber can be any chamber that can be used to deposit one of the top layers described above.

In step 412, an upper layer is deposited on the surface of the cleaned GeSn or SiGeSn layer. As mentioned above, the top layer may be composed of Ge, doped Ge, GeSn layer, SiGeSn layer, doped GeSn layer, doped SiGeSn layer, insulator or metal. The top layer may be deposited by any technique known in the art for depositing such layers, such as CVD or PVD. Other parameters and exemplary embodiments for upper layer deposition as described with reference to Figure 1 are of course applicable here as well. For simplicity, they are included here by reference.

A method is provided for preparing a cleaned surface of GeSn or SiGeSn layers for subsequent deposition. Placing a substrate having an exposed GeSn or SiGeSn layer in the process chamber, heating the process chamber, and flowing a halide gas into the process chamber to etch the surface of the substrate using thermal or plasma assisted etching Doped Ge, another GeSn or SiGeSn layer, a doped GeSn or SiGeSn layer, an insulator or a metal layer on the prepared GeSn or SiGeSn layer by depositing an upper layer on the surface having substantially no oxide and contaminants Can be deposited. In other embodiments, the method of preparing the cleaned surface of the GeSn or SiGeSn layer may also include the placement and etching of the sacrificial layer with subsequent deposition of the top layer. In further embodiments, the method of preparing the cleaned surface of a GeSn or SiGeSn layer may also include thermal desorption using rapid thermal annealing. In still other embodiments, a method of preparing a cleaning surface of the GeSn or SiGeSn layer by flowing an NF 3 and NH 3 plasma gas mixture into the processing chamber, to form a salt mixture containing surface oxides, contaminants, and the salt / RTI > Removal of surface oxides and contaminants ensures the film quality of the subsequently deposited layers and the quality of the interface between the top layer and the GeSn or SiGeSn layer. Thereby, such pre-deposition processing results in lower product loss in subsequent processing.

While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be made without departing from its basic scope.

Claims (15)

  1. A method of preparing a cleaned GeSn or SiGeSn surface,
    Positioning a substrate in a processing chamber, the substrate comprising an exposed GeSn or SiGeSn layer;
    Heating the process chamber to a first temperature;
    Flowing an etchant gas into the process chamber at the first temperature, the etchant gas comprising a halide gas;
    Etching the surface of the substrate using thermal etching or plasma assisted etching at the first temperature to create a cleaned surface; And
    Depositing an overlayer on top of the cleaned surface, wherein the top layer comprises one of Ge, a doped Ge, a GeSn layer, a SiGeSn layer, a doped GeSn layer, a doped SiGeSn layer, an insulator or a metal,
    ≪ / RTI >
  2. The method of claim 1, wherein the first temperature is between 300 ° C and 400 ° C.
  3. The method of claim 1, wherein the halide gas is chlorine or hydrogen chloride.
  4. The method of claim 1, wherein the dopant comprises one of phosphorous (P), boron (B), or arsenic (As).
  5. A method of preparing a cleaned GeSn or SiGeSn surface,
    Positioning the substrate in a first processing chamber, the substrate comprising a GeSn or SiGeSn layer having sacrificial protective Ge cap, the protective sac cap having a protective oxygen sacrificial Ge cap, after formation of GeSn or SiGeSn, Formed prior to exposure to the substance;
    Transferring the substrate to a second process chamber;
    Heating the second processing chamber to a first temperature;
    Flowing an etchant gas into the second process chamber at the first temperature, the etchant gas comprising a halide gas;
    Etching the sacrificial cap using thermal or plasma assisted etching at the first temperature to expose the cleaned GeSn or SiGeSn layer; And
    Depositing an upper layer on top of the cleaned surface, the upper layer comprising one of Ge, a doped Ge, a GeSn layer, a SiGeSn layer, a doped GeSn layer, a doped SiGeSn layer, an insulator or a metal,
    ≪ / RTI >
  6. 6. The method of claim 5, wherein the protective sacrificial Ge cap is 20A to 40A thick.
  7. 6. The method of claim 5, wherein the first temperature is between 300 [deg.] C and 400 [deg.] C.
  8. 6. The method of claim 5, wherein the halide gas is chlorine or hydrogen chloride.
  9. A method of preparing a cleaned GeSn or SiGeSn surface,
    Positioning a substrate in a processing chamber, the substrate comprising an exposed GeSn or SiGeSn layer;
    Flowing H 2 into the chamber while maintaining a constant pressure;
    Heating the chamber to a first temperature while maintaining a flow of H 2 to produce a cleaned surface, the temperature being greater than 450 ° C and held for a period of time less than one minute;
    Cooling the chamber to a temperature below 400 < 0 >C; And
    Depositing an upper layer on top of the cleaned surface, the upper layer comprising one of Ge, a doped Ge, a GeSn layer, a SiGeSn layer, a doped GeSn layer, a doped SiGeSn layer, an insulator or a metal,
    ≪ / RTI >
  10. 10. The method of claim 9, wherein the first temperature is between 450 [deg.] C and 650 [deg.] C.
  11. 10. The method of claim 9, wherein the dopant comprises one of phosphorous (P), boron (B), or arsenic (As).
  12. 10. The method of claim 9, further comprising applying UV light while heating to the first temperature.
  13. A method of preparing a cleaned GeSn or SiGeSn surface,
    Positioning a substrate in a processing chamber, the substrate comprising an exposed GeSn or SiGeSn layer having one or more surface contaminants;
    Adjusting the processing chamber to a first temperature;
    Flowing a mixture of NF 3 and NH 3 plasma gas at said first temperature into said process chamber to form a salt mixture, said salt mixture comprising said surface contaminant;
    Heating the substrate to a second temperature to sublimate the salt mixture to produce a cleaned surface;
    Placing the cleaned substrate in a deposition chamber in which a vacuum is maintained; And
    Depositing an upper layer on top of the cleaned surface, the upper layer comprising one of Ge, a doped Ge, a GeSn layer, a SiGeSn layer, a doped GeSn layer, a doped SiGeSn layer, an insulator or a metal,
    ≪ / RTI >
  14. 16. The method of claim 15, wherein the first temperature is between 20 DEG C and 60 DEG C, and the second temperature is between 80 DEG C and 150 DEG C.
  15. 16. The method of claim 15, wherein the dopant comprises one of phosphorous (P), boron (B), or arsenic (As).
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