KR20140038914A - Multi-layered ceramic capacitor and board for mounting the same - Google Patents

Multi-layered ceramic capacitor and board for mounting the same Download PDF

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Publication number
KR20140038914A
KR20140038914A KR1020130129120A KR20130129120A KR20140038914A KR 20140038914 A KR20140038914 A KR 20140038914A KR 1020130129120 A KR1020130129120 A KR 1020130129120A KR 20130129120 A KR20130129120 A KR 20130129120A KR 20140038914 A KR20140038914 A KR 20140038914A
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South Korea
Prior art keywords
ceramic
external electrodes
main
lead
bands
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KR1020130129120A
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Korean (ko)
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안영규
김현태
임휘근
김진
이교광
이병화
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삼성전기주식회사
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Priority to KR1020130129120A priority Critical patent/KR20140038914A/en
Publication of KR20140038914A publication Critical patent/KR20140038914A/en
Priority claimed from US14/527,662 external-priority patent/US9396879B2/en

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/30Stacked capacitors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G2/00Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02Mountings
    • H01G2/06Mountings specially adapted for mounting on a printed-circuit support
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • H01G4/12Ceramic dielectrics
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/301Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor

Abstract

A multilayer ceramic capacitor comprises a ceramic body, an active layer, and first to third external electrodes. The ceramic body includes a plurality of dielectric layers stacked in the width direction and has first and second main surfaces facing each other, first and second sides facing each other, and first and second cross-sections facing each other. The active layer is formed inside the ceramic body and includes a plurality of first and second internal electrodes. The first internal electrodes include first and second extraction parts, which are apart from each other in the longitudinal direction and exposed on the first main surface of the ceramic body, and are formed to be apart from the first and second cross-sections by predetermined distances, respectively. The second internal electrode includes a third extraction part, which is exposed on the first main surface of the ceramic body between the first and second extraction parts with predetermined distances from the first and second extraction parts, respectively, and are formed to be apart from the first and second cross-sections by predetermined distances, respectively. The first and second external electrodes are formed in a longitudinal direction on the first main surface of the ceramic body to be apart from each other and connected to the first and second extraction parts, respectively. The third external electrode is formed on the first main surface of the ceramic body with predetermined distances from the first and second external electrodes, respectively, and is connected to the third extraction part. A distance between adjacent extraction parts is smaller than or equal to 500.7 μm, and a margin in the longitudinal direction on the first to third external electrodes between corresponding extraction parts and a non-contact part is greater than or equal to 20.2 μm.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a multilayer ceramic capacitor,

The present invention relates to a multilayer ceramic capacitor and a mounting substrate thereof.

With the recent miniaturization and high capacity of electronic products, miniaturization and high capacity of electronic components used in electronic products are also required.

In the case of multilayer ceramic capacitors, the equivalent series inductance (“ESL”) increases, which may degrade the performance of electronic products.Increasing the ESL of multilayer ceramic capacitors increases with the miniaturization and high capacity of the applied electronic components. The impact on the performance degradation of the system becomes relatively large.

In particular, as the performance of ICs increases, the use of decoupling capacitors increases, reducing the distance between external terminals, thereby reducing the current flow path, thereby reducing the inductance of capacitors. Demand for low inductance chip capacitors (LICC) is increasing.

On the other hand, the multilayer ceramic capacitor has a feature that the reliability and mounting failure rate of the product is greatly affected by the shape and size of the external electrode.

Patent Literatures 1 and 2 disclose capacitors having a vertically stacked three-terminal structure, respectively, but limit the numerical values for the spacing of the lead portions of the inner electrodes adjacent to each other, and the values of the longitudinal margins that are not in contact with the lead portions corresponding to the outer electrodes, respectively. Do not disclose

Korean Patent Publication No. 2009-0117686 Korean Registered Patent No. 0920614

In the art, there is a need for a new method for improving reliability and sticking strength while maintaining low ESL characteristics in a vertically stacked three-terminal capacitor.

According to an aspect of the present invention, a ceramic body having a plurality of dielectric layers stacked in a width direction and having first and second main surfaces facing each other, first and second sides facing each other, and first and second cross sections facing each other ; A plurality of first formed in the ceramic body, spaced apart from each other in a longitudinal direction, and having first and second lead portions exposed to the first main surface of the ceramic body and spaced apart from the first and second end faces by a predetermined distance; A plurality of lead portions exposed to an internal electrode and a first main surface of the ceramic body, and spaced apart from each other by a predetermined distance between the first and second lead portions, respectively; An active layer including a second internal electrode; First and second external electrodes formed on the first main surface of the ceramic body and spaced apart from each other in the longitudinal direction, and connected to the first and second lead portions, respectively; A third external electrode formed on the first main surface of the ceramic body and spaced apart from the first and second external electrodes by a predetermined distance, and connected to the third lead-out part; It includes a, and the distance between the lead portion adjacent to each other is 500.7 ㎛ or less, and each of the first to the third external electrode provides a multilayer ceramic capacitor having a longitudinal margin of 20.2 ㎛ or more in contact with the corresponding lead portion.

In one embodiment of the present invention, the distance between the external electrodes adjacent to each other may be 126.9 ㎛ or more.

In one embodiment of the present invention, each of the first to third external electrodes has side bands extending as part of the first and second side surfaces of the ceramic body, and the height of the side bands may be 73.4 μm or more.

In one embodiment of the present invention, each of the first to third external electrodes has side bands extending as part of the first and second side surfaces of the ceramic body, and the side bands have a height of 40.0 μm or more, respectively. The first and second external electrodes may have cross-sectional bands extending as part of the first and second cross-sections of the ceramic body, respectively, and the heights of the cross-sectional bands may be 30.3 μm or more.

In an embodiment of the present disclosure, the first to third external electrodes may include a conductive layer connected to each corresponding lead portion and a plating layer to cover the conductive layer.

The plating layer may include a nickel (Ni) plating layer formed to cover the conductive layer and a tin (Sn) plating layer formed to cover the nickel plating layer.

In an embodiment of the present disclosure, the first internal electrodes may have fourth and fifth lead portions spaced apart from each other in the longitudinal direction and exposed to the second main surface of the ceramic body, and the second internal electrodes may be formed of the ceramic body. It is exposed to the second main surface and has a sixth lead portion formed to be spaced apart a predetermined distance between the fourth and the fifth lead-out portion, respectively, is formed spaced apart from each other in the longitudinal direction on the second main surface of the ceramic body, the fourth and fifth Fourth and fifth external electrodes connected to the lead portions, respectively; A sixth external electrode formed on the second main surface of the ceramic body and spaced apart from the fourth and fifth external electrodes by a predetermined distance, and connected to the sixth lead-out part; . ≪ / RTI >

In one embodiment of the present invention, the margin in one longitudinal direction that is not in contact with each of the lead portions corresponding to each of the fourth to fifth external electrodes may be 20.3 μm or more.

In some embodiments, the fourth to sixth external electrodes may have side bands extending as part of the first and second side surfaces of the ceramic body, respectively, and the side bands may have a height of 73.4 μm or more.

In an embodiment, the fourth to sixth external electrodes each have side bands extending as part of the first and second side surfaces of the ceramic body, and the heights of the side bands are each 40.0 μm or more. The fourth and fifth external electrodes may have cross-sectional bands extending as part of the first and second cross-sections of the ceramic body, respectively, and the heights of the cross-sectional bands may be 30.3 μm or more.

In an embodiment of the present disclosure, the fourth to sixth external electrodes may include a conductive layer connected to each corresponding lead portion and a plating layer to cover the conductive layer.

In one embodiment of the present invention, a cover layer may be formed on the first and second side surfaces of the active layer.

Another aspect of the invention, the substrate having a first to third electrode pad on the top; And the multilayer ceramic capacitor mounted on the first to third electrode pads of the substrate. It provides a mounting substrate of a multilayer ceramic capacitor comprising a.

According to one embodiment of the present invention, by maintaining the low ESL characteristics by adjusting the distance between the lead portions adjacent to each other and the longitudinal direction uncontacted with the lead portions corresponding to each of the external electrodes, it is possible to improve the reliability and adhesion strength It works.

1 is a transparent perspective view schematically showing a multilayer ceramic capacitor according to an embodiment of the present invention.
2 is a perspective view illustrating a lead portion exposed through a ceramic body and a second main surface of a multilayer ceramic capacitor according to an exemplary embodiment of the present disclosure.
FIG. 3 is an exploded perspective view of FIG. 2. FIG.
4 is a side cross-sectional view of Fig.
5 is a transparent perspective view for explaining a numerical relationship between a lead portion and an external electrode of a multilayer ceramic capacitor according to another embodiment of the present invention.
6 is a perspective view illustrating a board in which the multilayer ceramic capacitor of FIG. 1 is mounted on a circuit board.
7 is a side sectional view of Fig.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below.

Moreover, embodiment of this invention is provided in order to demonstrate this invention more completely to the person with average knowledge in the technical field.

The shape and size of elements in the drawings may be exaggerated for clarity.

In addition, the components with the same functions within the scope of the same idea shown in the drawings of each embodiment will be described using the same reference numerals.

In order to clearly illustrate the embodiments of the present invention, when the directions of the hexahedron are defined, L, W, and T shown in the drawings indicate the longitudinal direction, the width direction, and the thickness direction, respectively. Here, the width direction may be used in the same concept as the stacking direction in which the dielectric layers are stacked.

Multilayer Ceramic Capacitors

1 is a transparent perspective view schematically illustrating a multilayer ceramic capacitor according to an embodiment of the present invention, and FIG. 2 illustrates a lead portion exposed through a ceramic body and a second main surface of the multilayer ceramic capacitor according to an embodiment of the present invention. 3 is an exploded perspective view of FIG. 2, and FIG. 4 is a side cross-sectional view of FIG. 1.

1 to 4, the multilayer ceramic capacitor 100 according to the present embodiment includes a ceramic body 110 in which a plurality of dielectric layers 111 are stacked in a width direction, and a plurality of first and second internal electrodes ( An active layer including 120 and 130, first to fourth external electrodes 131 to 134 serving as power terminals, and fifth and sixth external electrodes 135 and 136 serving as ground terminals. .

The multilayer ceramic capacitor 100 of the present embodiment can be viewed as a so-called three-terminal capacitor having a total of three external terminals.

The ceramic body 110 connects the first main surface S1 and the second main surface S2 in the thickness direction facing each other, and the first main surface S1 and the second main surface S2 in the width direction facing each other. The first side surface S5 and the second side surface S6 may have a first end surface S3 and a second end surface S4 in the longitudinal direction facing each other.

Hereinafter, in the present embodiment, the mounting surface of the multilayer ceramic capacitor 100 is defined and described as the first main surface S1 of the ceramic body 110.

The ceramic body 110 is formed by laminating a plurality of dielectric layers 111 in the width direction and then firing the shape, and the shape of the ceramic body 110 may be a hexahedron shape as illustrated.

However, the shape, the dimensions of the ceramic body 110, and the number of stacked layers of the dielectric layer 111 are not limited to those shown in this embodiment.

The plurality of dielectric layers 111 forming the ceramic body 110 are in a sintered state and the boundaries between the adjacent dielectric layers 111 are such that it is difficult to confirm without using a scanning electron microscope (SEM) Can be integrated.

The ceramic body 110 is composed of an active layer having a plurality of internal electrodes as a part contributing to the capacitance formation of the capacitor, and cover layers 112 and 113 formed on the first and second side surfaces of the active layer as margins. Can be.

The active layer may be formed by alternately stacking a plurality of first and second internal electrodes 120 and 130 with a dielectric layer 111 interposed therebetween in the width direction.

At this time, the thickness of the dielectric layer 111 can be arbitrarily changed according to the capacity design of the multilayer ceramic capacitor 100, preferably the thickness of one layer can be configured to be 0.01 to 1.00 ㎛ after firing, the present invention is limited thereto. It doesn't happen.

In addition, the dielectric layer 111 may include a ceramic powder having a high dielectric constant, for example, barium titanate (BaTiO 3 ) -based or strontium titanate (SrTiO 3 ) -based powder, and the present invention may be obtained as long as sufficient capacitance can be obtained. It is not limited to this.

In addition, a ceramic additive, an organic solvent, a plasticizer, a binder, a dispersant, and the like may be further added to the dielectric layer 111 when necessary.

In this case, the average particle diameter of the ceramic powder used to form the dielectric layer 111 is not particularly limited, and may be adjusted to achieve the object of the present invention, for example, may be adjusted to 400 nm or less, the present invention is It is not limited.

The cover layers 112 and 113 may have the same material and construction as the dielectric layer 111 except that the cover layers 112 and 113 do not include internal electrodes.

In addition, the cover layers 112 and 113 may be formed by further stacking a single dielectric layer or two or more dielectric layers on the first and second side surfaces S5 and S6 of the active layer in the width direction, respectively. It may serve to prevent damage to the first and second internal electrodes 120 and 130 due to chemical stress.

The first and second internal electrodes 120 and 130 are electrodes having different polarities, are formed inside the ceramic body 110, and are disposed to face each other with the dielectric layer 111 interposed therebetween.

In this case, the first and second internal electrodes 120 and 130 may be electrically insulated from each other by the dielectric layer 111 disposed therebetween.

The first and second internal electrodes 120 and 130 include a capacitor part overlapping with the neighboring internal electrode and contributing to the formation of a capacitor, and a lead part in which a part of the capacitor part is extended and exposed to the outside of the ceramic body 110. .

The lead-out portion is not particularly limited, but may have a shorter length than the length of the ceramic body 110 of the internal electrode constituting the capacitor.

In addition, the thicknesses of the first and second internal electrodes 120 and 130 may be determined according to a use. For example, the thicknesses of the first and second internal electrodes 120 and 130 may be determined to be within a range of 0.2 μm to 1.0 μm in consideration of the size of the ceramic body 110. The invention is not limited thereto.

In addition, the material for forming the first and second internal electrodes 120 and 130 is not particularly limited. For example, precious metal materials such as palladium (Pd) and palladium-silver (Pd-Ag) alloys, and nickel (Ni) And a conductive paste made of one or more materials of copper (Cu).

The conductive paste may be printed by a screen printing method or a gravure printing method, but the present invention is not limited thereto.

In the present embodiment, the first internal electrodes 120 have first and second lead portions 121 and 122 spaced apart from each other in the longitudinal direction and exposed to the first main surface S1 of the ceramic body 110. It is formed spaced a predetermined distance from the first and second end surfaces (S3, S4).

In addition, the second internal electrode 130 is exposed to the first main surface S1 of the ceramic body 110, but is spaced apart from each other by a predetermined distance between the first and second lead portions 121 and 122. 131 and spaced apart from the first and second end surfaces S3 and S4 by a predetermined distance.

In this case, the first internal electrodes 120 may have fourth and fifth lead portions 123 and 124 spaced apart from each other in the longitudinal direction and exposed to the second main surface S2 of the ceramic body 110. The internal electrode 130 is exposed to the second main surface S2 of the ceramic body 110 and has a sixth lead portion 132 formed to be spaced apart a predetermined distance between the fourth and fifth lead portions 123 and 124, respectively. Can be.

That is, since the multilayer ceramic capacitor 100 has a vertically symmetrical structure, defects caused by reversing the mounting surface when mounting on the substrate may be prevented.

In this case, the intervals a1 + b1 + c1 and a2 + b2 + c3 adjacent to each other may be 500.7 μm or less.

When the gaps (a1 + b1 + c1, a2 + b2 + c3) of the lead portions adjacent to each other exceed 500.7 μm, it is difficult to satisfy the ESL 50 pH or less and it is difficult to implement low ESL.

In general multilayer ceramic electronic components, external electrodes may be disposed at both end surfaces facing each other in the length direction of the ceramic body.

However, in this case, since the current path is long when an alternating current is applied to the external electrode, the current loop may be formed larger, and the inductance may be increased by increasing the size of the induced magnetic field.

In order to solve the above problem, according to an embodiment of the present invention, first to second main surfaces S1 and S2 facing each other in the thickness direction of the ceramic body 110 in order to reduce the path of current. Sixth external electrodes 141-146 may be disposed.

The first and second external electrodes 141 and 142 are formed to be spaced apart from each other in the longitudinal direction on the first main surface S1 of the ceramic body 110 and are connected to the first and second lead-out parts 121 and 122, respectively. The third external electrode 143 is formed on the first main surface S1 of the ceramic body 110 by being spaced apart from the first and second external electrodes 141 and 142 by a predetermined distance, and the third lead-out part 131 Connected.

On the other hand, when the multilayer ceramic capacitor 100 is formed in a vertically symmetrical structure, the second main surface S2 of the ceramic body 110 is spaced apart from each other in the longitudinal direction and is respectively disposed with the fourth and fifth lead-out portions 123 and 124. Fourth and fifth external electrodes 144 and 145 connected to each other may be formed, and the second main surface S2 of the ceramic body 110 may be spaced apart from the fourth and fifth external electrodes 144 and 145 by a predetermined distance, respectively. The sixth external electrode 132 connected to the sixth lead part 132 may be formed.

In the multilayer ceramic capacitor 100 having the above structure, since the length between the first to sixth external electrodes 141 to 146 is small, the current path is reduced, thereby reducing the current loop and thus reducing the inductance.

In addition, the first to sixth external electrodes 141 to 146 are electrically connected to corresponding lead portions of the first and second internal electrodes 120 and 130, respectively, to form a capacitance, and, if necessary, the ceramic body 110. Side bands may be formed by extending to a part of the first and second side surfaces S5 and S6.

In this case, the margins a1, a2, c1, and c2 in one longitudinal direction, which are not in contact with the lead portions corresponding to the first to sixth external electrodes 141-146, respectively, may be 20.2 μm or more.

When the margins a1, a2, c1, and c2 in one longitudinal direction that are not in contact with the corresponding lead portions in the first to sixth external electrodes 141-146 are less than 20. 2 μm, the high temperature load and the moisture resistance reliability deteriorate. Problems may arise.

In addition, the intervals b1 and b2 of adjacent external electrodes may be 126.9 μm or more.

When the distances b1 and b2 of the adjacent external electrodes are less than 126.9 μm, a short may occur when the substrate is mounted on the substrate.

In addition, the heights d of the side bands of the first to sixth external electrodes 141 to 146 are preferably 73.4 μm or more.

When the height (d) of the side bands of the first to sixth external electrodes 141-146 is 73.4 μm or more, adhesion strength is improved and defects do not occur, and the side surfaces of the first to sixth external electrodes 141-146. When the height d of the band is less than 73.4 μm, a failure in adhesion strength of the first to sixth external electrodes 141 to 146 may occur.

Meanwhile, the first to sixth external electrodes 141-146 may be formed in a triple layer structure, and the first to sixth conductive layers 141a-may be connected to contact with lead portions of the corresponding internal electrodes. 146a, the nickel (Ni) plating layers 141b-146b formed to cover the first to sixth conductive layers 141a-146a, and the tin formed to cover the first to sixth nickel plating layers 141b-146b ( Sn) plating layers 141c-146c.

The first to sixth conductive layers 141a to 146a may be formed of a conductive material of the same material as the first and second internal electrodes 120 and 130, but are not limited thereto. For example, copper (Cu), It may be formed of a metal powder such as silver (Ag) and nickel (Ni), and may be formed by applying a conductive paste prepared by adding a glass frit to the metal powder and then baking the same.

5 is a transparent perspective view for explaining a numerical relationship between a lead portion and an external electrode of a multilayer ceramic capacitor according to another embodiment of the present invention.

Referring to FIG. 5, the first to sixth external electrodes 141 to 146 are electrically connected to corresponding lead portions of the first and second internal electrodes 120 and 130, respectively, to form capacitance. Extending to a part of the first and second side surfaces S5 and S6 of the ceramic body 110 to form side bands, and the first, second, fourth and fifth external electrodes 141, 142, 144, and 145. May have a cross-sectional band extending as part of the first and second end surfaces S3 and S4 of the ceramic body 110, respectively.

At this time, the height d of the side bands of the first to sixth external electrodes 141 to 146 is 40.0 μm or more, respectively, and the first, second, fourth and fifth external electrodes 141, 142, 144, and 145 are respectively. It is preferable that the height e of the cross-sectional band of () is 30.3 micrometers or more, respectively.

Cross sections of the first, second, fourth and fifth external electrodes 141, 142, 144, and 145 while the height d of the side bands of the first to sixth external electrodes 141-146 are less than 40.0 μm. When the heights e of the bands are less than 30.3 μm, poor adhesion strength of the first to sixth external electrodes 141 to 146 may occur.

Experimental Example

The multilayer ceramic capacitor according to the embodiment and the comparative example of the present invention was produced as follows.

A slurry containing a powder such as barium titanate (BaTiO 3 ) is coated on a carrier film and dried to prepare a plurality of ceramic green sheets having a thickness of 1.8 탆.

Next, a conductive paste for nickel internal electrodes is coated on the ceramic green sheet using a screen to have first, second, fourth, and fifth lead-out portions exposed to the first and second main surfaces of the ceramic green sheet. Forming a second internal electrode having a first internal electrode and third and sixth lead portions spaced apart from the first, second, fourth and fifth lead portions and exposed to the first and second main surfaces of the ceramic green sheet; do.

Next, the ceramic green sheet is laminated in about 200 layers, and the ceramic green sheet, in which the first and second internal electrodes are not formed, is further laminated on both sides to prepare a laminate, and the laminate is manufactured at 85 ° C. at 1000 ° C. Isostatic pressing was carried out under kgf / cm 2 pressure.

Next, the pressed ceramic laminate was cut in the form of individual chips, and the cut chips were kept at about 230 ° C. for 60 hours in an air atmosphere to carry out binder removal.

Next, the ceramic body was prepared by baking in a reducing atmosphere under an oxygen partial pressure of 10 −11 to 10 −10 atm lower than the Ni / NiO equilibrium oxygen partial pressure so as not to oxidize the internal electrode at about 1200 ° C.

The chip size of the laminated chip capacitor after firing was about 1.0 mm × 0.5 mm (L × W, 1005 size) in length × width (L × W). Here, the production tolerance was set within the range of ± 0.1 mm in length × width (L × W).

Next, the multilayer ceramic capacitor is completed by forming the first to sixth external electrodes on the first and second main surfaces of the ceramic body so as to correspond to the lead portions of the first and second internal electrodes, respectively. Table 1 shows the test results of load generation, mounting short failure rate, failure in fixing strength, and equivalent series inductance (ESL) measurement test. Each test was performed on 100 sample samples.

Figure pat00001

Referring to Table 1, the distances (a1 + b1 + c1, a2 + b2 + c3) of the lead portions adjacent to each other are preferably 500.7 μm or less, and the distances (a1 + b1 + c1, a2 + b2 + c3) of the lead portions adjacent to each other. For samples 16 to 20 with greater than 500.7 μm, ESL exceeds 50 pH, making it difficult to achieve low ESL.

In addition, it is preferable that the margins a1, a2, c1, and c2 in one longitudinal direction that are not in contact with the lead portions corresponding to the first to sixth external electrodes 141-146, respectively, are 20.2 μm or more, and the first to sixth High temperature load and moisture resistance for samples 1, 6, 11, and 16 whose longitudinal margins a1, a2, c1, and c2 are uncontacted with the corresponding lead-out portions of the external electrodes 141-146, respectively, of less than 20. 2 µm. It can be seen that a problem occurs that deteriorates the load reliability.

In addition, the distances b1 and b2 of adjacent external electrodes are preferably 126.9 μm or more, and in the case of Sample 5 in which the distances b1 and b2 of adjacent external electrodes are less than 126.9 μm, short defects occur when the substrate is mounted. You can check it.

In addition, each of the first to sixth external electrodes 141 to 146 has side bands extending to portions of the first and second side surfaces S5 and S6 of the ceramic body 110, respectively. Is 73.4 μm, respectively, and the first to sixth external electrodes 141 in the case of samples 23 and 24 where the height d of the side bands of the first to sixth external electrodes 141 to 146 is less than 73.4 μm. -146) it can be confirmed that the failure of the fixing strength occurs.

Meanwhile, samples 26 to 36 have side bands in which the first to sixth external electrodes 141 to 146 respectively extend to portions of the first and second side surfaces S5 and S6 of the ceramic body 110. The second, fourth, and fifth external electrodes 141, 142, 144, and 145 each have a cross-sectional band extending as part of the first and second end surfaces S3 and S4 of the ceramic body 110.

In this case, referring to Sample 26, the heights d of the side bands of the first to sixth external electrodes 141 to 146 in which the poor adhesion strength of the external electrodes do not occur are respectively 40.0 μm or more, and the first and second The heights e of the cross-sectional bands of the fourth and fifth external electrodes 141, 142, 144, and 145 may each be 30.3 μm or more.

The mounting substrate of the multilayer ceramic capacitor

6 is a perspective view illustrating a multilayer ceramic capacitor of FIG. 1 mounted on a circuit board, and FIG. 7 is a side cross-sectional view of FIG. 6.

6 and 7, the mounting substrate 200 of the multilayer ceramic capacitor 100 according to the present exemplary embodiment includes a substrate 210 on which the multilayer ceramic capacitor 100 is mounted horizontally, and an upper surface of the substrate 210. It includes first to third electrode pads (221, 222, 223) spaced apart from each other.

In this case, the multilayer ceramic capacitor 100 may be formed of a substrate by the solder 230 in a state where the first to third external electrodes 141 to 143 are positioned to contact the first to third electrode pads 221, 222, and 223, respectively. And may be electrically connected to 210.

In FIG. 7, reference numeral 224 denotes a ground terminal, and reference numeral 225 denotes a power supply terminal.

The present invention is not limited to the above-described embodiments and the accompanying drawings, but is intended to be limited only by the appended claims.

It will be apparent to those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. something to do.

100; A multilayer ceramic capacitor 110; Ceramic body
111; Dielectric layers 112, 113; Cover layer
120; First and internal electrodes 121-124; 1st to 4th drawing part
130; Second internal electrodes 131 and 132, 5th and 6th withdrawal part
141-146; First to sixth external electrodes 200; Mounting substrate
210; Board
221, 222, 223; First to third electrode pads
230; Solder

Claims (14)

  1. A plurality of dielectric layers stacked in the width direction, the ceramic body having first and second main surfaces facing each other, first and second side surfaces facing each other, and first and second cross sections facing each other;
    A plurality of first formed in the ceramic body, spaced apart from each other in a longitudinal direction, and having first and second lead portions exposed to the first main surface of the ceramic body and spaced apart from the first and second end faces by a predetermined distance; A plurality of lead portions exposed to an internal electrode and a first main surface of the ceramic body, and spaced apart from each other by a predetermined distance between the first and second lead portions, respectively; An active layer including a second internal electrode;
    First and second external electrodes formed on the first main surface of the ceramic body and spaced apart from each other in the longitudinal direction, and connected to the first and second lead portions, respectively;
    A third external electrode formed on the first main surface of the ceramic body and spaced apart from the first and second external electrodes by a predetermined distance, and connected to the third lead-out part; / RTI >
    The distance between the outlet portions adjacent to each other is 500.7 µm or less,
    The multilayer ceramic capacitor having a margin in one longitudinal direction that is not in contact with each of the lead portions corresponding to the first to third external electrodes, respectively, of 20.2 μm or more.
  2. The method of claim 1,
    Multilayer ceramic capacitors, characterized in that the distance of the external electrodes adjacent to each other more than 126.9 ㎛.
  3. The method of claim 1,
    The first to third external electrodes each have side bands extending as part of the first and second side surfaces of the ceramic body, and the height of the side bands is 73.4 μm or more, respectively.
  4. The method of claim 1,
    Each of the first to third external electrodes has side bands extending as part of first and second side surfaces of the ceramic body, and the side bands have a height of 40.0 μm or more, respectively.
    Wherein the first and second external electrodes have cross-sectional bands extending as part of first and second cross-sections of the ceramic body, respectively, and the heights of the cross-sectional bands are 30.3 μm or more, respectively.
  5. The method of claim 1,
    And the first to third external electrodes include a conductive layer connected to each corresponding lead portion and a plating layer to cover the conductive layer.
  6. 6. The method of claim 5,
    The plating layer may include a nickel (Ni) plating layer formed to cover the conductive layer and a tin (Sn) plating layer formed to cover the nickel plating layer.
  7. The method of claim 1,
    The first internal electrodes are spaced apart from each other in the longitudinal direction and have fourth and fifth lead portions exposed to the second main surface of the ceramic body,
    The second internal electrode is exposed to the second main surface of the ceramic body and has a sixth lead portion formed to be spaced apart by a predetermined distance between the fourth and fifth lead portions, respectively.
    Fourth and fifth external electrodes formed on the second main surface of the ceramic body and spaced apart from each other in the longitudinal direction, and connected to the fourth and fifth lead-out portions, respectively;
    A sixth external electrode formed on the second main surface of the ceramic body and spaced apart from the fourth and fifth external electrodes by a predetermined distance, and connected to the sixth lead-out part; And a second electrode formed on the second electrode.
  8. 8. The method of claim 7,
    The multilayer ceramic capacitor having a margin in one longitudinal direction that is not in contact with the lead portion corresponding to each of the fourth to fifth external electrodes, respectively, of 20.2 μm or more.
  9. 8. The method of claim 7,
    The fourth to sixth external electrodes each have side bands extending as part of the first and second side surfaces of the ceramic body, and the height of the side bands is 73.4 μm or more, respectively.
  10. 8. The method of claim 7,
    The fourth to sixth external electrodes each have side bands extending as part of the first and second side surfaces of the ceramic body, and the height of the side bands is 40.0 μm or more, respectively.
    The fourth and fifth external electrodes have cross-sectional bands extending as part of first and second cross-sections of the ceramic body, respectively, and the height of the cross-sectional bands is 30.3 μm or more, respectively.
  11. 8. The method of claim 7,
    And the fourth to sixth external electrodes include a conductive layer connected to each corresponding lead portion and a plating layer to cover the conductive layer.
  12. 12. The method of claim 11,
    The plating layer may include a nickel (Ni) plating layer formed to cover the conductive layer and a tin (Sn) plating layer formed to cover the nickel plating layer.
  13. The method of claim 1,
    The multilayer ceramic capacitor further comprises a cover layer formed on the first and second side surfaces of the active layer.
  14. A substrate having first to third electrode pads thereon; And
    The multilayer ceramic capacitor of any one of claims 1 to 13 mounted on the first to third electrode pads of the substrate; Mounting substrate of the multilayer ceramic capacitor comprising a.
KR1020130129120A 2013-10-29 2013-10-29 Multi-layered ceramic capacitor and board for mounting the same KR20140038914A (en)

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TW103136756A TWI566266B (en) 2013-10-29 2014-10-24 Multilayer ceramic capacitor and board having the same
US14/527,662 US9396879B2 (en) 2013-10-29 2014-10-29 Multilayer ceramic capacitor and board having the same
CN201410592580.8A CN104576056B (en) 2013-10-29 2014-10-29 Multilayer ceramic capacitor and the plate with the multilayer ceramic capacitor
CN201810198872.1A CN108400014B (en) 2013-10-29 2014-10-29 Multilayer ceramic capacitor and board having the same
KR1020140183324A KR102018307B1 (en) 2013-10-29 2014-12-18 Multi-layered ceramic capacitor and board for mounting the same
US14/826,658 US9583267B2 (en) 2013-10-29 2015-08-14 Multilayer ceramic capacitor and board having the same

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