KR20120138903A - A light emitting device - Google Patents

A light emitting device Download PDF

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KR20120138903A
KR20120138903A KR1020110058328A KR20110058328A KR20120138903A KR 20120138903 A KR20120138903 A KR 20120138903A KR 1020110058328 A KR1020110058328 A KR 1020110058328A KR 20110058328 A KR20110058328 A KR 20110058328A KR 20120138903 A KR20120138903 A KR 20120138903A
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South Korea
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layer
light emitting
plasmon
light
emitting device
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KR1020110058328A
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Korean (ko)
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김지현
김병재
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엘지이노텍 주식회사
고려대학교 산학협력단
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Priority to KR1020110058328A priority Critical patent/KR20120138903A/en
Publication of KR20120138903A publication Critical patent/KR20120138903A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE: A light emitting device is provided to improve the light extraction efficiency of a light emitting device by forming a plasmon layer which emits light by a surface plasmon resonance on the surface of a light emitting structure to suppress internal total reflection. CONSTITUTION: A light emitting structure(120) is located on a substrate(110) and includes a first conductive type semiconductor layer(122), an active layer(124), and a second conductive type semiconductor layer(126). A plasmon layer(130A) is formed on the second conductive type semiconductor layer. A conductive layer(140) is formed on the Plasmon layer. A first electrode(152) is formed on the first conductive type semiconductor layer. A second electrode(154) is formed on the conductive layer.

Description

A light emitting device

Embodiments relate to a light emitting device and a light emitting device package.

The overall efficiency of the light emitting diode (LED) consists of internal quantum efficiency and light extraction efficiency. Internal quantum efficiency is an area related to the growth of the epi layer and is affected by defects inside the epi layer.

Light extraction efficiency may be degraded by total internal reflection due to the difference in refractive index between the nitride semiconductor (eg GaN) and air. As a method for increasing the light extraction efficiency, a method such as surface texturing has been widely used.

Such surface texturing usually uses photolithography, which has the advantage of providing accurate and uniform patterns, but has the disadvantage of complicated process and limited pattern size.

Surface texturing using nanosphere lithography, imprint method, etc., has been made as a method to compensate for the disadvantages of photolithography. However, these methods have the advantage that the nano-scale pattern can be implemented in a simple manner, but the disadvantage is that the dry etching process causes damage to the substrate.

The embodiment provides a light emitting device capable of improving light extraction efficiency.

Embodiments may include a light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; And a plasmon layer in contact with the light emitting structure, wherein the plasmon layer absorbs light generated from the active layer and emits light by surface plasmon resonance occurring between the light emitting structure and the plasmon layer.

The plasmon layer may have a structure including islands. The average diameter of the islands is 10nm ~ 100nm, the thickness of the islands may be 1nm ~ 100nm. The plasmon layer may be any one of Al, Pt, Cu, Cr, Pd, Ag, or Au. The plasmon layer may have a roughness on the surface.

The plasmon layer is disposed on the second conductivity type semiconductor layer, a portion of the first conductivity type semiconductor layer is exposed, and the light emitting device is disposed on a portion of the exposed first conductivity type semiconductor layer. ; A conductive layer disposed on the plasmon layer and the second conductive semiconductor layer; And a second electrode disposed on the conductive layer.

Alternatively, the plasmon layer may be disposed on the first conductive semiconductor layer, and the light emitting device may include a second electrode layer disposed below the second conductive semiconductor layer; The display device may further include a first electrode disposed on the plasmon layer and the first conductive semiconductor layer.

The embodiment can improve light extraction efficiency.

1 is a cross-sectional view of a light emitting device according to a first embodiment.
2 is a sectional view of a light emitting device according to a second embodiment.
3 is a sectional view of a light emitting device according to a third embodiment.
4 to 7 illustrate a method of manufacturing a light emitting device according to the embodiment.
8 is a sectional view of a light emitting device according to a fourth embodiment.
9 is a sectional view of a light emitting device according to a fifth embodiment.
10 is a sectional view of a light emitting device according to a sixth embodiment.
11 to 15 illustrate a method of manufacturing a light emitting device according to another embodiment.
16 is a graph showing the light emission intensity of a light emitting device having a plasmon layer according to the embodiment.
17 is a graph showing the increase in the generation of light according to the material of the plasmon layer.
18 illustrates a light emitting device package according to an embodiment.
19 is an exploded perspective view of a lighting device including a light emitting device package according to an embodiment.
20A illustrates a display device including a light emitting device package according to an embodiment.
20B is a cross-sectional view of a light source portion of the display device illustrated in FIG. 20A.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other features and advantages of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. In the description of an embodiment, each layer, region, pattern or structure may be "under" or "under" the substrate, each layer, region, pad or pattern. In the case where it is described as being formed at, "up" and "under" include both "directly" or "indirectly" formed through another layer. do. In addition, the criteria for the top / bottom or bottom / bottom of each layer are described with reference to the drawings.

In the drawings, sizes and thicknesses are exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not necessarily reflect the actual size. The same reference numerals denote the same elements throughout the description of the drawings. Hereinafter, a light emitting device, a light emitting device package, a lighting device, and a display device according to an embodiment will be described with reference to the accompanying drawings.

1 is a sectional view of a light emitting device 100 according to the first embodiment. Referring to FIG. 1, the light emitting device 100 includes a substrate 110, a light emitting structure 120, a plasmon layer 130, a conductive layer 140, a first electrode 152, and a second electrode ( 154).

The substrate 110 supports the light emitting structure 120, for example, any one of a sapphire substrate, a silicon (Si) substrate, a zinc oxide (ZnO) substrate, and a nitride semiconductor substrate or GaN, InGaN, AlGaN, AlInGaN, SiC, At least one of GaP, InP, Ga 2 O 3 , and GaAs may be a stacked template substrate.

The light emitting structure 120 is disposed on the substrate 110, and the first conductive semiconductor layer 122, the active layer 124, and the second conductive semiconductor layer 126 may be stacked. A buffer layer (not shown) may be interposed between the substrate 110 and the light emitting structure 120, and the buffer layer may be a layer or a pattern using a compound semiconductor of Group 2 to Group 6 elements. The buffer layer may reduce the difference in lattice constant between the substrate 110 and the light emitting structure 120, and the buffer layer may include an undoped semiconductor layer, and the undoped semiconductor layer may be formed of an undoped GaN semiconductor. .

The first conductivity type semiconductor layer 122 may be disposed on a substrate, and may be a compound semiconductor of a group 3 to group 5 element doped with the first conductivity type dopant. The first conductive semiconductor layer 122 is a semiconductor material having a composition formula of In x Al y Ga 1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), for example GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, etc. may be selected, and n-type dopants such as Si, Ge, Sn, Se, Te, and the like may be doped.

The active layer 124 is disposed on the first conductive semiconductor layer 122, and electrons and holes provided from the first conductive semiconductor layer 122 and the second conductive semiconductor layer 126. Light may be generated by energy generated during the recombination process of. The active layer 124 may include any one of a single quantum well structure, a multi quantum well structure (MQW), a quantum dot structure, or a quantum line structure.

For example, the active layer 124 if the quantum well structure, the active layer 124 is In x Al y Ga 1 -x- y N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) A single layer including a well layer having a compositional formula and a barrier layer having a compositional formula of In a Al b Ga 1 -a- b N ( 0≤a≤1, 0≤b≤1, 0≤a + b≤1) It may have a quantum well structure. The well layer may be formed of a material having a band gap smaller than the energy band gap of the barrier layer.

The second conductivity-type semiconductor layer 126 is disposed on the active layer 124 and may be a compound semiconductor of a group III-Group 5 element doped with the second conductivity type dopant. The second conductive semiconductor layer 126 is a semiconductor material having a composition formula of In x Al y Ga 1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), for example GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like may be selected, and p-type dopants such as Mg, Zn, Ca, Sr, and Ba may be doped.

Concave-convex (not shown) may be formed on the surface of the second conductive semiconductor layer 126 to improve light extraction efficiency.

A conductive clad layer may be formed between the active layer 124 and the first conductive semiconductor layer 122, or between the active layer 124 and the second conductive semiconductor layer 126. The layer may be formed of an AlGaN-based semiconductor.

The plasmon layer 130 is disposed on the second conductivity type semiconductor layer 126 and may improve light extraction efficiency of the light emitting device 100 by surface plasmon resonance.

The plasmon layer 130 absorbs light generated from the light emitting structure 120 and emits light having the same wavelength as the light absorbed by surface plasmon resonance occurring between the light emitting structure 120 and the plasmon layer 130.

The plasmon layer 130 may be a metal having a nano size in thickness. For example, the plasmon layer 130 may be any one of Al, Pt, Cu, Cr, Pd, Ag, or Au, and the thickness thereof may be 1 nm to 100 nm.

Surface plasmon resonance is a quantum-electromagnetic phenomenon caused by the interaction of free electrons and light at the interface between metal and dielectric material. Resonance may occur when the energy carried by the photons of the dielectric material at the interface of the metal and the dielectric material is transferred to the collective transition of free electrons present in the metal.

The wavelength of light to be absorbed may vary according to the type of metal material forming the plasmon layer 130.

For example, the plasmon layer 130 made of aluminum (Al) absorbs light in the deep UV wavelength band well, the surface plasmon resonance occurs by the absorbed deep UV wavelength band, and the light in the deep UV wavelength band by the surface plasmon resonance. Can be released.

In addition, the plasmon layer 130 made of silver absorbs light of the UV wavelength band well, surface plasmon resonance occurs by the absorbed UV wavelength band, and may emit light of the UV wavelength band by surface plasmon resonance. .

In addition, the plasmon 130 made of Au absorbs light in the visible region well, and the surface plasmon resonance is generated by the absorbed visible region. The plasmon 130 emits light in the visible region by the surface plasmon resonance. Can be.

17 is a graph showing the increase in the generation of light according to the material of the plasmon layer. The x-axis represents the bandgap energy of the generated light, and the y-axis represents the Purcell factor. In this case, the percell factor is a phenomenon in which light is generated in a specific environment in which a light source is increased, called a purcell effect. The larger the percussion factor, the greater the emission of light.

When the x-axis is expressed as the wavelength of light, the left side of the x-axis is the visible light region, and the right side is the Deep UV region.

Referring to FIG. 17, it can be seen that the wavelength band at which the percussion factor becomes the maximum value varies according to the material of the plasmon layer. For example, Al shows the maximum value of the percell factor in the deep UV region. This indicates that when the material of the plasmon layer is aluminum, the emission of light in the deep UV region is maximum.

The plasmon layer 130 may be made of a metal material that absorbs light generated in the active layer 124 of the light emitting structure 120. For example, when light generated in the active layer 124 has a UV wavelength, the plasmon layer 130 may be silver (Ag). Alternatively, when the light generated from the active layer 124 has a deep UV wavelength, the plasmon layer 130 may be aluminum (Al). In addition, when the light generated from the active layer 124 has a visible light wavelength, the plasmon layer 130 may be gold (Au).

Therefore, according to the embodiment, the plasmon layer 130 absorbs light generated from the light emitting structure 120 and emits light again by surface plasmon resonance, thereby suppressing total reflection inside the light emitting structure 120 due to the difference in refractive index. The light extraction efficiency can be improved.

The conductive layer 140 is disposed on the plasmon layer 130. Since the conductive layer 140 reduces total reflection and has good light transmittance, the extraction efficiency of light emitted from the active layer 124 to the second conductive semiconductor layer 126 may be increased.

The conductive layer 140 may be formed of a transparent conductive oxide, such as indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium aluminum zinc oxide (IZAZO), or IGZO (IGZO). Indium Gallium Zinc Oxide (IGTO), Indium Gallium Tin Oxide (IGTO), Aluminum Zinc Oxide (AZO), Antimony Tin Oxide (ATO), Gallium Zinc Oxide (GZO), IrOx, RuOx, RuOx / ITO, Ni, Ag, Ni / IrOx / Au, or Ni / IrOx / Au / ITO can be used to form a single layer or multiple layers.

The first electrode 152 is disposed on the first conductive semiconductor layer 122, and the second electrode 154 is disposed on the conductive layer 140.

In general, the light emitted from the light emitting structure is absorbed by the light emitting structure due to the total internal reflection due to the difference in the refractive index between the light emitting structure and the air or the difference in the refractive index between the light emitting structure and the neighboring layer. Accordingly, the light extraction efficiency of the light emitting device may decrease.

However, in the embodiment, the plasmon layer 130 absorbs the light generated from the light emitting structure 120, and includes a plasmon layer 130 on the surface of the light emitting structure 120 that emits light due to surface plasmon resonance. By suppressing the light extraction efficiency of the light emitting device 100 can be improved.

2 is a sectional view of a light emitting device 200 according to the second embodiment. The same reference numerals as in FIG. 1 denote the same configuration, and a description overlapping with the above description will be omitted or briefly described.

Referring to FIG. 2, the light emitting device 200 may include a substrate 110, a light emitting structure 120, a plasmon layer 130A, a conductive layer 140, a first electrode 152, and a second electrode 154. Include.

The plasmon layer 130A is disposed on the second conductivity type semiconductor layer 126 and may have a structure having islands. At this time, the shape of the island may be regular or irregular.

For example, the average diameter of the islands may be 10 nm to 100 nm, the separation distance between the islands may be 1 nm to 100 nm, and the thickness of the islands may be 1 nm to 100 nm. The shape, diameter, and thickness of the island can be determined according to the RTA conditions described below, such as the temperature, time, or pressure of the annealing.

In the second embodiment, since the plasmon 130A has an island structure, the light emitting surface area increases, and light may scatter from the surface.

That is, compared with the first embodiment, the second embodiment increases the light extraction efficiency by increasing the light emitting surface area, and the light absorbed by the plasmon 130A is scattered on the surface of the plasmon layer 130A of the island structure. Therefore, the light extraction efficiency can be further improved.

3 is a sectional view of a light emitting device 300 according to a third embodiment. The same reference numerals as in FIG. 1 denote the same configuration, and a description overlapping with the above description will be omitted or briefly described.

Referring to FIG. 3, the light emitting device 300 includes a substrate 110, a light emitting structure 120, a plasmon layer 130B, a conductive layer 140, a first electrode 152, and a second electrode 154. Include.

The plasmon layer 130B is disposed on the second conductivity type semiconductor layer 126 and may have a structure having islands. At this time, the shape of the island may be regular or irregular. The plasmon layer 130B has a roughness 610 on the surface, and the roughness 610 may be a regular or irregular shape.

In addition, the second conductive semiconductor layer 126 may have irregularities 620 formed on a surface thereof to improve light extraction efficiency.

Compared with the second embodiment, since the third embodiment has a roughness 610 on the surface of the plasmon layer 130B, light scattering is greater on the surface of the plasmon layer 130B. Therefore, the light emitting device 300 may further improve light extraction efficiency.

16 is a graph showing the light emission intensity of the light emitting device 200 including the plasmon layer 130A according to the embodiment. FIG. 16 shows the photoluminescence intensity of a UV (UltraViolet) light emitting device having a plasmon layer 130A made of silver (Ag).

Where f1 represents the light emission intensity of the light emitting device according to the second embodiment, f2 represents the light emission intensity of a general light emitting device that does not have a plasmon layer.

Referring to FIG. 16, in the UV wavelength band (eg, 360 nm to 400 nm), the light emitting device 200 may increase PL intensity by about 30% or more when compared with a general light emitting device.

In general, another method of increasing the light extraction efficiency of the light emitting device by using the plasmon phenomenon is to increase the internal quantum efficiency by increasing the recombination rate of electrons and holes. However, this method is limited in the effective depth of the plasmon energy, ie the distance between the plasmon layer and the active layer.

For example, when the plasmon layer is silver (Ag), the separation distance between the plasmon layer and the active layer should be about 40 nm to increase the internal quantum efficiency due to the increase in the recombination rate of electrons and holes. However, since the thickness of p-GaN, which is the uppermost layer of a general light emitting device, is more than 100 nm, the general light emitting device may not have the effect of increasing the internal quantum efficiency described above.

On the other hand, the embodiment can improve the light extraction efficiency of the light emitting device by the surface plasmon resonance regardless of the distance between the plasmon layer and the active layer.

4 to 7 illustrate a method of manufacturing a light emitting device according to the embodiment. The same reference numerals as in FIG. 1 denote the same configuration, and a description overlapping with the above description will be omitted or briefly described.

Referring to FIG. 4, the light emitting structure 120 in which the first conductive semiconductor layer 122, the active layer 124, and the second conductive semiconductor layer 126 are sequentially stacked is formed on the substrate 110. .

The light emitting structure 120 may include metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma chemical vapor deposition (PCVD), molecular beam growth (MBE); It can be formed through various deposition and growth methods including Molecular Beam Epitaxy) and Hydride Vapor Phase Epitaxy (HVPE).

Referring to FIG. 5, a metal thin film layer 130 for forming a plasmon layer is formed on the light emitting structure 120. In this case, the metal thin film layer 130 may be any one of Ag, Al, Pt, Cu, Cr, Pd, and Au.

For example, the metal thin film layer 130 may be deposited on the second conductive semiconductor layer 126 by using an E-beam deposition method, sputtering, or thermal evaporator. At this time, the thickness of the deposited metal thin film layer 130 may be 1nm ~ 100nm,

Referring to FIG. 6, the metal thin film layer 130 is transformed into an island-type plasmon layer 130A by performing an annealing process on the metal thin film layer 130.

For example, in the case of a light emitting device including a GaN-based light emitting structure 120 grown on a SiC substrate, an RTA (Rapid Thermal Annealing) is performed at a temperature of 700 ° C. for 1 minute. 130A). In this case, the shapes of the islands 130A formed may be regular or irregular.

The diameter of the island 130A and the separation distance between the islands may be determined according to the RTA conditions, such as the temperature, time, or pressure of the annealing.

Referring to FIG. 7, the light emitting structure 120 is mesa-etched to expose a portion of the first conductivity-type semiconductor layer 122. The conductive layer 140 covering the second conductive semiconductor layer 126 and the plasmon layer 130A is formed on the second conductive semiconductor layer 126.

The first electrode 152 is formed on the exposed first conductive semiconductor layer 122, and the second electrode 154 is formed on the conductive layer 140.

In the method of manufacturing the light emitting device according to the embodiment, the plasmon layer 130 having an island shape may be formed on the light emitting structure 120 to improve light extraction efficiency of the light emitting device.

In addition, in the method of manufacturing the light emitting device according to the embodiment, after forming the metal thin film layer 130, the plasmon layer 130A having an island structure may be formed by performing a simple RTA process in FIG. 6, the RTA condition and the metal thin film layer 130. ), You can easily adjust the size and spacing of the island.

If the process of FIG. 6 is omitted, the first embodiment shown in FIG. 1 may be implemented. In addition, the third embodiment shown in FIG. 3 may be implemented by forming the roughness 610 on the plasmon layer 130A by using an etching process after the process of FIG. 6.

8 is a sectional view of a light emitting device 400 according to a fourth embodiment. Referring to FIG. 8, the light emitting device 400 may include a second electrode layer 230, a protection layer 220, a current blocking layer 225, a light emitting structure 120-1, a plasmon layer 240, Passivation layer 250, and first electrode 260.

The second electrode layer 230 supports the light emitting structure 120-1 and supplies a first power source (eg, a positive power source). The second electrode layer 230 includes a support layer 236, a reflective layer 234, and an ohmic layer 232.

The support layer 236 supports the light emitting structure 120. The support layer 236 may be a metal layer including at least one of copper (Cu), tungsten (W), and molybdenum (Mo), or may include at least one of Si, Ge, GaAs, ZnO, and SiC.

The reflective layer 234 is disposed between the support layer 236 and the ohmic layer 232. The reflective layer 234 may reflect light incident from the light emitting structure 120-1 to improve light extraction efficiency.

The reflective layer 234 may be formed of a metal or an alloy including at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, and Hf. In addition, the reflective layer 234 may be formed in a multilayer using a metal or an alloy and a light transmitting conductive material such as IZO, IZTO, IAZO, IGZO, IGTO, AZO, or ATO. The reflective layer 234 may be formed of, for example, IZO / Ni, AZO / Ag, IZO / Ag / Ni, AZO / Ag / Ni, or the like.

A bonding layer may be interposed between the support layer 236 and the reflective layer 234. In this case, the bonding layer may prevent diffusion of metal ions from the support layer 236 and may serve as a bonding layer. The bonding layer may include, for example, at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, or Ta.

Since the bonding layer is formed to bond the support layer 236 by a bonding method, the bonding layer is not necessarily formed when the support layer is formed by a plating or deposition method.

The ohmic layer 232 is disposed between the reflective layer 232 and the light emitting structure 120-1. The ohmic layer 232 serves to make ohmic contact to the light emitting structure 120-1 so that the first power is smoothly supplied to the light emitting structure 120-1.

The ohmic layer 232 may include at least one of In, Zn, Sn, Ni, Pt, and Ag. In addition, the ohmic layer 232 may selectively use a transparent conductive layer and a metal. For example, the ohmic contact layer 120 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), or indium IGTO (IGTO). gallium tin oxide), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IrO x , RuO x , RuO x / ITO, Ni, Ag, Ni / IrO x / Au, and Ni One or more of / IrO x / Au / ITO can be used to implement a single layer or multiple layers.

The ohmic layer 232 is for smoothly injecting a carrier into the light emitting structure 140 and the second conductive semiconductor layer 141 which will be described later. For example, the ohmic layer 232 may be omitted, and a material used as the reflective layer 234 may be selected as a material in ohmic contact with the second conductive semiconductor layer 126. In this case, the reflective layer 234 functions as an ohmic layer.

The current blocking layer 225 is disposed between the ohmic layer 232 and the light emitting structure 120-1. The upper surface of the current blocking layer 225 may contact the second conductive semiconductor layer 126, and the lower surface, or the lower surface and the side surface of the current blocking layer 225 may contact the ohmic layer 232.

The current blocking layer 225 may be disposed to overlap at least a portion of the first electrode 260 in the direction from the second electrode layer 230 toward the light emitting structure 120-1. The current blocking layer 225 may improve light emission efficiency of the light emitting device 400 by alleviating a phenomenon in which current is concentrated at a specific portion of the light emitting structure 120-1.

The current blocking layer 225 may be a material having a lower electrical conductivity than the reflective layer 234 or the ohmic layer 232, or a material forming a Schottky contact with the second conductive semiconductor layer 126. Or the current blocking layer 225 is an electrically insulating material, such as ZnO, SiO 2 , SiON, It may include at least one of Si 3 N 4 , Al 2 O 3 , TiO 2 , Ti, Al, Cr.

In another embodiment, the current blocking layer may be disposed between the ohmic layer 232 and the reflective layer 234, but is not limited thereto.

The protective layer 220 is disposed on the edge region of the second electrode layer 230. For example, the protective layer 220 may be disposed on the most cock area of the support layer 236. Alternatively, the protective layer 220 may be disposed on the edge region of the ohmic layer 232 or the edge region of the reflective layer 234.

The protective layer 220 may reduce a phenomenon in which the interface between the light emitting structure 120-1 and the second electrode layer 230 is peeled off, thereby reducing the reliability of the light emitting device 400. The protective layer 220 may be formed of a material having a lower electrical conductivity than the ohmic layer 232 or the reflective layer 234, or a material forming a schottcky contact with the second conductive semiconductor layer 126. have. Or protective layer 220 is an electrically insulating material, such as ZnO, SiO 2 , Si 3 N 4 , TiOx (x is a positive real number), or Al 2 O 3 Or the like.

The light emitting structure 120-1 is disposed on the second electrode layer 230 and the protective layer 220. For example, the light emitting structure 120-1 may be disposed on the ohmic layer 232 and the protective layer 220. The side surface of the light emitting structure 120-1 may be an inclined surface in an isolation etching process divided into unit chips.

At least a portion of the light emitting structure 120-1 may overlap the protective layer 220 in the first direction. The first direction may be a direction from the second electrode layer 230 toward the light emitting structure 120-1. In addition, a portion of the upper surface of the protective layer 220 may be exposed by isolation etching.

The light emitting structure 120-1 is a second conductive semiconductor layer 126, an active layer 124, and a first conductive semiconductor layer 122 that are sequentially stacked on the ohmic layer 232 and the protective layer 220. It may include.

The plasmon layer 240 is disposed on the first conductivity type semiconductor layer 122. As described with reference to FIG. 1, the plasmon 240 may improve light extraction efficiency of the light emitting device 400 by surface plasmon resonance.

The passivation layer 250 may surround side surfaces of the light emitting structure 120-1 to electrically protect the light emitting structure 120-1. The passivation layer 250 may contact the top surface of the passivation layer 220. The passivation layer 250 may be formed of an electrically insulating material such as SiO 2 , SiO x , SiO x N y , Si 3 N 4 , to be formed of Al 2 O 3 Can be. The first electrode 260 is disposed on the plasmon layer 240. The first electrode 260 may overlap the current blocking layer 225 in the first direction.

9 is a sectional view of a light emitting device 500 according to a fifth embodiment. The same reference numerals as in FIG. 8 represent the same configuration, and a description overlapping with the above description will be omitted or briefly described.

Referring to FIG. 9, the plasmon layer 240A may be disposed on the first conductivity type semiconductor layer 122 and may have a structure having islands. At this time, the shape of the island may be regular or irregular. The shape and size of the plasmon layer 240A may be the same as described with reference to FIG. 2. Compared with the fourth embodiment, the fifth embodiment may further improve light extraction efficiency of the light emitting device 500.

10 is a sectional view of a light emitting device 600 according to the sixth embodiment. The same reference numerals as in FIG. 8 denote the same configuration, and a description overlapping with the above description will be omitted or briefly described.

Referring to FIG. 10, the plasmon layer 240B may be disposed on the first conductivity type semiconductor layer 122 and may have a structure having islands. At this time, the shape of the island may be regular or irregular. The plasmon layer 240B has a roughness 630 on its surface.

In addition, the first conductive semiconductor layer 122 may have irregularities 640 formed on a surface thereof to improve light extraction efficiency.

Compared with the fifth embodiment, since the sixth embodiment has a roughness 630 on the surface of the plasmon layer 240B, the light extraction efficiency of the light emitting device 600 may be further improved.

11 to 15 illustrate a method of manufacturing a light emitting device according to another embodiment.

Referring to FIG. 11, a light emitting structure 120-1 is formed on the growth substrate 210. The growth substrate 210 may be the substrate 110 illustrated in FIG. 1, and the light emitting structure 120-1 may be grown by the method described with reference to FIG. 4.

In addition, a patterned passivation layer 220 is formed on the light emitting structure 120-1 to distinguish the unit chip region. The unit chip area refers to an area that can be operated by being separated into individual chip units. The protective layer 220 may be formed around the edge of the unit chip region using a mask.

Next, a current blocking layer 225 is formed on the second conductive semiconductor layer 126 exposed by the protective layer 220.

Referring to FIG. 12, an ohmic layer 232 is formed on the second conductive semiconductor layer 126 and the current blocking layer 225. The reflective layer 234 is formed on the ohmic layer 232, and the support layer 236 is formed on the reflective layer 234. The ohmic layer 232 and the reflective layer 234 may be formed by any one of electron beam (E-beam) deposition, sputtering, and plasma enhanced chemical vapor deposition (PECVD). The support layer 236 may be formed by a bonding method, a plating method, or a deposition method.

Referring to FIG. 13, the growth substrate 210 is removed from the light emitting structure 120-1 by using a laser lift off method or a chemical lift off method. 13 illustrates the structure shown in FIG. 12 upside down.

Next, a metal thin film layer 240 for forming a plasmon layer is formed on the first conductive semiconductor layer 122 exposed after removing the growth substrate 210.

Referring to FIG. 14, an annealing process is performed on the metal thin film layer 240 to deform the metal thin film layer 240 into an island-shaped plasmon layer 240A.

Referring to FIG. 15, an isolation etching is performed on the light emitting structure 120-1 according to the unit chip region. For example, isolation etching may be performed by a dry etching method such as inductively coupled plasma (ICP).

The passivation layer 250 is formed to cover the side surface of the light emitting structure 120-1. The first electrode 260 is formed on the plasmon layer 240A and the first conductivity-type semiconductor layer 122. In this case, the first electrode 260 may overlap the current blocking layer 225 in the first direction.

If the process of FIG. 14 is omitted, the fourth embodiment shown in FIG. 8 may be implemented. In addition, by forming the roughness 630 on the plasmon layer 240A by using an etching process or the like after the process of FIG. 14, the sixth embodiment illustrated in FIG. 10 may be implemented.

18 illustrates a light emitting device package according to an embodiment. Referring to FIG. 18, the light emitting device package may include a package body 510, a first metal layer 512, a second metal layer 514, a light emitting device 520, a first wire 522, a second wire 524, The reflective plate 530 and the encapsulation layer 540 are included.

The package body 510 is a structure in which a cavity is formed in one region. At this time, the side wall of the cavity may be formed to be inclined. The package body 510 may be formed of a substrate having good insulation or thermal conductivity, such as a silicon-based wafer level package, a silicon substrate, silicon carbide (SiC), aluminum nitride (AlN), or the like. It may have a structure in which a plurality of substrates are stacked. The embodiments are not limited to the material, structure, and shape of the body described above.

The first metal layer 512 and the second metal layer 514 are disposed on the surface of the package body 510 to be electrically separated from each other in consideration of heat dissipation or mounting of a light emitting device. The light emitting device 520 may be electrically connected to the first metal layer 512 and the second metal layer 514 through the first wire 522 and the second wire 524.

The reflective plate 530 is formed on the sidewall of the cavity of the package body 510 to direct light emitted from the light emitting element 520 in a predetermined direction. The reflector plate 530 is made of a light reflective material, and may be, for example, a metal coating or a metal flake.

The encapsulation layer 540 surrounds the light emitting device 520 positioned in the cavity of the package body 510 to protect the light emitting device 520 from the external environment. The encapsulation layer 540 is made of a colorless transparent polymer resin material such as epoxy or silicon. The encapsulation layer 540 may include a phosphor to change the wavelength of light emitted from the light emitting device 520. The light emitting device package illustrated in FIG. 18 may improve light extraction efficiency.

A plurality of light emitting device packages according to the exemplary embodiment illustrated in FIG. 18 may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, or the like, which is an optical member, may be disposed on an optical path of the light emitting device package. The light emitting device package, the substrate, and the optical member may function as a backlight unit.

Still another embodiment may be implemented as a display device, an indicating device, and a lighting system including the light emitting device or the light emitting device package described in the above embodiments. For example, the lighting system may include a lamp and a streetlight.

19 is an exploded perspective view of a lighting device including a light emitting device package according to an embodiment. Referring to FIG. 19, the apparatus may radiate heat with a light source 750 for projecting light, a housing 700 in which the light source 7500 is built, and a heat dissipation unit 740 and a light source 750 for dissipating heat from the light source 750. And a holder 760 that couples the portion 740 to the housing 700.

The housing 700 includes a socket coupling portion 710 coupled to an electric socket (not shown), and a body portion 730 connected to the socket coupling portion 710 and having a light source 750 embedded therein. One air flow hole 720 may be formed through the body portion 730.

A plurality of air flow holes 720 are provided on the body portion 730 of the housing 700 and one or more air flow holes 720 may be provided. The air flow port 720 may be disposed radially or in various forms on the body portion 730.

The light source 750 includes a plurality of light emitting device packages 752 provided on the substrate 754. [ The substrate 754 may have a shape that can be inserted into the opening of the housing 700 and may be made of a material having a high thermal conductivity to transmit heat to the heat dissipating unit 740 as described later. The plurality of light emitting device packages may be any one of the above-described embodiments.

A holder 760 is provided below the light source 750, and the holder 760 may include a frame and other air flow holes. Although not shown, an optical member may be provided under the light source 750 to diffuse, scatter, or converge light projected from the light emitting device package 752 of the light source 750.

20A illustrates a display device including a light emitting device package according to an embodiment, and FIG. 20B is a cross-sectional view of a light source portion of the display device illustrated in FIG. 20A.

20A and 20B, the display device includes a backlight unit, a liquid crystal display panel 860, a top cover 870, and a fixing member 850.

The backlight unit includes a bottom cover 810, a light emitting module 880 provided at one side of the bottom cover 810, a reflecting plate 820 disposed at the front of the bottom cover 810, and a reflecting plate ( The light guide plate 830 is disposed in front of the light guide module 880 to guide the light emitted from the light emitting module 880 to the front of the display device, and the optical member 840 is disposed in front of the light guide plate 30. The liquid crystal display 860 is disposed in front of the optical member 840, the top cover 870 is provided in front of the liquid crystal display panel 860, and the fixing member 850 is provided with the bottom cover 810 and the top cover. Disposed between 870 to fix bottom cover 810 and top cover 870 together.

The light guide plate 830 serves to guide the light emitted from the light emitting module 880 to be emitted in the form of a surface light source, and the reflective plate 820 disposed behind the light guide plate 830 may emit light emitted from the light emitting module 880. The light guide plate 830 is reflected in the direction to increase the light efficiency. However, the reflective plate 820 may be provided as a separate component as shown in the figure, or may be provided in the form of a high reflectivity coating on the back of the light guide plate 830, or the front of the bottom cover 810. . Here, the reflection plate 820 can be made of a material having a high reflectance and can be used in an ultra-thin shape, and polyethylene terephthalate (PET) can be used.

The light guide plate 830 scatters the light emitted from the light emitting module 880 so that the light is uniformly distributed over the entire area of the screen of the liquid crystal display. Accordingly, the light guide plate 830 is made of a material having a good refractive index and transmittance. The light guide plate 830 may be formed of polymethyl methacrylate (PMMA), polycarbonate (PC), or polyethylene (PE).

An optical member 840 is provided on the light guide plate 830 to diffuse light emitted from the light guide plate 830 at a predetermined angle. The optical member 840 uniformly radiates the light guided by the light guide plate 830 toward the liquid crystal display panel 860. As the optical member 840, an optical sheet such as a diffusion sheet, a prism sheet, or a protective sheet may be selectively laminated, or a micro lens array may be used. In this case, a plurality of optical sheets may be used, and the optical sheets may be made of a transparent resin such as acrylic resin, polyurethane resin, or silicone resin. The fluorescent sheet may be included in the above-described prism sheet as described above.

The liquid crystal display panel 860 may be provided on the front surface of the optical member 840. Here, it is obvious that other types of display devices requiring a light source besides the liquid crystal display panel 860 may be provided. The reflective plate 820 is placed on the bottom cover 810, and the light guide plate 830 is placed on the reflective plate 820. Thus, the reflector plate 820 may be in direct contact with the heat radiation member (not shown). The light emitting module 880 includes a light emitting device package 882 and a printed circuit board 881. The light emitting device package 882 is mounted on the printed circuit board 881. The light emitting device package 881 may be any one of the above-described embodiments.

The printed circuit board 881 may be bonded on the bracket 812. Here, the bracket 812 is made of a material having high thermal conductivity for heat dissipation in addition to the fixing of the light emitting device package 882, and although not shown, a thermal pad is provided between the bracket 812 and the light emitting device package 882. To facilitate heat transfer. In addition, the bracket 812 is provided as a 'b' type as shown, the horizontal portion 812a is supported by the bottom cover 810, the vertical portion 812b is fixed to the printed circuit board 881 can do.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Further, the features, structures, effects, and the like illustrated in the embodiments can be combined and modified by other persons having ordinary skill in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

110: substrate 120, 120-1: light emitting structure
122: first conductivity type semiconductor layer 124: active layer
126: second conductive semiconductor layer 130, 130A, 240, 240A: plasmon layer
140: conductive layer 152,260: first electrode
154: second electrode 220: protective layer
225: current blocking layer 230: second electrode layer
232: ohmic layer 234: reflective layer
236: support substrate 510: package body
512: first metal layer 514: second metal layer
520: light emitting element 522: first wire
524: Second wire 530: Reflector
540: encapsulation layer 610, 620: roughness.

Claims (7)

A light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; And
It includes a plasmon layer in contact with the light emitting structure,
The plasmon layer,
The light emitting device absorbs light generated from the active layer and emits light by surface plasmon resonance occurring between the light emitting structure and the plasmon layer. The method of claim 1, wherein the plasmon layer,
A light emitting device having a structure including islands. The method of claim 1 or 2, wherein the plasmon layer,
A light emitting device which is any one of Al, Pt, Cu, Cr, Pd, Ag, or Au. The method of claim 2,
The plasmon layer is disposed on the second conductive semiconductor layer, a portion of the first conductive semiconductor layer is exposed,
A first electrode disposed on a portion of the exposed first conductive semiconductor layer;
A conductive layer disposed on the plasmon layer and the second conductive semiconductor layer; And
And a second electrode disposed on the conductive layer. The method of claim 2,
The plasmon layer is disposed on the first conductivity type semiconductor layer,
A second electrode layer disposed under the second conductive semiconductor layer;
And a first electrode disposed on the plasmon layer and the first conductive semiconductor layer. The method according to claim 4 or 5,
The plasmon layer is a light emitting device having a roughness on the surface. The method according to claim 4 or 5,
The average diameter of the island is 10nm ~ 100nm, the thickness of the island is 1nm ~ 100nm light emitting device.
KR1020110058328A 2011-06-16 2011-06-16 A light emitting device KR20120138903A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9847621B2 (en) 2013-10-31 2017-12-19 Samsung Electronics Co., Ltd. Apparatus for outputting directional light and light interconnection system having the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9847621B2 (en) 2013-10-31 2017-12-19 Samsung Electronics Co., Ltd. Apparatus for outputting directional light and light interconnection system having the same

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