KR20120042331A - Horizontal light emitting diode chip and method of manufacturing the same - Google Patents

Horizontal light emitting diode chip and method of manufacturing the same Download PDF

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Publication number
KR20120042331A
KR20120042331A KR1020100103987A KR20100103987A KR20120042331A KR 20120042331 A KR20120042331 A KR 20120042331A KR 1020100103987 A KR1020100103987 A KR 1020100103987A KR 20100103987 A KR20100103987 A KR 20100103987A KR 20120042331 A KR20120042331 A KR 20120042331A
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South Korea
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layer
type
ohmic contact
type semiconductor
semiconductor layer
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KR1020100103987A
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Korean (ko)
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김근호
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일진머티리얼즈 주식회사
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Publication of KR20120042331A publication Critical patent/KR20120042331A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE: A horizontal light emitting diode chip and a manufacturing method thereof are provided to prevent a current concentration phenomenon between a p-type semiconductor layer and an n-type semiconductor layer by including a reflective metal layer and a p-type ohmic contact layer. CONSTITUTION: An insulating layer(320) is formed on a support substrate(310). A p-type ohmic contact layer(330) is formed on the insulating layer. A light emitting structure pattern(350) is formed on the p-type ohmic contact layer. A p-type electrode layer(360) is electrically connected to the p-type ohmic contact layer. An n-type electrode layer(370) is electrically connected to an n-type semiconductor layer pattern.

Description

Horizontal light emitting diode chip and method of manufacturing the same

The present application generally relates to a light emitting diode chip, and more particularly, to a horizontal light emitting diode chip having a vertical current distribution and a method of manufacturing the same.

Light emitting diodes (LEDs) are photoelectric conversion elements that emit light by applying a forward current to both ends of a P-N junction. In general, LEDs are released into commercial products in the form of modules through epi wafer fabrication process, chip production process, packaging process and module process. Recently, as the LED is applied to a device requiring high power, such as a lighting fixture, the research of the LED is actively progressing in the field of increasing the efficiency of the LED, such as light extraction efficiency.

The LED chip manufactured by the chip production process may be largely classified into a horizontal type LED and a vertical type LED according to the arrangement of the electrodes. 1 illustrates an example of a conventional horizontal LED chip. Referring to FIG. 1, a conventional horizontal LED chip 100 includes a sapphire substrate 110, an N-type gallium nitride layer 120, a gallium nitride-based active layer 130, a P-type gallium nitride layer 140, and an N-type. The electrode layer 150 and the P-type electrode layer 160 are included. Electrons provided from the N-type electrode layer 150 through the N-type gallium nitride layer 120 and holes provided from the P-type electrode layer 160 through the P-type gallium nitride layer 140 are in the gallium nitride based active layer 130. By combining light is emitted. As shown, the conventional horizontal LED chip 100 applies the sapphire substrate 110 which is an insulator, and the N-type electrode layer 150 and the P-type electrode layer 160 are the same plane with respect to the sapphire substrate 110. Place on.

2 shows an example of a conventional vertical LED chip. Referring to FIG. 2, the vertical LED 200 includes a support substrate 210 which is a conductor, a solder metal layer 220 disposed on the support substrate 210, and a P-type nitride sequentially disposed on the solder metal layer 220. The gallium layer 230, the gallium nitride-based active layer 240 and the N-type gallium nitride layer 250 is included. The vertical LED 200 is an electrode layer, and the N-type electrode layer 260 disposed above the N-type gallium nitride layer 250 and the P-type electrode layer 270 disposed below the P-type gallium nitride layer 230. Include. As shown, the conventional vertical LED chip 200 applies the support substrate 210 which is a conductor, and arranges the N-type electrode layer 260 and the P-type electrode layer 270 above and below the LED chip 200. .

The above-described conventional horizontal LED chip 100 and vertical LED chip 200 may have the following disadvantages resulting from the structure, respectively. First, in the case of the conventional horizontal LED chip 100, since the N-type gallium nitride layer 140 has a very low electrical conductivity compared to the metal, through the etching process such as mesa etching process, N-type nitride of a wider area It is necessary to expose the gallium layer. As a result, although the contact area between the N-type gallium nitride layer 120 and the N-type electrode layer 150 may be increased, the area of the gallium nitride-based active layer 130 which is the light emitting layer may be reduced. In addition, since the electrical conductivity of the N-type gallium nitride layer 120 is low, the current flow 170 between the N-type gallium nitride layer 120, the gallium nitride-based active layer 130 and the P-type gallium nitride layer 140 is Denseness along certain streets may occur. That is, as an example, the current flow may be formed between the gallium nitride based active layer 130 and the P-type gallium nitride layer 140 along the specific path having the low electrical resistance of the N-type gallium nitride layer 120. have. When such a phenomenon occurs, light emission is not performed over the entire area of the gallium nitride-based active layer 130, so that light emission efficiency may be lowered and reliability may be lowered. In addition, separate wire bonding is required for the N-type electrode layer 150 and the P-type electrode layer 160, respectively. Thermal instability may occur when heat is released through the sapphire substrate 110, which has poor heat transfer properties compared to the conductor. Since the sapphire substrate 110 has high hardness, the yield may be lowered in the chip separation process of cutting the sapphire substrate 110.

In the case of the conventional vertical LED chip 200, the lower portion of the vertical LED chip 200 is the P-type electrode layer 270. Therefore, the following difficulties exist in package formation. First, when serial connection of a plurality of vertical LED chips 200 is required, the plurality of vertical LED chips 200 may not be disposed directly above the metal terminals of the package. Recently, there is a demand for maximizing heat dissipation in high-power LEDs. For this purpose, when employing a metal PCB, there is a difficulty in that a plurality of vertical LED chips 200 cannot be directly bonded to a conductor base of the metal PCB. .

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a horizontal LED chip having a new structure that compensates for the disadvantages of the conventional horizontal LED chip and the vertical LED chip.

Another technical problem to be achieved by the present invention is to provide a method of manufacturing the horizontal LED chip of the new structure.

Disclosed is a horizontal LED chip according to an aspect of the present application for achieving the above technical problem. The horizontal LED chip may include a support substrate, an insulation layer disposed on the support substrate, a P-type ohmic contact layer disposed on the insulation layer, a P-type semiconductor layer pattern sequentially disposed on the P-type ohmic contact layer, The light emitting structure pattern includes an active layer pattern and an N-type semiconductor layer pattern, a P-type electrode layer electrically connected to the P-type ohmic contact layer, and an N-type electrode layer electrically connected to the N-type semiconductor layer pattern. The P-type ohmic contact layer covers at least the P-type semiconductor layer pattern and functions to maintain the P-type semiconductor layer pattern at substantially the same potential.

Disclosed is a method of manufacturing a horizontal LED chip according to another aspect of the present application for achieving the above technical problem. In the method of manufacturing the horizontal LED chip, first, a light emitting structure including an N-type semiconductor layer, an active layer, and a P-type semiconductor layer is formed on a growth substrate. A P-type ohmic contact layer is formed on the P-type semiconductor layer. An insulating layer and a support substrate are formed on the P-type ohmic contact layer. The growth substrate is separated from the N-type semiconductor layer. At least two layers of the light emitting structure are etched on the support substrate to form a light emitting structure pattern including at least two or more of a P-type semiconductor layer pattern, an active layer pattern, and an N-type semiconductor layer pattern. A P-type electrode layer is formed to be electrically connected to the P-type ohmic contact layer. An N-type electrode layer is formed on the light emitting structure pattern. In this case, the P-type ohmic contact layer is formed to cover the P-type semiconductor layer or the P-type semiconductor layer pattern.

The horizontal LED chip according to the exemplary embodiment of the present application may include a P-type ohmic contact layer or a reflective metal layer, thereby preventing a phenomenon in which current is concentrated along a specific path between the P-type semiconductor layer and the N-type semiconductor layer. . As a result, the electrical resistance in the P-type semiconductor layer can be reduced, and the light emitting area can be increased.

In addition, the horizontal LED may have a support substrate having excellent thermal conductivity. Since both electrode layers and the support substrate of the horizontal LED are electrically insulated from each other, direct bonding to the metal base is possible when mounting the PCB. This maximizes the heat dissipation of the LED chip in a chip on PCB base (COB) package structure or a package on PCB base (POB) package structure.

1 is a view schematically showing an example of a conventional horizontal LED chip.
2 is a view schematically showing an example of a conventional vertical LED chip.
3 is a view schematically showing a horizontal LED chip according to an embodiment of the present application.
4 is a view schematically showing a horizontal LED chip according to another embodiment of the present application.
5 is a view schematically showing a horizontal LED chip according to another embodiment of the present application.
6 is a cross-sectional view schematically showing an LED package to which the LED chip according to an embodiment of the present application is applied.
7 to 13 are cross-sectional views illustrating a method of manufacturing a horizontal LED chip according to an embodiment of the present application.

Embodiments of the present application will now be described in more detail with reference to the accompanying drawings. However, the techniques disclosed in this application are not limited to the embodiments described herein but may be embodied in other forms. It should be understood, however, that the embodiments disclosed herein are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the width, thickness, and the like of the components are enlarged in order to clearly express the components of each device. The description was made at the point of view of the observer as a whole, and one of ordinary skill in the art may realize the spirit of the present application in various other forms without departing from the technical spirit of the present application. In addition, in the drawings, the same reference numerals refer to substantially the same elements.

In addition, singular expressions should be understood to include plural expressions unless the context clearly indicates otherwise, and the terms “comprise” or “having” should include features, numbers, steps, actions, components, and parts described. Or combinations thereof, it is to be understood that they do not preclude the presence or addition of one or more other features or numbers, steps, operations, components, parts or combinations thereof.

Further, the attachment of the first component to the second component means that the first component is attached directly to the second component, as well as the second component via or using the third component. When attached to an element, it is interpreted to include all. In addition, the first component is disposed or positioned on the second component “above” or “below (bottom)” that the first component is directly “above” or immediately “on the second component”. It is construed to include not only the case where it is disposed or positioned below, but also when the third component is interposed between the first component and the second component.

As used herein, the term vertical LED or vertical LED chip refers to an LED in which an N-type electrode layer and a P-type electrode layer of an LED element are disposed on an upper portion of an N-type semiconductor layer and a lower portion of a P-type semiconductor layer of the LED element, respectively. It means structure. In addition, the term horizontal LED or horizontal LED chip is interpreted to refer to a structure in which the N-type electrode layer and the P-type electrode layer of the LED element are disposed on the same plane with respect to the substrate of the LED element.

3 is a view schematically showing a horizontal LED chip according to an embodiment of the present application. The horizontal LED chip 300 includes a supporting substrate 310, an insulating layer 320 sequentially disposed on the supporting substrate 310, a P-type ohmic contact layer 330, and a light emitting structure pattern 350. The light emitting structure pattern 350 includes a P-type semiconductor layer pattern 352, an active layer pattern 354, and an N-type semiconductor layer pattern 356. In addition, the horizontal LED chip 300 is disposed on the P-type ohmic contact layer 330 to provide electrons to the P-type electrode layer 360 and the light emitting structure pattern 350 to provide holes to the light emitting structure pattern 350. N-type electrode layer 370 is included. According to an embodiment, the horizontal LED chip 300 may further include a reflective metal layer 340 disposed between the insulating layer 320 and the P-type ohmic contact layer 330. According to another embodiment, the horizontal LED chip 300 may further include an N-type ohmic contact layer pattern 358 disposed between the N-type semiconductor layer pattern 356 and the N-type electrode layer 370.

The support substrate 310 may be a conductive substrate. The support substrate 310 may function as a passage for dissipating heat generated from the light emitting structure pattern 350 of the horizontal LED chip 300 to the outside. For example, the support substrate 310 may be formed of a metal, a conductive semiconductor, or a conductive compound. Specifically, the support substrate 310 may include aluminum nitride (AlN), silicon carbide (SiC), silicon (Si), tungsten (W), or aluminum (Al). ) And the like.

An insulating layer 320 is disposed on the support substrate 310. The insulating layer 320 functions to electrically insulate the P-type ohmic contact layer 330 on the insulating layer 320 and the supporting substrate 310. In addition, in the metal PCB packaging using the metal base, when the plurality of horizontal LED chip 300 is bonded on the metal base, the insulating layer 320 performs a function of electrically insulating the neighboring horizontal LED chip. can do. As an example, the insulating layer 320 may have a thickness of about 1 μm or less, and specifically, may have a thickness of about 3000 μm. As such, the insulating layer 320 may be configured to sufficiently perform thermal conduction toward the support substrate 310 while performing the above-described electrical insulating function.

The P-type ohmic contact layer 330 is in physically ohmic contact with the P-type semiconductor layer pattern 352 of the light emitting structure pattern 350, and is electrically connected to the P-type electrode layer 360. P-type ohmic contact layer 330 covers at least P-type semiconductor layer pattern 352 and functions to maintain P-type semiconductor layer pattern 352 at substantially the same potential. The P-type ohmic contact layer 330 receives holes from the P-type electrode layer 360 to conduct holes to the entire P-type ohmic contact layer 330. Holes conducted through the P-type ohmic contact layer 340 may be substantially uniformly conducted to the P-type semiconductor layer pattern 352, and the holes may be uniformly provided back to the active layer pattern 354. That is, the holes that are substantially uniformly conducted function to keep the P-type semiconductor layer pattern 354 at substantially the same potential. Therefore, in the conventional horizontal LED chip, it is possible to overcome the disadvantage that holes in the P-type semiconductor layer with low electrical conductivity are conducted through a specific path with low electrical resistance.

The light emitting structure pattern 350 including the P-type semiconductor layer pattern 352, the active layer pattern 354, and the N-type semiconductor layer pattern 356 is disposed on the P-type ohmic contact layer 330. As illustrated, the P-type semiconductor layer pattern 352, the active layer pattern 354, and the N-type semiconductor layer pattern 356 are sequentially disposed on the P-type ohmic contact layer 330.

In some embodiments, the reflective metal layer 340 may be disposed between the insulating layer 320 and the P-type ohmic contact layer 330. The reflective metal layer 340 reflects the light traveling toward the support substrate 310 among the light emitted from the light emitting structure 350 to the upper direction again. In some cases, when the P-type ohmic contact layer 330 functions as the reflective metal layer 340, the reflective metal layer 340 may be omitted.

In example embodiments, an N-type ohmic contact layer pattern 358 may be disposed on the N-type semiconductor layer pattern 356 of the light emitting structure pattern 350. The N-type ohmic contact layer pattern 358 makes ohmic contact with the N-type semiconductor layer pattern 356, and receives electrons from the N-type electrode layer 370 to conduct electrons to the entire N-type ohmic contact layer pattern 358. . Electrons conducted throughout the N-type ohmic contact layer 358 may be substantially uniformly conducted to the N-type semiconductor layer pattern 356, and the electrons may be uniformly provided back to the active layer pattern 354. The N-type ohmic contact layer pattern 358 may be formed of a material having light transparency as a conductive material.

As described above, the horizontal LED chip according to an embodiment of the present application includes a P-type ohmic contact layer between the P-type electrode layer and the P-type semiconductor layer pattern. The P-type ohmic contact layer may form an ohmic contact with the P-type semiconductor layer pattern, thereby substantially uniformly transferring holes provided from the P-type electrode layer to the P-type semiconductor layer pattern. Similarly, the horizontal LED chip may include an N-type ohmic contact layer between the N-type electrode layer and the N-type semiconductor layer pattern. As a result, it is possible to prevent a phenomenon in which current is concentrated along a specific path between the P-type semiconductor layer and the N-type semiconductor layer of the conventional horizontal LED chip. Accordingly, the horizontal LED chip according to the exemplary embodiment of the present application may increase the light output of the active layer pattern by uniformly providing the holes and the electrons over the entire area of the active layer pattern.

In addition, the horizontal LED according to an embodiment of the present application has a support substrate having excellent thermal conductivity. In addition, since both electrode layers and the support substrate of the horizontal LED are electrically insulated from each other, direct bonding to the metal base is possible when mounting the PCB. Accordingly, the heat dissipation of the LED chip can be maximized in a chip on PCB base (COB) package structure or a package on PCB base (POB) package structure.

4 is a view schematically showing a horizontal LED chip according to another embodiment of the present application. The horizontal LED chip 400 includes a support substrate 310, an insulating layer 320 sequentially disposed on the support substrate 310, a P-type ohmic contact layer 330, and a light emitting structure pattern 450. The light emitting structure pattern 450 includes a P-type semiconductor layer pattern 452, an active layer pattern 354, and an N-type semiconductor layer pattern 356. In addition, the horizontal LED chip 300 is provided on the P-type semiconductor layer pattern 452 to provide electrons to the P-type electrode layer 460 and the light emitting structure pattern 450 that provides holes to the light emitting structure pattern 450. N-type electrode layer 370 is included. According to an embodiment, the horizontal LED chip 300 may further include a reflective metal layer 340 disposed between the insulating layer 320 and the P-type ohmic contact layer 330. According to another embodiment, the horizontal LED chip 300 may further include an N-type ohmic contact layer pattern 358 disposed between the N-type semiconductor layer pattern 356 and the N-type electrode layer 370.

The horizontal LED chip 400 is substantially the same as the horizontal LED chip 300 of FIG. 3 except that the P-type electrode layer 460 is disposed to contact the P-type semiconductor layer pattern 452. Holes provided from the P-type electrode layer 460 move to the lower P-type ohmic contact layer 330 which is in ohmic contact rather than being conducted in the P-type semiconductor layer pattern 452 having low electrical conductivity, and thus the P-type ohmic contact. It may be substantially conductive within layer 330. The holes that are conducted in the P-type ohmic contact layer 330 may be uniformly conducted back to the P-type semiconductor layer pattern 452. Subsequently, the holes may be uniformly conductive to the active layer pattern 354.

As a result, it is possible to prevent a phenomenon in which current is concentrated along a specific path between the P-type semiconductor layer and the N-type semiconductor layer of the conventional horizontal LED chip. Accordingly, the horizontal LED chip of FIG. 4 according to an embodiment of the present application may increase the light output of the active layer pattern by uniformly providing the holes and the electrons over the entire area of the active layer pattern.

5 is a view schematically showing a horizontal LED chip according to another embodiment of the present application. The horizontal LED chip 500 includes a support substrate 310, an insulating layer 320 sequentially disposed on the support substrate 310, a P-type ohmic contact layer 530, and a light emitting structure pattern 350. The horizontal LED chip 500 is disposed on the reflective metal layer 450 to form a P-type electrode layer 560 for providing holes to the light emitting structure pattern 350 and an N-type electrode layer for providing electrons to the light emitting structure pattern 350 ( 370). According to an embodiment, the horizontal LED chip 300 may further include an N-type ohmic contact layer pattern 358 disposed between the N-type semiconductor layer pattern 356 and the N-type electrode layer 370.

The horizontal LED chip 500 is substantially the same structure as the horizontal LED chip 300 of FIG. 3 except that the P-type electrode layer 460 is disposed to contact the reflective metal layer 540. Holes provided from the P-type electrode layer 560 may be conducted in the reflective metal layer 540, and may be uniformly conducted to the P-type ohmic contact layer 530 and the P-type semiconductor layer pattern 352. Subsequently, the holes may be uniformly conductive to the active layer pattern 354.

As a result, it is possible to prevent a phenomenon in which current is concentrated along a specific path between the P-type semiconductor layer and the N-type semiconductor layer of the conventional horizontal LED chip. Accordingly, the horizontal LED chip of FIG. 5 according to an embodiment of the present application may increase the light output of the active layer pattern by uniformly providing the holes and the electrons over the entire area of the active layer pattern.

6 is a cross-sectional view schematically showing an LED package to which the LED chip according to an embodiment of the present application is applied. In the LED package 600, a horizontal LED chip 610 according to an embodiment of the present application is disposed on the conductive base 620 of the printed circuit board. The base 620 may be made of a conductor such as metal. The horizontal LED chip 610 according to an embodiment of the present application includes a support substrate 612 which is a conductor, and an N-type electrode layer (not shown) of the horizontal LED chip 610 is formed of a metal by the wire 614. The wire 640 is electrically connected, and the P-type electrode layer (not shown) of the horizontal LED chip 610 is electrically connected to the metal wire 650 by the wire 616. Metal wires 640 and 650 are disposed on the insulator layer 630 of the base 620.

Since the horizontal LED chip 610 is substantially the same as the horizontal chips 300, 400, and 500 of FIGS. 3 to 5, it will be described using the horizontal chips 300, 400, and 500. 3 to 5, the light emitting structure patterns 350 and 450 of the horizontal LED chip according to the exemplary embodiment of the present application are electrically insulated from the support substrate 310 by the insulating layer 320. . However, by having a thickness of about 1 μm or less, the heat transfer may be sufficiently performed in the direction of the supporting substrate 310. Accordingly, the horizontal LED chip 610 may be directly attached onto the base 320 as a conductor, thereby increasing heat dissipation efficiency. In the case of the conventional horizontal LED chip, since the material of the substrate corresponding to the support substrate of the present application is an insulator such as sapphire, it is difficult to dissipate heat through the substrate. In addition, even in the case of a conventional vertical LED chip, since the lower electrode layer is directly bonded to the base, which is a conductor, the heat dissipation efficiency is excellent, but electrical conduction problems may occur between adjacent vertical LED chips.

As described above, the horizontal LED chip according to an embodiment of the present application has the advantage of having excellent heat dissipation characteristics on the conductive base of the printed circuit board and electrical insulation between neighboring chips when forming the package. have.

Hereinafter, a method of manufacturing a horizontal LED chip according to embodiments of the present application will be described with reference to the accompanying drawings.

7 to 13 are cross-sectional views illustrating a method of manufacturing a horizontal LED chip according to an embodiment of the present application.

First, referring to FIG. 7, a light emitting structure including an N-type semiconductor layer 720, an active layer 730, and a P-type semiconductor layer 740 is formed on the growth substrate 710. For example, when the growth substrate 710 is a sapphire single crystal substrate, the N-type semiconductor layer 720, the active layer 730, and the P-type semiconductor layer 740 may have gallium nitride (GaN) -based layers having different doping levels. It may be made from a compound semiconductor. In another embodiment, when the growth substrate 710 is a GaP single crystal substrate, the N-type semiconductor layer 720, the active layer 730, and the P-type semiconductor layer 740 may be formed of aluminum gallium indium (AlGaInP) having different doping levels. It may be made from a compound semiconductor. As such, in the embodiments of the present application, the growth substrate 710, the N-type semiconductor layer 720, the active layer 730, and the P-type semiconductor layer 740 may be applied with various known materials constituting the LED device. Various processes such as chemical vapor deposition and evaporation can be applied.

Referring to FIG. 8, a P-type ohmic contact layer 750 is formed on the P-type semiconductor layer 740. In an embodiment, the reflective metal layer 760 may be formed on the P-type ohmic contact layer 750. The reflective metal layer 760 may re-reflect light incident on the reflective metal layer 760 to prevent the light from traveling in a specific direction. In some cases, when the P-type ohmic contact layer 750 performs the function of the reflective metal layer 760, the reflective metal layer 760 may be omitted. The P-type ohmic contact layer 750 is formed of a conductive thin film capable of making electrical ohmic contact with the P-type semiconductor layer 740. The P-type ohmic contact layer 750 and the reflective metal layer 760 may be applied with various known processes such as chemical vapor deposition, evaporation, and physical vapor deposition.

9, an insulating layer 770 and a support substrate 780 are formed on the P-type ohmic contact layer 750. First, an insulating layer 770 is formed by forming a thin film as an insulating material on the ohmic contact layer 750. As a method of forming the insulating layer 770, a known deposition method or a coating method may be applied.

The support substrate 780 is a conductive substrate and may be formed of, for example, a metal or a semiconductor. According to an embodiment, the support substrate 780 may be formed by depositing or coating a conductive or semiconductor material on the insulating layer 770 using known wet and dry semiconductor processes. According to another embodiment, the supporting substrate 780 may be separately prepared and bonded to the insulating layer 770. In this case, solder metal may be applied as a medium to the bonding between the support substrate 780 and the insulating layer 770.

Referring to FIG. 10, the growth substrate 710 is separated from the N-type semiconductor layer 720 on the support substrate 780. In a process of separating the growth substrate 710 from the N-type semiconductor layer 720, for example, a laser lift off (LLO) or chemical lift off (CLO) process may be applied. .

Referring to FIG. 11, an insulating layer 770, a reflective metal layer 760, a P-type ohmic contact layer 750, a P-type semiconductor layer 740, an active layer 730, and an N-type semiconductor are formed on a supporting substrate 780. Layer 720 is placed so as to be sequentially placed. According to an embodiment, an N-type ohmic contact layer 790 may be formed on the N-type semiconductor layer 720. The N-type ohmic contact layer 790 may be formed of a material having both conductivity and light transmittance that may make electrical ohmic contact with the N-type semiconductor layer 720. The N-type ohmic contact layer 790 may be applied to various known processes such as chemical vapor deposition, evaporation, and physical vapor deposition.

Referring to FIG. 12, at least two or more layers of the light emitting structure including the N-type semiconductor layer 720, the active layer 730, and the P-type semiconductor layer 740 are etched on the support substrate 780 to form a P-type semiconductor layer. A light emitting structure pattern including at least two or more of the pattern 745, the active layer pattern 745, and the N-type semiconductor layer pattern 725 is formed.

As shown in FIG. 12, the N-type ohmic contact layer 790, the N-type semiconductor layer 720, the active layer 730, and the P-type semiconductor layer 740 are sequentially etched to form an N-type ohmic contact layer pattern ( 795, an N-type semiconductor layer pattern 725, an active layer pattern 735, and a P-type semiconductor layer pattern 745 may be formed. In this case, the P-type ohmic contact layer 750 is formed to cover the P-type semiconductor layer 740 or the P-type semiconductor layer pattern 745.

According to another exemplary embodiment, the light emitting structure pattern forming process may partially expose the reflective metal layer 760 by additionally etching the P-type ohmic contact layer 750.

According to another exemplary embodiment, the light emitting structure pattern forming process may sequentially etch the N-type ohmic contact layer 790, the N-type semiconductor layer 720, and the active layer 730 to form an N-type ohmic contact layer. The pattern 795, the N-type semiconductor layer pattern 725, and the active layer pattern 735 may be formed, and the P-type semiconductor layer 740 may be partially exposed.

The light emitting structure pattern forming process may be performed by applying a known lithography process and an etching process.

Referring to FIG. 13, a P-type electrode layer 797 is electrically connected to the P-type ohmic contact layer 750. According to an embodiment, the P-type electrode layer 797 may be formed to be in physical contact with the P-type ohmic contact layer 750. According to another embodiment, the P-type electrode layer 797 may be formed to be in physical contact with the reflective metal layer 760. According to another embodiment, the P-type electrode layer 797 may be formed to be in physical contact with the P-type semiconductor layer 740.

An N-type electrode layer 799 is formed on the light emitting structure pattern. As illustrated, an N-type electrode layer 799 may be formed on the N-type ohmic contact layer pattern 795.

The P-type electrode layer 797 and the N-type electrode layer 799 are formed by depositing a film of a conductive material and patterning the deposited film by applying a lithography process and an etching process. The deposition process, the lithography process and the etching process may be applied to a variety of known processes.

Through the processes illustrated in FIGS. 7 to 13, a horizontal LED chip substantially the same as the horizontal LED chip 300 of FIG. 3 may be manufactured. As described above with reference to FIG. According to the light emitting structure pattern formation method, a horizontal LED chip substantially the same as the horizontal LED chips 400 and 500 illustrated in FIG. 4 or 5 may be manufactured.

As described above, the horizontal LED chip manufactured according to the manufacturing method according to the embodiment of the present application includes a P-type ohmic contact layer between the P-type electrode layer and the P-type semiconductor layer pattern. The P-type ohmic contact layer may form an ohmic contact with the P-type semiconductor layer pattern, thereby substantially uniformly transferring holes provided from the P-type electrode layer to the P-type semiconductor layer pattern. Similarly, the horizontal LED chip may include an N-type ohmic contact layer between the N-type electrode layer and the N-type semiconductor layer pattern. As a result, it is possible to prevent a phenomenon in which current is concentrated along a specific path between the P-type semiconductor layer and the N-type semiconductor layer of the conventional horizontal LED chip. Accordingly, the horizontal LED chip according to the exemplary embodiment of the present application may increase the light output of the active layer pattern by uniformly providing the holes and the electrons over the entire area of the active layer pattern.

In addition, the horizontal LED manufactured by the manufacturing method according to an embodiment of the present application has a support substrate having excellent thermal conductivity. In addition, since both electrode layers and the support substrate of the horizontal LED are electrically insulated from each other, direct bonding to the metal base is possible when mounting the PCB. Accordingly, the heat dissipation of the LED chip can be maximized in a chip on PCB base (COB) package structure or a package on PCB base (POB) package structure.

100: conventional horizontal LED chip, 110: sapphire substrate, 120: N-type gallium nitride layer, 130: gallium nitride-based active layer, 140: P-type gallium nitride layer, 150: N-type electrode layer, 160: P-type electrode layer, 170 Current flow,
200: conventional vertical LED chip, 210: support substrate, 220: solder metal layer, 230: P-type gallium nitride layer, 240: gallium nitride-based active layer, 250: N-type gallium nitride layer, 260: N-type electrode layer, 270: P type electrode layer,
300: horizontal LED chip, 310: support substrate, 320: insulating layer, 330: P-type ohmic contact layer, 340: reflective metal layer, 350: light emitting structure pattern, 352: P-type semiconductor layer pattern, 354: active layer pattern, 356 : N type semiconductor layer pattern, 358: N type ohmic contact layer pattern, 360: P type electrode layer, 370: N type electrode layer,
400: horizontal LED chip, 452: P-type semiconductor layer pattern, 450: light emitting structure pattern, 460: P-type electrode layer,
500: horizontal LED chip, 530: P-type ohmic contact layer, 540: reflective metal layer, 560: P-type electrode layer,
600: LED package, 610: horizontal LED chip, 612: support substrate, 614: wire, 616: wire, 620: base, 630: insulator layer, 640: metal wiring, 650: metal wiring,
710: growth substrate, 720: N-type semiconductor layer, 725: N-type semiconductor layer pattern, 730: active layer, 735: active layer pattern, 740: P-type semiconductor layer, 745: P-type semiconductor layer pattern, 750: P-type ohmic contact Layer, 760: reflective metal layer, 770: insulating layer, 780: support substrate, 790: N-type ohmic contact layer, 795: N-type ohmic contact layer pattern, 797: P-type electrode layer, 799: N-type electrode layer.

Claims (16)

In the horizontal LED chip,
Support substrates;
An insulating layer disposed on the support substrate;
A P-type ohmic contact layer disposed on the insulating layer;
A light emitting structure pattern including a P-type semiconductor layer pattern, an active layer pattern, and an N-type semiconductor layer pattern sequentially disposed on the P-type ohmic contact layer;
A P-type electrode layer electrically connected to the P-type ohmic contact layer; And
Including an N-type electrode layer electrically connected to the N-type semiconductor layer pattern,
And said P-type ohmic contact layer covers at least said P-type semiconductor layer pattern, and wherein said P-type semiconductor layer pattern functions to maintain substantially the same potential.
The method according to claim 1,
And a reflective metal layer disposed between the insulating layer and the P-type ohmic contact layer.
The method according to claim 1 or 2,
And the P-type electrode layer pattern is in physical contact with any one selected from the group consisting of the P-type semiconductor layer pattern, the P-type ohmic contact layer, and the reflective metal layer.
The method according to claim 1,
The P-type ohmic contact layer includes at least one selected from the group consisting of silver, nickel, aluminum, gold, and cobalt.
The method according to claim 1,
The support substrate is a horizontal type LED chip is a conductive substrate.
The method of claim 5,
The conductive substrate is a horizontal type LED chip comprising any one selected from the group consisting of aluminum nitride, silicon carbide, silicon, tungsten and aluminum.
The method according to claim 1,
And an N-type ohmic contact layer making ohmic contact with the N-type semiconductor layer pattern on the N-type semiconductor layer pattern.
In the manufacturing method of the horizontal type LED chip,
(a) forming a light emitting structure including an N-type semiconductor layer, an active layer, and a P-type semiconductor layer on the growth substrate;
(b) forming a P-type ohmic contact layer on the P-type semiconductor layer;
(c) forming an insulating layer and a support substrate on the P-type ohmic contact layer;
(d) separating the growth substrate from the N-type semiconductor layer;
(e) forming at least two layers of the light emitting structure on the support substrate to form a light emitting structure pattern including at least two of a P-type semiconductor layer pattern, an active layer pattern, and an N-type semiconductor layer pattern;
(f) forming a P-type electrode layer electrically connected to the P-type ohmic contact layer; And
(g) forming a N-type electrode layer on the light emitting structure pattern, wherein the P-type ohmic contact layer is formed to cover the P-type semiconductor layer or the P-type semiconductor layer pattern. Way.
The method of claim 8,
(E) the step of manufacturing a horizontal LED chip to partially expose the P-type ohmic contact layer.
The method of claim 8,
(b) after the process,
(b2) forming a reflective metal layer on the P-type ohmic contact layer,
(e) after the process,
and (e2) further etching the P-type ohmic contact layer to expose the reflective metal layer.
The method of claim 8,
In the step (e), the N-type semiconductor layer and the active layer are etched to form the N-type semiconductor layer pattern and the active layer pattern, and partially expose the P-type semiconductor layer.
The method according to any one of claims 9 to 11,
(f) forming a P-type electrode layer pattern electrically connected to the P-type ohmic contact layer;
And forming the P-type electrode layer pattern in physical contact with any one selected from the group consisting of the P-type semiconductor layer, the P-type ohmic contact layer, or the reflective metal layer.
The method of claim 8,
And the P-type ohmic contact layer comprises at least one selected from the group consisting of silver, nickel, aluminum, gold, and cobalt.
The method of claim 8,
The support substrate is a method of manufacturing a horizontal LED chip is a conductive substrate.
The method of claim 8,
The conductive substrate is a method of manufacturing a horizontal LED chip comprising any one selected from the group consisting of aluminum nitride, silicon carbide, silicon, tungsten and aluminum.
The method of claim 8,
(g) process,
Forming the N-type semiconductor layer pattern and forming an N-type ohmic contact layer on the N-type semiconductor layer pattern.
KR1020100103987A 2010-10-25 2010-10-25 Horizontal light emitting diode chip and method of manufacturing the same KR20120042331A (en)

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