KR20120022568A - Method for forming microcrystalline semiconductor film and method for manufacturing semiconductor device - Google Patents

Abstract

PURPOSE: A method for forming a microcrystalline semiconductor film is provided to offer a microcrystalline semiconductor film having an improved crystalline by reducing a gap of mixed particles. CONSTITUTION: An insulating layer(55) is formed on a substrate(51). A seed crystal(57) is formed on the insulating layer. A gap(57b) is formed between mixed particles(57a) which are contiguous to the seed crystal. A microcrystal semiconductor film(59) is formed on the seed crystal. The seed crystal and the microcrystal semiconductor film are made of the microcrystal semiconductor.

Description

Method for manufacturing microcrystalline semiconductor film and method for manufacturing semiconductor device {METHOD FOR FORMING MICROCRYSTALLINE SEMICONDUCTOR FILM AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE}

This invention relates to the manufacturing method of a microcrystalline semiconductor film, the manufacturing method of the semiconductor device using the said microcrystalline semiconductor film, and a display apparatus.

In addition, in this specification, a semiconductor device refers to the general apparatus which can function by using a semiconductor characteristic, and a display apparatus, an electro-optical device, a photoelectric conversion device, a semiconductor circuit, and an electronic device are all semiconductor devices.

As a type of field effect transistor, a thin film transistor is known in which a channel region is formed using a semiconductor film formed on a substrate having an insulating surface. A technique using amorphous silicon, microcrystalline silicon, and polycrystalline silicon in a semiconductor film used in a channel region of a thin film transistor is disclosed (Patent Documents 1 to 5). A typical application example of a thin film transistor is a liquid crystal television device, and has been put into practical use as a switching transistor of each pixel constituting a display screen.

Further, development of a photoelectric conversion device using microcrystalline silicon as a crystalline silicon that can be produced by the plasma CVD method in a semiconductor film for performing photoelectric conversion has been advanced (Patent Document 6).

Japanese Unexamined Patent Publication No. 2001-053283 Japanese Patent Laid-Open No. 5-129608 Japanese Laid-Open Patent Publication 2005-049832 Japanese Patent Application Laid-Open No. 7-131030 Japanese Laid-Open Patent Publication 2005-191546 Japanese Laid-Open Patent Publication 2000-277439

A thin film transistor in which a channel region is formed using an amorphous silicon film has a problem of low field effect mobility and on current. On the other hand, a thin film transistor in which a channel region is formed using a microcrystalline silicon film has an improved field effect mobility but a high off current, and thus sufficient switching characteristics are not obtained, compared with a thin film transistor in which a channel region is formed of an amorphous silicon film. there is a problem.

The thin film transistor, in which the polycrystalline silicon film is a channel region, has much higher field effect mobility than the two types of thin film transistors, and has a characteristic of obtaining a high on-current. This thin film transistor can be used as a switching transistor formed in a pixel due to its characteristics, and can also constitute a driver circuit requiring high-speed operation.

However, the manufacturing process of the thin film transistor in which the channel region is formed using the polycrystalline silicon film is more expensive than the case of manufacturing the thin film transistor in which the channel region is formed using the amorphous silicon film. It is a problem. For example, the laser annealing technique required for the production of a polycrystalline silicon film has a problem such that the irradiation area of the laser beam is small and the liquid crystal panel of the large screen cannot be produced efficiently.

By the way, the glass substrate used for manufacture of a display panel is 3rd generation (550 mm x 650 mm), 3.5th generation (600 mm x 720 mm, or 620 mm x 750 mm), 4th generation (680 mm x 880 mm, or 730 mm x 920 mm), 5th generation (1100mm × 1300mm), 6th generation (1500mm × 1850mm), 7th generation (1870mm × 2200mm), 8th generation (2200mm × 2400mm), 9th generation (2400mm × 2800mm), 10th generation (2950mm × 3400mm) is getting bigger. The enlargement of glass substrates is based on the minimum production cost design idea.

On the other hand, in the large-area mother glass substrate as in the tenth generation (2950 mm x 3400 mm), the technology for producing a high-performance thin film transistor with high productivity is still not established, which is an industry problem. have.

Then, one aspect of this invention makes it a subject to provide the method of manufacturing the semiconductor device which is excellent in electrical characteristics, with high productivity.

According to one embodiment of the present invention, after forming seed crystals having high crystallinity interphase grains at a low particle density under the first conditions, the interphase grains of seed crystals are grown under the second condition to form a gap of the interphase grains. In order to fill the gap, a microcrystalline semiconductor film is laminated on the seed crystal.

The first condition for providing a high crystalline mixed phase grain at a low particle density is that the flow rate of hydrogen is 50 times or more and 1000 times or less with respect to the flow rate of the deposition gas containing silicon or germanium, further diluting the deposition gas. It is a condition which makes the pressure in a process chamber more than 1333 Pa and 13332 Pa or less. The second condition in which the mixed phase is grown to fill the gap between the mixed phases is to dilute the deposited gas with a flow rate of hydrogen of 100 to 2000 times or less relative to the flow rate of the deposition gas containing silicon or germanium, and further, the process chamber. It is a condition which makes internal pressure 1333 Pa or more and 13332 Pa or less.

In one embodiment of the present invention, a seed crystal having a mixed phase including an amorphous silicon region and crystallites that are microcrystals that can be regarded as a single crystal under the first conditions is formed by plasma CVD, and the second crystal is placed on the second crystal. A manufacturing method for forming a microcrystalline semiconductor film under the conditions by plasma CVD method, wherein the first condition uses a deposition gas containing silicon or germanium and a gas containing hydrogen as a source gas supplied into a processing chamber. Dilution gas is diluted with the flow rate of hydrogen 50 times or more and 1000 times or less with respect to flow volume, and the pressure in a process chamber is larger than 1333 Pa and is 13332 Pa or less. The second condition is a condition in which the flow rate of hydrogen is 100 times or more and 2000 times or less to dilute the deposition gas with respect to the flow rate of the deposition gas containing silicon or germanium, and the pressure in the processing chamber is 1333 Pa or more and 13332 Pa or less. It is characterized by that.

In addition, the seed crystal includes a state in which the mixed phase grains are dispersed or a state in which the mixed phase grains are continuous (that is, the film phase). In addition, the power of the plasma is preferably appropriately selected in accordance with the ratio of the flow rate of hydrogen to the flow rate of the deposition gas containing silicon or germanium.

In one embodiment of the present invention, after the microcrystalline semiconductor film is formed under the second condition, the second microcrystalline semiconductor film is formed under the third condition on the microcrystalline semiconductor film by plasma CVD. As the source gas supplied into the processing chamber, a deposition gas containing silicon or germanium and a gas containing hydrogen are used, and the deposition gas is diluted by setting the ratio of the hydrogen flow rate to the flow rate of the deposition gas higher than the second condition. In addition, the pressure in the processing chamber may be 1333 Pa or more and 13332 Pa or less.

Furthermore, in one embodiment of the present invention, it is also possible to add a rare gas to the source gas used for at least one of the first, second and third conditions.

According to one embodiment of the present invention, a seed crystal having a high crystalline mixed phase grain having a low particle density is formed on an insulating film by a plasma CVD method, and the mixed phase grain of the seed crystal is grown under a second condition under mixed conditions. The microcrystalline semiconductor film is formed by the plasma CVD method by filling the gap between the ribs.

Moreover, one aspect of this invention is a manufacturing method of the semiconductor device which has a thin film transistor which forms a channel region using the said laminated seed crystal and a microcrystalline semiconductor film.

Moreover, 1 aspect of this invention is the manufacturing method of the photoelectric conversion apparatus which used the laminated seed crystal and the microcrystalline semiconductor film as one or more of the semiconductor film which shows p-type, the semiconductor film which shows n-type, and the semiconductor film which performs photoelectric conversion. to be.

By applying one embodiment of the present invention, a microcrystalline semiconductor film having high crystallinity can be produced. In addition, a semiconductor device excellent in electrical characteristics can be manufactured with high productivity.

BRIEF DESCRIPTION OF THE DRAWINGS Sectional drawing explaining the manufacturing method of the microcrystalline semiconductor film which concerns on one Embodiment of this invention.
2 is a cross-sectional view illustrating a method for manufacturing a microcrystalline semiconductor film according to one embodiment of the present invention.
3 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention.
4 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention.
5 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention.
6 is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention.
7 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention.
8 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention.
9 is a cross-sectional view illustrating one embodiment of a method of manufacturing a photoelectric conversion device.
10 is a perspective view illustrating an example of an electronic book.
11 is a perspective view illustrating an example of a television device and a digital photoframe.
12 is a perspective view illustrating an example of a portable computer.
13 is a diagram illustrating current voltage characteristics of a thin film transistor;
14 is a SEM photograph of a microcrystalline silicon film.

EMBODIMENT OF THE INVENTION Embodiment of this invention is described below with reference to drawings. However, this invention is not limited to the following description. It is because those skilled in the art can easily change the form and details without departing from the spirit and scope of the present invention. Therefore, this invention is not limited only to the description content of embodiment and Example shown below. In addition, in describing the structure of this invention using drawing, the code | symbol which shows the same thing is common also between different drawings.

(Embodiment 1)

In this embodiment, the manufacturing method of the microcrystalline semiconductor film which improved crystallinity by reducing the clearance gap of a mixed phase is demonstrated using FIG. 1 and FIG.

As shown in FIG. 1A, an insulating film 55 is formed on the substrate 51, and a seed crystal 57 is formed on the insulating film 55.

As the board | substrate 51, the plastic board etc. which have heat resistance of the grade which can endure the processing temperature of this manufacturing process other than a glass substrate and a ceramic substrate can be used. In addition, when translucency is not required for a board | substrate, you may use the thing in which the insulating film was formed in the surface of metal substrates, such as stainless steel. As a glass substrate, you may use alkali-free glass substrates, such as barium borosilicate glass, aluminoborosilicate glass, or aluminosilicate glass, for example. In addition, the size of the substrate 51 is not limited, and for example, glass substrates of third to tenth generations that are frequently used in the flat panel display field may be used.

The insulating film 55 is a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon nitride oxide film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, or an aluminum nitride oxide using a CVD method or a sputtering method or the like. The films may be formed in a single layer or by lamination.

In this case, the silicon oxynitride has a higher oxygen content than nitrogen as its composition, and preferably, Rutherford Backscattering Spectrometry (RBS) and Hydrogen Forward Scattering (HFS) When measured using spectrometry), the composition ranges from 50 to 70 atomic% oxygen, 0.5 to 15 atomic% nitrogen, 25 to 35 atomic% silicon, and 0.1 to 10 atomic% hydrogen. Say. In addition, silicon nitride oxide is a composition whose content of nitrogen is larger than oxygen, Preferably, when measured using RBS and HFS, oxygen is 5-30 atomic% and nitrogen is 20-20 as a composition range. It means that it is contained in the range of 55 atomic%, 25 to 35 atomic% of silicon, and 10 to 30 atomic% of hydrogen. However, when the sum total of the atoms which comprise silicon oxynitride or silicon oxynitride is 100 atomic%, the content rate of nitrogen, oxygen, silicon, and hydrogen shall be included in the said range.

As the seed crystal 57, a microcrystalline semiconductor film, typically, a microcrystalline silicon film, a microcrystalline silicon germanium film, a microcrystalline germanium film, or the like is formed. The seed crystals 57 include a state in which a plurality of interphase grains are dispersed, a state of a film in which interphase grains are continuous, or a state in a film in which interphase and amorphous semiconductors are continuous. For this reason, the seed crystal 57 also includes those in which the mixed phase grains 57a are not adjacent to each other, and have a gap 57b between the mixed phase grains 57a. Moreover, it is characterized by having high crystalline interphase grains at low particle density (abundance ratio of interphase grains in surface). In addition, the interphase has an amorphous silicon region and crystallites which are microcrystals that can be regarded as single crystals. In addition, a mixed phase may have a twin crystal.

In the reaction chamber of the plasma CVD apparatus, the seed crystal 57 mixes hydrogen and a deposition gas containing silicon or germanium, using a first condition of forming a high crystalline mixed phase grain at a low particle density, It forms by glow discharge plasma. Alternatively, a deposition gas containing silicon or germanium, hydrogen, and rare gases such as helium, argon, neon, krypton, and xenon are mixed and formed by a glow discharge plasma. Here, the deposition gas is diluted with a flow rate of hydrogen of 50 to 1000 times or less relative to the flow rate of the deposition gas containing silicon or germanium, and the pressure in the processing chamber is greater than 1333 Pa and 13332 Pa or less (greater than 10 Torr and greater than 100 Torr). Microcrystalline silicon, microcrystalline silicon germanium, microcrystalline germanium, and the like are formed under the first conditions described below. The deposition temperature at this time is preferably room temperature to 300 ° C, more preferably 150 to 280 ° C. In addition, what is necessary is just to make the space | interval of an upper electrode and a lower electrode into the interval which a plasma can generate | occur | produce. By forming using the first condition, crystal growth is promoted and the crystallinity of the interphase grains 57a contained in the seed crystals 57 is increased. That is, the size of the crystallites included in the mixed phase grains 57a included in the seed crystals 57 is increased. In addition, a gap 57b is formed between neighboring mixed grains 57a, and the particle density of the mixed grains 57a is reduced.

Representative examples of the deposition gas containing silicon or germanium include SiH ₄ , Si ₂ H ₆ , GeH ₄ , Ge ₂ H _6, and the like.

The deposition rate of the seed crystals 57 is increased by adding rare gases such as helium, neon, argon, krypton, and xenon to the source gas of the seed crystals 57. As a result, since the deposition rate is increased, the amount of impurities mixed into the seed crystals 57 is reduced, so that the crystallinity of the seed crystals 57 can be improved. In addition, by using a rare gas such as helium, argon, neon, krypton, or xenon as the source gas of the seed crystal 57, it is possible to generate a stable plasma without supplying high power. Plasma damage can be reduced and the crystallinity of the mixed phase grains 57a can be improved.

The generation of the glow discharge plasma when the seed crystals 57 are formed is typically a high frequency power of HF band of 3 MHz to 30 MHz, typically 13.56 MHz and 27.12 MHz, or a high frequency power of VHF band of 30 MHz and up to about 300 MHz, typically Is achieved by applying 60 MHz. Further, this is achieved by applying high frequency power of microwaves of 1 GHz or more. Moreover, it can be set as pulse oscillation to which high frequency electric power is applied in pulse form, and continuous oscillation applied continuously. In addition, by superimposing the high frequency power of the HF band and the high frequency power of the VHF band, plasma unevenness can be reduced and uniformity can be increased even in a large area substrate, and the deposition speed can be increased.

By increasing the flow rate of hydrogen with respect to the flow rate of the deposition gas containing silicon or germanium as in the first condition, the amorphous semiconductor included in the seed crystal 57 is etched at the same time as the deposition of the seed crystal 57. The crystal grains 57a having high crystallinity are formed, and the gap 57b is formed between the adjacent grains 57a. The optimum conditions vary depending on the device configuration and the chemical state of the coating surface, but if the mixed phase 57a hardly deposits, the ratio of the hydrogen flow rate to the flow rate of the deposition gas containing silicon or germanium is small, or RF The power can be reduced. On the other hand, when the particle density of the interphase grain 57a is high, or when the amorphous semiconductor region is larger than the crystalline semiconductor region, the ratio of the hydrogen flow rate to the flow rate of the deposition gas containing silicon or germanium is large, or This can be done by increasing the RF power. The deposited shape of the seed crystals 57 can be evaluated by scanning electron microscopy (SEM) and Raman spectroscopy. By the said flow ratio and pressure, the seed crystal 57 which has favorable crystallinity and maintains the preferable clearance of interphase grains can be formed. As a result, the mixed phase grains 57a are formed while etching the amorphous semiconductor region included in the seed crystals 57, so that crystal growth is promoted and the crystallinity of the mixed phase grains 57a is increased. That is, the size of the crystallites contained in the mixed grains 57a is increased. In addition, since the amorphous semiconductor region between adjacent mixed grains 57a is etched, the mixed grains 57a have a gap 57b from each other, and therefore the mixed grains 57a are formed at a low particle density. Moreover, when the seed crystal 57 is formed on the 1st conditions in this embodiment, a nonuniformity may arise in the particle diameter of a mixed phase grain.

Further, before forming the seed crystal 57, the seed crystal 57 is removed by introducing a deposition gas containing silicon or germanium into the processing chamber and removing impurity elements in the processing chamber while exhausting the gas in the processing chamber of the CVD apparatus. It is possible to reduce the amount of impurities in the resin. In addition, before the seed crystals 57 are formed, a plasma is generated in an atmosphere containing fluorine such as fluorine, nitrogen fluoride, or fluoride fluoride to expose the fluorine plasma to the insulating film 55, thereby forming the dense seed crystals 57. can do.

Next, as shown in FIG. 1B, a microcrystalline semiconductor film 59 is formed on the seed crystal 57. The microcrystalline semiconductor film 59 is formed under conditions that fill the gap between the mixed phase grains included in the seed crystals 57 by growing the mixed phase grains. In addition, the thickness of the microcrystalline semiconductor film 59 is preferably 30 nm or more and 100 nm or less.

In the reaction chamber of the plasma CVD apparatus, the microcrystalline semiconductor film 59 is formed of a glow discharge plasma by mixing a deposition gas containing silicon or germanium with hydrogen under a second condition. Or rare gas, such as helium, neon, argon, krypton, xenon, is mixed with the source gas of 2nd conditions, and it forms by glow discharge plasma.

By the second condition, microcrystalline silicon, microcrystalline silicon germanium, microcrystalline germanium and the like are formed. As a result, in the microcrystalline semiconductor film 59, the ratio of the crystalline region to the amorphous semiconductor increases, and the crystalline regions are in close contact with each other, thereby increasing the crystallinity. The deposition temperature at this time is preferably room temperature to 300 ° C, more preferably 150 to 280 ° C. In addition, what is necessary is just to make the space | interval of an upper electrode and a lower electrode into the interval which a plasma can generate | occur | produce.

When forming the microcrystalline semiconductor film 59, the generation of the glow discharge plasma can suitably use the conditions of the seed crystal 57. In addition, although the throughput can be improved by generating the glow discharge plasma of the seed crystal 57 and the microcrystalline semiconductor film 59 under the same conditions, the throughput may be different.

The microcrystalline semiconductor film 59 is formed under a second condition in which the mixed grains of the seed crystals 57 are grown to fill the gap between the mixed grains. Typically, the deposition gas is diluted with a flow rate of hydrogen of 100 to 2,000 times with respect to the flow rate of the deposition gas containing silicon or germanium, and the pressure in the processing chamber is 1333 Pa or more and 13332 Pa or less (10 Torr or more and 100 Torr or less). ) Under the above conditions, since the pressure in the processing chamber is high, the mean free path of the deposition gas is short, the energy of plasma ions is lowered, and the coverage of the microcrystalline semiconductor film 59 is improved, and the microcrystalline semiconductor film ( Ion damage to 59) is reduced, contributing to defect reduction. In addition, since the dilution ratio of the deposition gas containing silicon or germanium is high, and the amount of hydrogen radicals is increased, crystal growth is carried out by crystallizing the crystal grains contained in the mixed phase 57a while etching the amorphous semiconductor region. As a result, the ratio of the crystalline region to the amorphous semiconductor region of the microcrystalline semiconductor film 59 increases, resulting in high crystallinity. It also contributes to defect reduction of the microcrystalline semiconductor film 59.

In addition, since the interphase grains of the microcrystalline semiconductor film are newly generated in the interstitial grains of the seed crystals, the size of the interphase grains decreases, so that the incidence of the interphase grains of the microcrystalline semiconductor film is small with respect to the frequency of occurrence of the interphase grains of the seed crystals. It is more preferable. As a result, the mixed crystal of seed crystals can be used as seed crystals, and crystal growth from the seed crystals can be given priority.

At this time, the microcrystalline semiconductor film 59 grows crystals by using the crystallites included in the interphase grain 57a of the seed crystals 57 as seed crystals. The size of the mixed grains of the microcrystalline semiconductor film 59 depends on the spacing of the mixed grains 57a of the seed crystals 57. For this reason, when the grain density of the interphase grain 57a of the seed crystal 57 is low, the space | interval of the interphase grain 57a becomes large, and the crystal growth distance of the interphase grain of the microcrystalline semiconductor film 59 becomes long, and the interphase grain Large particle size is possible.

By the above process, a microcrystalline semiconductor film with high crystallinity can be formed.

In addition, the pressure of the second condition may be higher than the pressure of the first condition. Alternatively, the pressure of the first condition may be higher than the second condition. Alternatively, the pressures of the first condition and the second condition may be the same. If the pressure of a 1st condition is below the pressure of a 2nd condition, since the uniformity of distribution of the seed crystal 57 in a board | substrate surface becomes high, it is preferable. In addition, in the flow rate ratio of hydrogen to the deposition gas containing silicon or germanium, when the first condition is lower than the second condition, the seed crystals 57 tend to be deposited so that large grain size of the mixed phase grains is possible. Do.

Further, under the second condition, the flow rate ratio of the deposition gas containing silicon or germanium and hydrogen may be periodically increased or decreased. By periodically increasing or decreasing the flow rate ratio of the deposition gas containing silicon or germanium and hydrogen, the flow rate of the deposition gas or hydrogen containing silicon or germanium is periodically increased or decreased.

In a period where the flow rate of the deposition gas containing silicon or germanium is small, when the pressure in the processing chamber is 1333 Pa or more and 13332 Pa or less (10 Torr or more and 100 Torr or less), since the pressure in the processing room is high, the hydrogen radicals decomposed in the plasma are subjected to the first condition. The amorphous semiconductor contained in the seed crystals 57 formed by etching is selectively etched. In addition, since some radicals (typically silyl radicals) generated from the deposition gas containing silicon or germanium bind to the dangling bonds of the microcrystalline semiconductors on the deposition surface, some high crystallinity crystal growth occurs. That is, since crystal growth occurs with etching, the crystallinity of the microcrystalline semiconductor film is increased.

That is, when the flow rate ratio of hydrogen to the deposition gas containing silicon or germanium is high, etching of the amorphous semiconductor occurs preferentially and crystal growth with high crystallinity occurs, resulting in high crystallinity of the microcrystalline semiconductor film.

Also, in a period where the flow rate of the deposition gas containing silicon or germanium is high, compared with the period where the flow rate of the deposition gas containing silicon or germanium is low, radicals generated from the deposition gas containing silicon or germanium are reduced. Since there are many, crystal growth occurs. Although the microcrystalline semiconductor film is formed of a plurality of interphase grains, the crystallinity of the microcrystalline semiconductor film can be improved because the crystallite size of the interphase grains can be increased by the method of forming the microcrystalline semiconductor film shown in this embodiment.

In other words, when the flow rate ratio of hydrogen to the deposition gas containing silicon or germanium is low, typically, the flow rate of hydrogen relative to the flow rate of the deposition gas containing silicon or germanium is 100 times or more and 2000 times or less, thereby undetermined. Crystal growth of semiconductors occurs first.

By the above process, the crystallinity of a microcrystalline semiconductor film can be improved more.

In addition, the thickness of the seed crystals 57 is preferably 1 nm or more and 10 nm or less. When the thickness of the seed crystal 57 is thicker than 10 nm, even when the microcrystalline semiconductor film 59 is deposited, it becomes difficult to fill the gap of the mixed grains, and it is difficult to etch the amorphous semiconductor contained in the seed crystal 57. The crystallinity of the seed crystals 57 and the microcrystalline semiconductor film 59 is reduced. On the other hand, since the seed crystals 57 need to form mixed phase grains, the thickness of the seed crystals 57 is preferably 1 nm or more.

In addition, the thickness of the microcrystalline semiconductor film 59 is preferably 30 nm or more and 100 nm or less. By setting the thickness of the microcrystalline semiconductor film 59 to 30 nm or more, the nonuniformity of the electrical characteristics of the thin film transistor can be reduced. In addition, by setting the thickness of the microcrystalline semiconductor film 59 to 100 nm or less, throughput can be improved and film peeling due to stress can be suppressed.

The seed crystal 57 and the microcrystalline semiconductor film 59 are formed of microcrystalline semiconductor. The microcrystalline semiconductor is a semiconductor having an intermediate structure of amorphous and crystalline structure (including single crystal and polycrystal). The microcrystalline semiconductor is a semiconductor having a third state that is free energy stable and is a crystalline semiconductor having short-range order and lattice distortion, and has a particle diameter of 2 nm or more and 200 nm or less, preferably 10 nm or more and 80 nm or less, more preferably 20 nm. Columnar or needle-like interphase grains of 50 nm or more are growing in the normal direction with respect to the substrate surface. For this reason, a grain boundary may be formed in the interface of columnar or needle-like mixed grains. In addition, the crystal grain diameter here means the largest diameter of the crystal grain in the surface parallel to a substrate surface.

The microcrystalline silicon, which is a representative example of the microcrystalline semiconductor, is shifted to the lower wave side than the 520 cm ^-1 where the Raman spectrum represents single crystal silicon. In other words, the peak of the Raman spectrum of the microcrystalline silicon between 480cm ^-1 to 520cm ^-1 showing an amorphous silicon indicates a single crystalline silicon. In addition, in order to terminate unbound water (dangling bond), hydrogen or halogen is contained at least 1 atomic% or more. In addition, by incorporating rare gas elements such as helium, neon, argon, krypton or xenon to further enhance lattice distortion, stability is improved and a good microcrystalline semiconductor is obtained. Techniques relating to such microcrystalline semiconductors are disclosed, for example, in US Pat. No. 4,409,134.

According to this embodiment, the microcrystal semiconductor film which improved crystallinity can be produced by reducing the clearance gap of a mixed phase.

(Embodiment 2)

In this embodiment, the manufacturing method of the microcrystalline semiconductor film with higher crystallinity than Embodiment 1 is demonstrated using FIG. 1 and FIG.

As in the first embodiment, the seed crystal 57 and the microcrystalline semiconductor film 59 are formed through the process of FIG. 1.

Next, as shown in FIG. 2, a second microcrystalline semiconductor film 61 is formed on the microcrystalline semiconductor film 59.

In the reaction chamber of the plasma CVD apparatus, the second microcrystalline semiconductor film 61 is formed by a glow discharge plasma by mixing a deposition gas containing silicon or germanium with hydrogen under a third condition. Alternatively, under a third condition, a deposition gas containing silicon or germanium, hydrogen, and rare gases such as helium, neon, argon, krypton, or xenon are mixed and formed by a glow discharge plasma. The ratio of the hydrogen flow rate to the flow rate of the deposition gas containing silicon or germanium is higher than the second condition to dilute the deposition gas, and the pressure in the processing chamber is 1333 Pa or more and 13332 Pa or less (10 Torr or more and 100 Torr or the same as the second condition). The microcrystalline silicon, microcrystalline silicon germanium, microcrystalline germanium, and the like are formed as the second microcrystalline semiconductor film 61 under the third condition of the following). The deposition temperature at this time is preferably room temperature to 300 ° C, more preferably 150 to 280 ° C.

In addition, the third condition may be increased or decreased periodically, and the pressure in the processing chamber may be 1333 Pa or more and 13332 Pa or less (10 Torr or more and 100 Torr or less) as in the second condition, by periodically increasing or decreasing the flow rate ratio of the deposition gas containing silicon or germanium and hydrogen. At this time, the crystallinity of the second microcrystalline semiconductor film 61 can be further improved by making the flow rate ratio when the flow rate ratio of hydrogen to the deposition gas containing silicon or germanium low is higher than the second condition.

By making the ratio of the hydrogen flow rate to the flow rate of the deposition gas containing silicon or germanium higher than the second condition, it is possible to further increase the crystallinity of the second microcrystalline semiconductor film 61, which is more effective on the surface than in the first embodiment. A microcrystalline semiconductor film with high crystallinity can be formed.

(Embodiment 3)

In this embodiment, the manufacturing method of the thin film transistor formed in the semiconductor device which is one Embodiment of this invention is demonstrated with reference to FIGS. In addition, in the thin film transistor, the n-type side has a higher carrier mobility than the p-type side. In addition, if the thin film transistors formed on the same substrate are all unified with the same polarity, the number of steps can be reduced, which is preferable. For this reason, in this embodiment, the manufacturing method of an n type thin film transistor is demonstrated.

The on-current refers to a current flowing between the source electrode and the drain electrode when the thin film transistor is in the on state. For example, in the case of an n-type thin film transistor, it is a current flowing between the source electrode and the drain electrode when the gate voltage is higher than the threshold voltage of the transistor.

In addition, the off current means a current flowing between the source electrode and the drain electrode when the thin film transistor is in the off state. For example, in the case of an n-type thin film transistor, it is a current flowing between the source electrode and the drain electrode when the gate voltage is lower than the threshold voltage of the thin film transistor.

As shown in FIG. 3A, a gate electrode 103 is formed over the substrate 101. Next, a gate insulating film 105 covering the gate electrode 103 (also called a first gate electrode) is formed, and a seed crystal 107 is formed over the gate insulating film 105.

As the board | substrate 101, the board | substrate 51 shown in Embodiment 1 can be used suitably.

The gate electrode 103 can be formed in a single layer or stacked by using a metal such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, nickel, or an alloy containing these as a main component. Moreover, you may use the semiconductor represented by polycrystalline silicon doped with impurity elements, such as phosphorus, AgPdCu alloy, Al-Nd alloy, Al-Ni alloy, etc.

For example, the two-layer laminated structure of the gate electrode 103 may be a two-layer laminated structure in which a molybdenum film is laminated on an aluminum film, or a two-layer structure in which a molybdenum film is laminated on a copper film, or a titanium nitride film or a copper film. 2-layer structure in which tantalum nitride film is laminated, 2-layer structure in which titanium nitride film and molybdenum film are laminated, 2-layer structure in which copper-magnesium-alloy film containing oxygen and copper film are laminated, and copper-manganese-alloy film containing oxygen And a two-layer structure in which a copper film is laminated, and a two-layer structure in which a copper-manganese-alloy film and a copper film are laminated. As a three-layer laminated structure, it is preferable to set it as the three-layer structure which laminated | stacked the tungsten film or the tungsten nitride film, the alloy film of aluminum and silicon or the alloy film of aluminum and titanium, and the titanium nitride film or titanium film. By laminating a metal film functioning as a barrier film on the film having a low electrical resistance, the electrical resistance can be lowered and the diffusion of metal elements from the metal film into the semiconductor film can be prevented.

The gate electrode 103 uses a sputtering method or a vacuum deposition method on the substrate 101, forms a conductive film by the above-described material, forms a mask on the conductive film by a photolithography method, an inkjet method, or the like, and then applies the mask. It can be used by etching the conductive film. It is also possible to form conductive nano pastes such as silver, gold or copper by discharging them onto a substrate by an inkjet method and firing them. The nitride film of the metal material may be formed between the substrate 101 and the gate electrode 103 for the purpose of improving the adhesion between the gate electrode 103 and the substrate 101. Here, a conductive film is formed on the substrate 101, and the conductive film is etched using a mask formed of a resist formed by a photolithography step.

The side surface of the gate electrode 103 is preferably tapered. This is because the insulating film, the semiconductor film, and the wiring formed on the gate electrode 103 are not cut at the stepped position of the gate electrode 103 in the subsequent step. In order to make the side surface of the gate electrode 103 taper-shaped, etching may be performed, retracting the mask formed from a resist.

In addition, by the process of forming the gate electrode 103, the gate wiring (scanning line) and the capacitance wiring can also be formed simultaneously. In addition, a scanning line means the wiring which selects a pixel, and a capacitor wiring means the wiring connected to one electrode of the storage capacitor of a pixel. However, the present invention is not limited thereto, and may be formed separately from one or both of the gate wiring and the capacitor wiring and the gate electrode 103.

The gate insulating film 105 can be formed using the insulating film 55 shown in Embodiment 1 as appropriate. In addition, by forming the gate insulating film 105 with an oxide insulating film such as silicon oxide or silicon oxynitride, it is possible to reduce variation in the threshold voltage of the thin film transistor.

The gate insulating film 105 can be formed using a CVD method, a sputtering method, or the like. In the formation process by the CVD method of the gate insulating film 105, the conditions of the seed crystal 57 shown in Embodiment 1 can be used suitably for generation | occurrence | production of a glow discharge plasma. In addition, when the gate insulating film 105 is formed by using a microwave plasma CVD apparatus having a high frequency of 1 GHz or more, the breakdown voltage between the gate electrode, the drain electrode, and the source electrode can be improved, whereby a highly reliable thin film transistor can be obtained. .

In addition, since the silicon oxide film is formed by the CVD method using an organic silane gas as the gate insulating film 105, it is possible to increase the crystallinity of the semiconductor film to be formed later, so that the on-current and the field effect mobility of the thin film transistor are increased. It can increase. Examples of the organosilane gas include tetraethoxysilane (TEOS: chemical formula Si (OC ₂ H ₅ ) ₄ ), tetramethylsilane (TMS: chemical formula Si (CH ₃ ) ₄ ), tetramethylcyclotetrasiloxane (TMCTS), and octamethylcyclo. Silicon-containing compounds such as tetrasiloxane (OMCTS), hexamethylsilazane (HMDS), triethoxysilane (SiH (OC ₂ H ₅ ) ₃ ), trisdimethylaminosilane (SiH (N (CH ₃ ) ₂ ) ₃ ) Can be used.

As the seed crystal 57 shown in Embodiment 1, the seed crystal 107 can be formed under the first condition of forming a high crystalline mixed phase grain at a low particle density.

By adding a rare gas such as helium, argon, neon, krypton, or xenon to the source gas of the seed crystal 107, the crystallinity of the seed crystal 107 can be improved. As a result, the ON current and the field effect mobility of the thin film transistor are increased, and the throughput can be increased.

Next, as shown in FIG. 3B, a microcrystalline semiconductor film 109 is formed over the seed crystal 107. Like the microcrystalline semiconductor film 59 shown in Embodiment 1, the microcrystalline semiconductor film 109 can be formed using the 2nd condition which crystal-grows mixed phase grains of the seed crystal 107, and fills the gap of a mixed phase grain.

By adding a rare gas such as helium, argon, neon, krypton, xenon, etc. to the source gas of the microcrystalline semiconductor film 109, the crystallinity of the microcrystalline semiconductor film 109 can be improved like the seed crystal 107. As a result, the ON current and the field effect mobility of the thin film transistor are increased, and the throughput can be increased.

Next, as shown in FIG. 3C, the semiconductor film 111 is formed over the microcrystalline semiconductor film 109. The semiconductor film 111 is composed of a microcrystalline semiconductor region 111a and an amorphous semiconductor region 111b. Next, an impurity semiconductor film 113 is formed over the semiconductor film 111. Next, a mask 115 formed of a resist is formed on the impurity semiconductor film 113.

The semiconductor film 111 having the microcrystalline semiconductor region 111a and the amorphous semiconductor region 111b is formed under the conditions in which the microcrystalline semiconductor film 109 is a seed crystal and partially crystal-grows (conditions for suppressing crystal growth). can do.

The semiconductor film 111 is formed in a processing chamber of a plasma CVD apparatus by mixing a deposition gas containing silicon or germanium, a gas containing hydrogen and nitrogen, and a glow discharge plasma. Examples of the gas containing nitrogen include ammonia, nitrogen, nitrogen fluoride, nitrogen chloride, chloroamine, and fluoroamine. The glow discharge plasma can be generated in the same manner as the seed crystal 107.

At this time, the flow rate ratio of the deposition gas containing silicon or germanium and hydrogen uses a flow rate ratio for forming the microcrystalline semiconductor film, such as the seed crystal 107 or the microcrystalline semiconductor film 109, and further contains nitrogen in the source gas. By adding a gas, crystal growth can be suppressed more than the deposition conditions of the seed crystal 107 and the microcrystalline semiconductor film 109. Specifically, in the deposition initial stage of the semiconductor film 111, since the gas containing nitrogen is included in the source gas, crystal growth is partially suppressed, and the amorphous microcrystalline semiconductor region grows while the amorphous semiconductor region grows. Is formed. In the middle or late deposition period, crystal growth of the weight-shaped microcrystalline semiconductor region is stopped, and only the amorphous semiconductor region is deposited. As a result, in the semiconductor film 111, the amorphous semiconductor region 111a is formed of a highly ordered semiconductor film with few defects and a steep slope of the tail in the valence band band. 111b can be formed.

Here, as a representative example of the conditions for forming the semiconductor film 111, the flow rate of hydrogen to the flow rate of the deposition gas containing silicon or germanium is 10 to 2000 times, preferably 10 to 200 times. In addition, as a representative example of the conditions for forming an ordinary amorphous semiconductor film, the flow rate of hydrogen with respect to the flow rate of the deposition gas containing silicon or germanium is 0 to 5 times.

In addition, the deposition rate can be increased by introducing a rare gas such as helium, argon, neon, xenon, or krypton into the source gas of the semiconductor film 111.

It is preferable that the thickness of the semiconductor film 111 is 50-350 nm, More preferably, it is 120-250 nm.

An enlarged view between the gate insulating film 105 and the impurity semiconductor film 113 shown in FIG. 3C is shown in FIG. 4.

As shown in FIG. 4A, the microcrystalline semiconductor region 111a of the semiconductor film 111 is uneven, and the convex portion is narrowed from the gate insulating film 105 toward the amorphous semiconductor region 111b (the tip of the convex portion is narrowed). Acute angle) It is convex shape. In addition, the shape of the microcrystalline semiconductor region 111a may be a convex shape (backlash shape) that becomes wider from the gate insulating film 105 toward the amorphous semiconductor region 111b.

The thickness of the seed crystal 107, the microcrystalline semiconductor film 109, and the microcrystalline semiconductor region 111a, that is, the projections (convex portions) of the microcrystalline semiconductor region 111a from the interface between the gate insulating film 105 and the seed crystal 107. The off current of the thin film transistor can be reduced by setting the distance to the front end of 5 nm or more and 310 nm or less.

In addition, since the crystallinity of the microcrystalline semiconductor region 111a can be improved by making the concentration measured by the secondary ion mass spectrometry of oxygen contained in the semiconductor film 111 less than 1 × 10 ¹⁸ atoms / cm 3. Do. Further, the peak concentration of the nitrogen concentration profile of the semiconductor film 111 measured by the secondary ion mass spectrometry is 1 × 10 ²⁰ atoms / cm 3 or more and 1 × 10 ²¹ atoms / cm 3 or less, preferably 2 × 10 ²⁰ atoms / cm 3 The value is 1 × 10 ²¹ atoms / cm 3 or less.

The amorphous semiconductor region 111b is formed of an amorphous semiconductor having nitrogen. Nitrogen contained in the amorphous semiconductor having nitrogen may be present as an NH group or NH ₂ group, for example. As an amorphous semiconductor, it forms using amorphous silicon.

An amorphous semiconductor containing nitrogen is a semiconductor having a smaller energy of the Urbach stage measured by a CPM (Constant Photocurrent Method) or photoluminescence spectroscopy and a smaller amount of defect absorption spectra than conventional amorphous semiconductors. That is, the amorphous semiconductor containing nitrogen is a semiconductor with high order | order which has few defects compared with the conventional amorphous semiconductor, and the steepness of the tail of the level in a valence band band | edge stage is steep. In the amorphous semiconductor containing nitrogen, the slope of the tail of the level at the valence band band is steep, so that the band gap is widened and tunnel current is difficult to flow. For this reason, by forming the amorphous semiconductor containing nitrogen between the microcrystalline semiconductor region 111a and the impurity semiconductor film 113, the off current of a thin film transistor can be reduced. In addition, by forming an amorphous semiconductor containing nitrogen, it is possible to increase the on-current and the field effect mobility.

In addition, in the amorphous semiconductor containing nitrogen, the peak region of the spectrum by low-temperature photoluminescence spectroscopy is 1.31 eV or more and 1.39 eV or less. In addition, the peak area of the spectrum which measured the microcrystalline semiconductor, typically microcrystalline silicon by low temperature photoluminescence spectroscopy, is 0.98 eV or more and 1.02 eV or less, and the amorphous semiconductor containing nitrogen is different from a microcrystalline semiconductor.

In addition to the amorphous semiconductor region 111b, the microcrystalline semiconductor region 111a may also have an NH group or an NH ₂ group.

In addition, as shown in FIG. 4B, the amorphous semiconductor region 111b includes a semiconductor mixed phase 111c having a particle diameter of 1 nm or more and 10 nm or less, preferably 1 nm or more and 5 nm or less, further turning on the current and the electric field effect. It is possible to increase the mobility.

The convex (vertical) microcrystalline semiconductor whose tip is narrowed from the gate insulating film 105 toward the amorphous semiconductor region 111b is formed under the condition of suppressing crystal growth after forming the microcrystalline semiconductor under the condition that the microcrystalline semiconductor is deposited. Such a structure is obtained by growing the crystal and depositing an amorphous semiconductor.

Since the microcrystalline semiconductor region 111a of the semiconductor film 111 is in the shape of a weight or a back, the resistance in the longitudinal direction (film thickness direction) when a voltage is applied between the source electrode and the drain electrode in the on state, that is, It is possible to lower the resistance of the semiconductor film 111. In addition, between the microcrystalline semiconductor region 111a and the impurity semiconductor film 113, there is an amorphous semiconductor containing nitrogen having a small order of defects and a high order of steepness of the tail of the level at the valence band band end. As a result, the tunnel current becomes difficult to flow. In view of the above, the thin film transistor shown in the present embodiment can increase the on current and the field effect mobility and reduce the off current.

Here, the semiconductor film 111 having the microcrystalline semiconductor region 111a and the amorphous semiconductor region 111b was formed by including a gas containing nitrogen in the source gas of the semiconductor film 111, but the other semiconductor film 111 As a forming method, a gas containing nitrogen is exposed on the surface of the microcrystalline semiconductor film 109, and nitrogen is adsorbed onto the surface of the microcrystalline semiconductor film 109, and then a deposition gas containing silicon or germanium and hydrogen are used as raw materials. As a gas, the semiconductor film 111 having the microcrystalline semiconductor region 111a and the amorphous semiconductor region 111b can be formed.

The impurity semiconductor film 113 is formed of amorphous silicon with phosphorus, microcrystalline silicon with phosphorus, or the like. Moreover, it can also be set as the laminated structure of the amorphous silicon which phosphorus added and the microcrystalline silicon which phosphorus added. When the p-type thin film transistor is formed as the thin film transistor, the impurity semiconductor film 113 is formed of microcrystalline silicon to which boron is added, amorphous silicon to which boron is added, or the like. In addition, when the semiconductor film 111 and the wirings 129a and 129b formed thereafter make ohmic contact, the impurity semiconductor film 113 may not be formed.

In the reaction chamber of the plasma CVD apparatus, the impurity semiconductor film 113 mixes a deposition gas containing silicon, hydrogen, and phosphine (hydrogen dilution or silane dilution), and is formed by a glow discharge plasma. As a result, amorphous silicon to which phosphorus is added or microcrystalline silicon to which phosphorus is added is formed. In the case of manufacturing a p-type thin film transistor, diborane may be used as the impurity semiconductor film 113 instead of phosphine, and formed by glow discharge plasma.

In addition, when the impurity semiconductor film 113 is formed of microcrystalline silicon to which phosphorus is added or microcrystalline silicon to which boron is added, the microcrystalline semiconductor film, between the semiconductor film 111 and the impurity semiconductor film 113, Typically, the characteristics of the interface can be improved by forming a microcrystalline silicon film. As a result, resistance generated at the interface between the impurity semiconductor film 113 and the semiconductor film 111 can be reduced. As a result, the amount of current flowing through the source region, the semiconductor film, and the drain region of the thin film transistor can be increased to increase the on-state current and the field effect mobility.

The mask 115 formed of a resist may be formed by a photolithography process.

Next, the seed crystal 107, the microcrystalline semiconductor film 109, the semiconductor film 111, and the impurity semiconductor film 113 are etched using the mask 115 formed of a resist. By this step, the seed crystal 107, the microcrystalline semiconductor film 109, the semiconductor film 111, and the impurity semiconductor film 113 are separated for each element, and the island-like semiconductor laminate 117 and the island-like shape are separated. An impurity semiconductor film 121 is formed. In addition, the semiconductor laminate 117 includes a microcrystalline semiconductor region 117a and a semiconductor film 111 each including a seed crystal 107, a microcrystalline semiconductor film 109, and a portion of the microcrystalline semiconductor region of the semiconductor film 111. It has an amorphous semiconductor region 117b including an amorphous semiconductor region of. Next, the mask 115 formed of resist is removed (see FIG. 3D).

Next, a conductive film 127 is formed over the impurity semiconductor film 121 (see FIG. 5A). The conductive film 127 may be formed in a single layer or laminated by aluminum, copper, titanium, neodymium, scandium, molybdenum, chromium, tantalum or tungsten. Or you may form with the aluminum alloy (Al-Nd alloy etc. which can be used for the gate electrode 103) to which the heellock prevention element was added. You may use crystalline silicon which added the impurity element used as a donor. The film on the side in contact with the crystalline silicon to which the impurity element to be a donor is added may be formed of titanium, tantalum, molybdenum, tungsten or a nitride of these elements, and may have a laminated structure in which aluminum or an aluminum alloy is formed thereon. In addition, the upper and lower surfaces of aluminum or an aluminum alloy may be a laminated structure interposed between titanium, tantalum, molybdenum, tungsten or nitrides of these elements. The conductive film 127 is formed using the CVD method, the sputtering method or the vacuum vapor deposition method. The conductive film 127 may be formed by discharging and firing using a conductive nano paste such as silver, gold, copper, or the like using a screen printing method or an inkjet method.

Next, a mask formed of a resist is formed by a photolithography step, and the conductive film 127 is etched using the mask formed of the resist to form wirings 129a and 129b serving as source and drain electrodes. Form (see FIG. 5B). The etching of the conductive film 127 may use dry etching or wet etching. In addition, one of the wirings 129a and 129b functions not only as a source electrode or a drain electrode but also as a signal line. However, the present invention is not limited thereto, and may be formed separately from the signal line, the source electrode, and the drain electrode.

Next, a part of the impurity semiconductor film 121 and the semiconductor laminate 117 are etched to form a pair of impurity semiconductor films 131a and 131b functioning as source and drain regions. In addition, a semiconductor laminate 133 having a microcrystalline semiconductor region 133a and a pair of amorphous semiconductor regions 133b is formed. At this time, by etching the semiconductor laminate 117 so that the microcrystalline semiconductor region 133a is exposed, in the region covered with the wirings 129a and 129b, the microcrystalline semiconductor region 133a and the amorphous semiconductor region 133b are laminated. In the region not covered with the wirings 129a and 129b and overlapping with the gate electrode, the semiconductor laminate 133 is exposed to the microcrystalline semiconductor region 133a.

Here, the ends of the wirings 129a and 129b and the ends of the impurity semiconductor films 131a and 131b coincide with each other. However, the ends of the wirings 129a and 129b and the ends of the impurity semiconductor films 131a and 131b are shifted. The end portions of the wirings 129a and 129b may be located inside the end portions of the impurity semiconductor films 131a and 131b.

Next, dry etching may be performed. The dry etching conditions are conditions in which damage is not caused to the exposed microcrystalline semiconductor region 133a and the amorphous semiconductor region 133b and the etching rate with respect to the microcrystalline semiconductor region 133a and the amorphous semiconductor region 133b is low. use. As the etching gas, Cl ₂ , CF ₄ , N ₂ , or the like is typically used. The etching method is not particularly limited, and may be an inductively coupled plasma (ICP) method, a capacitively coupled plasma (CCP) method, or an electron cyclotron resonance (ECR) method. And reactive ion etching (RIE) may be used.

Next, plasma treatment, typically water plasma treatment, oxygen plasma treatment, ammonia plasma treatment, nitrogen plasma treatment, and plasma with a mixed gas of oxygen and hydrogen are applied to the surfaces of the microcrystalline semiconductor region 133a and the amorphous semiconductor region 133b. Processing and the like.

The water plasma treatment can be performed by introducing a gas containing water as a main component represented by water vapor (H ₂ O vapor) into the reaction space to generate a plasma. Then, the mask formed of resist is removed. The mask formed of the resist may be removed before the dry etching of the impurity semiconductor film 121 and the semiconductor laminate 117.

As described above, after the microcrystalline semiconductor region 133a and the amorphous semiconductor region 133b are formed, dry etching is again performed under conditions that do not damage the microcrystalline semiconductor region 133a and the amorphous semiconductor region 133b. Impurities such as residues on the exposed microcrystalline semiconductor region 133a and the amorphous semiconductor region 133b may be removed. Further, by performing water plasma treatment subsequent to dry etching, the residue of the mask formed of the resist can be removed, and defects in the microcrystalline semiconductor region 133a can be reduced. In addition, by performing the plasma treatment, the insulation between the source region and the drain region can be ensured, so that the off current of the completed thin film transistor can be reduced, and variations in electrical characteristics can be reduced.

In addition, a wiring formed on the conductive film 127 by a photolithography step is formed on the conductive film 127, and the conductive film 127 is etched using the mask formed of the resist to serve as a source electrode and a drain electrode ( 129a and 129b are formed. Next, the impurity semiconductor film 121 is etched to form a pair of impurity semiconductor films 131a and 131b functioning as source and drain regions. At this time, a part of the semiconductor laminate 117 may be etched. Next, after removing the mask formed of resist, a part of the semiconductor laminate 117 is etched to form a semiconductor laminate 133 having a microcrystalline semiconductor region 133a and a pair of amorphous semiconductor regions 133b. Also good.

As a result, in the step of removing the mask formed of the resist, the microcrystalline semiconductor region 117a is covered with the amorphous semiconductor region 117b, so that the microcrystalline semiconductor region 117a is applied to the release liquid and the residue of the resist. There is no contact. In addition, after removing the mask formed of resist, the amorphous semiconductor region 117b is etched using the wirings 129a and 129b to expose the microcrystalline semiconductor region 133a. For this reason, the amorphous semiconductor region in contact with the residue of the stripping solution and the resist does not remain in the back channel. As a result, no leakage current due to the peeling liquid remaining in the back channel and the residue of the resist is generated, so that the off current of the thin film transistor can be further reduced.

Through the above steps, a single gate thin film transistor can be manufactured. In addition, a single gate thin film transistor having low off current and high on current and field effect mobility can be manufactured with high productivity.

Next, an insulating film 137 (also referred to as a second gate insulating film) is formed over the semiconductor laminate 133 and the wirings 129a and 129b. The insulating film 137 may be formed like the gate insulating film 105.

Next, an opening (not shown) is formed in the insulating film 137 using a mask formed of a resist formed by a photolithography step. Next, a back gate electrode 139 (also referred to as a second gate electrode) is formed over the insulating film 137 (see FIG. 5C). Through the above steps, a dual gate type thin film transistor can be manufactured.

The back gate electrode 139 may be formed like the wirings 129a and 129b. In addition, the back gate electrode 139 includes indium oxide including tungsten oxide, indium zinc oxide including tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, and indium zinc oxide. Or a transmissive conductive material such as indium tin oxide added with silicon oxide.

In addition, the back gate electrode 139 can be formed using a conductive composition containing a conductive polymer (also called a conductive polymer) having transparency. The back gate electrode 139 has a sheet resistance of 10000 Ω / sq. It is below and it is preferable that the light transmittance in wavelength 550nm is 70% or more. Moreover, it is preferable that the resistivity of the conductive polymer contained in a conductive composition is 0.1 ohm * cm or less.

As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or derivatives thereof, polypyrrole or derivatives thereof, polythiophene or derivatives thereof, or two or more copolymers of aniline, pyrrole and thiophene or derivatives thereof and the like can be given.

The back gate electrode 139 can be formed by sputtering to form a thin film using any one of the above materials, and then etching the thin film using a mask formed of a resist formed by a photolithography step. Moreover, after apply | coating or printing the electroconductive composition containing the electroconductive polymer which has translucent, it can bake and form.

Next, the shape of the back gate electrode will be described with reference to FIG. 6 in the top view of the thin film transistor.

As shown in FIG. 6A, the back gate electrode 139 can be formed in parallel with the gate electrode 103. In this case, it is possible to arbitrarily control the potential applied to the back gate electrode 139 and the potential applied to the gate electrode 103, respectively. For this reason, the threshold voltage of a thin film transistor can be controlled. In addition, since the region where the carrier flows, that is, the channel region, is formed on the gate insulating film 105 side and the insulating film 137 side of the microcrystalline semiconductor region, the on current of the thin film transistor can be increased.

In addition, as shown in FIG. 6B, the back gate electrode 139 can be connected to the gate electrode 103. That is, the opening 150 formed in the gate insulating film 105 and the insulating film 137 can have a structure in which the gate electrode 103 and the back gate electrode 139 are connected. In this case, the potential applied to the back gate electrode 139 and the potential applied to the gate electrode 103 are the same. As a result, in the semiconductor film, the region in which the carrier flows, that is, the channel region, is formed on the gate insulating film 105 side and the insulating film 137 side of the microcrystalline semiconductor region, so that the ON current of the thin film transistor can be increased.

In addition, as shown in FIG. 6C, the back gate electrode 139 may be floated without being connected to the gate electrode 103. Even if a potential is not applied to the back gate electrode 139, the channel region is formed on the gate insulating film 105 side and the insulating film 137 side of the microcrystalline semiconductor region, so that the on-state current of the thin film transistor can be increased.

Alternatively, as shown in FIG. 6D, the back gate electrode 139 may overlap the wirings 129a and 129b via the insulating film 137. Although the back gate electrode 139 of the structure shown in FIG. 6A was shown here, the back gate electrode 139 shown in FIG. 6B and 6C may also overlap with wiring 129a, 129b similarly.

In the single gate type thin film transistor and the dual gate type thin film transistor shown in this embodiment, it is possible to form a channel region with a microcrystalline semiconductor film having high crystallinity by reducing the gap between the mixed phase grains. As a result, the amount of carrier movement of the single gate thin film transistor and the dual gate thin film transistor can be increased to increase the on current and the field effect mobility. Further, an amorphous semiconductor region 133b is provided between the microcrystalline semiconductor region 133a and the impurity semiconductor films 131a and 131b. For this reason, the off current of a thin film transistor can be reduced. In view of the foregoing, the area of the single gate thin film transistor and the dual gate thin film transistor can be reduced, and high integration into a semiconductor device is possible. In addition, since the area of the drive circuit can be reduced by using the thin film transistor shown in the present embodiment for the drive circuit of the display device, the frame of the display device can be further narrowed.

In addition, in this embodiment, although the microcrystalline semiconductor film was formed using Embodiment 1, the microcrystal semiconductor film can be formed using Embodiment 2. In addition, when the dual gate thin film transistor is formed using the microcrystalline semiconductor film shown in Embodiment 2, since the crystallinity of the microcrystalline semiconductor film on the back gate electrode side is high, the electrical characteristics of the dual gate thin film transistor can be further improved. Can be.

(Embodiment 4)

In this embodiment, a manufacturing method of a thin film transistor that can reduce the off current can be further described with reference to FIG. 3 and FIG. 7.

As in the third embodiment, the semiconductor laminate 117 is formed through the process of FIGS. 3A to 3C as shown in FIG. 7A.

Next, a plasma treatment is performed in which the plasma 123 is exposed on the side surface of the semiconductor laminate 117 while the mask 115 formed of the resist remains. Here, plasma is generated in an oxidizing gas or nitriding gas atmosphere to expose the plasma 123 to the semiconductor laminate 117. Examples of the oxidizing gas include oxygen, ozone, dinitrogen monoxide, water vapor, a mixed gas of oxygen, and hydrogen. In addition, examples of the nitriding gas include nitrogen, ammonia, nitrogen fluoride, nitrogen chloride, chloroamine, and fluoroamine. By generating a plasma in an oxidizing gas or nitriding gas atmosphere, oxygen radicals or nitrogen radicals are generated. The radicals may react with the semiconductor laminate 117 to form an insulation region, which is a barrier region, on a side surface of the semiconductor laminate 117. Instead of irradiating the plasma, ultraviolet light may be irradiated to generate oxygen radicals or nitrogen radicals.

In addition, when a mixed gas of oxygen, ozone, water vapor, oxygen, and hydrogen is used as the oxidizing gas, as shown in FIG. 7B, the resist is retracted by plasma irradiation, and the mask 115a having the reduced area of the upper surface is formed. Is formed. For this reason, the exposed impurity semiconductor film 121 is oxidized along with the side surface of the semiconductor laminate 117 by the plasma treatment, and the side surface of the semiconductor laminate 117 and the side surface of the impurity semiconductor film 121 and An insulating region 125, which is a barrier region, is also formed in a part of the upper surface.

Next, as shown in the third embodiment, the wirings 129a and 129b, the source region and the drain region functioning as the source electrode and the drain electrode, as shown in FIG. 5C through the same process as those in FIGS. 5A and 5B. A single gate is formed by forming a semiconductor laminate 133 and an insulating film 137 having a pair of impurity semiconductor films 131a and 131b, a microcrystalline semiconductor region 133a, and a pair of amorphous semiconductor regions 133b that function as a single gate. Type thin film transistor can be manufactured.

In addition, by forming the back gate electrode on the insulating film 137, a dual gate type thin film transistor can be manufactured.

In the single gate type thin film transistor and the dual gate type thin film transistor shown in this embodiment, it is possible to form a channel region with a microcrystalline semiconductor film having high crystallinity by reducing the gap between the mixed phase grains. In addition, by forming an insulating region that is a barrier region between the semiconductor laminate 133 and the wirings 129a and 129b, it is possible to suppress the injection of holes from the wirings 129a and 129b into the semiconductor laminate 133, and thus to turn off. The thin film transistor is low in current, high in field effect mobility and high on current. For this reason, the area of a thin film transistor can be made small and high integration of a semiconductor device is attained. In addition, since the area of the drive circuit can be reduced by using the thin film transistor shown in the present embodiment for the drive circuit of the display device, the frame of the display device can be further narrowed.

In addition, although this Embodiment was described using Embodiment 3, other embodiment can be used suitably.

(Embodiment 5)

In this embodiment, the manufacturing method of the thin film transistor formed in the semiconductor device which is one Embodiment of this invention is demonstrated with reference to FIG. 3, FIG. 5, and FIG. FIG. 8 is a process corresponding to the process shown in FIG. 5B.

As in the third embodiment, the conductive film 127 is formed through the processes of FIGS. 3A to 3D and 5A.

Next, as shown in FIG. 8, as in the third embodiment, the wirings 129a and 129b are formed, and a part of the impurity semiconductor film 121 and the semiconductor laminate 117 are etched to form a source region and a drain. A pair of impurity semiconductor films 131a and 131b serving as regions are formed. In addition, a semiconductor laminate 143 having a microcrystalline semiconductor region 143a and an amorphous semiconductor region 143b is formed. At this time, by etching the semiconductor laminate 117 so that the amorphous semiconductor region 143b is exposed, in the region covered with the wirings 129a and 129b, the microcrystalline semiconductor region 143a and the amorphous semiconductor region 143b are laminated. In the region not covered by the wirings 129a and 129b and overlapping with the gate electrode, the semiconductor laminate 143 is exposed without the microcrystalline semiconductor region 143a and the amorphous semiconductor region 143b. In addition, the etching amount of the semiconductor laminated body 117 here shall be less than FIG. 5B.

This next step is the same as that in the third embodiment.

Through the above steps, a single gate thin film transistor can be manufactured. Since this thin film transistor is amorphous on the back channel side, the off current can be reduced as compared with the thin film transistor shown in Fig. 5B.

In the present embodiment, the back gate electrode 139 may be formed after the step shown in FIG. 8 via the insulating film 137 as in the step shown in FIG. 5C.

This embodiment can be used in appropriate combination with any of the other embodiments.

(Embodiment 6)

A thin film transistor can be fabricated, and a semiconductor device (also referred to as a display device) having a display function can be fabricated by using the thin film transistor for a pixel portion and a driving circuit. In addition, a part or all of the driving circuit using the thin film transistor can be integrally formed on the same substrate as the pixel portion to form a system on panel.

The display device includes a display element. As the display element, a liquid crystal element (also called a liquid crystal display element) and a light emitting element (also called a light emitting display element) can be used. The light emitting device includes, in its category, an element whose luminance is controlled by a current or voltage, and specifically includes an inorganic EL (Electro Luminescence) device, an organic EL device, and the like. Further, a display medium in which the contrast is changed by an electrical action such as an electronic ink can also be applied.

The display device also includes a panel in which the display element is sealed, and a module in which an IC including a controller is mounted on the panel. Furthermore, in the process of manufacturing the said display apparatus, it is related with the element board | substrate corresponded to one form before the display element is completed, The said element substrate is equipped with the means for supplying an electric current to a display element in each of several pixel. do. Specifically, the element substrate may be in a state in which only a pixel electrode of the display element is formed, or may be formed after forming a conductive film to be a pixel electrode, and before etching to form a pixel electrode, and all forms are suitable.

In addition, the display apparatus in this specification refers to an image display device, a display device, or a light source (including an illumination device). In addition, connectors such as flexible printed circuit (FPC) or Tape Automated Bonding (TAB) tapes or Tape Carrier Package (TCP) tapes, modules having printed wiring boards formed at the end of TAB tapes or TCPs, or display elements have COG ( All modules in which ICs (integrated circuits) are mounted directly by a chip on glass method are also included in the display device.

(Seventh Embodiment)

In this embodiment, a photoelectric conversion device which is one embodiment of a semiconductor device will be described. In the photoelectric conversion device shown in the present embodiment, a microcrystalline semiconductor film having high crystallinity is employed as the semiconductor film by reducing the gap between the mixed phases as shown in the first and second embodiments. Examples of the semiconductor film in which the microcrystalline semiconductor film having increased crystallinity by reducing the interphase gap are employed include a semiconductor film for performing photoelectric conversion and a semiconductor film for conducting conductivity, but are particularly suitable for use in a semiconductor film for performing photoelectric conversion. Do. Alternatively, a microcrystalline semiconductor film having improved crystallinity may be employed at the interface between a semiconductor film for conducting photoelectric conversion, a semiconductor film having a conductivity type, and another film, by reducing interphase gaps.

By adopting the above-described configuration, the resistance (series resistance) generated by the semiconductor film for performing photoelectric conversion or the semiconductor film showing the conductivity type can be reduced to improve the characteristics. Moreover, the optical and electrical loss in the interface of the semiconductor film which performs photoelectric conversion, the semiconductor film of a conductive type, and another film can be suppressed, and photoelectric conversion efficiency can be improved. Hereinafter, one aspect of the manufacturing method of the photoelectric conversion device will be described with reference to FIG. 9.

As shown in FIG. 9A, the first electrode 202 is formed on the substrate 200.

As the board | substrate 200, the board | substrate 51 shown in Embodiment 1 can be used suitably. It is also possible to use a plastic substrate. Examples of the plastic substrate include substrates containing thermosetting resins such as epoxy resins, unsaturated polyester resins, polyimide resins, bismaleimide triazine resins, and cyanate resins, polyphenylene oxide resins, polyetherimide resins, and fluorine resins. It is good to use the board | substrate containing the thermoplastic resin of this.

In addition, the substrate 200 may have a texture structure. Thereby, it is possible to improve photoelectric conversion efficiency.

In addition, in this embodiment, since light enters from the back surface side (lower part of drawing) of the board | substrate 200, the board | substrate which has translucency is employ | adopted, but the 2nd electrode 210 side formed later (drawing-fiber) is adopted. In the case where the light enters from above), the configuration is not limited to this. In this case, a semiconductor substrate containing a material such as silicon or a conductive substrate containing a metal material or the like may be used.

The 1st electrode 202 can be formed using the electroconductive material which has a translucency used for the back gate electrode 139 shown in Embodiment 3. As shown in FIG. The first electrode 202 is formed using a sputtering method, a CVD method, a vacuum deposition method, a coating method, a printing method, or the like.

The first electrode 202 is formed to a thickness of 10 nm to 500 nm, preferably 50 nm to 100 nm. In addition, the sheet resistance of the 1st electrode 202 is 20 ohm / sq. To 200 Ω / sq. Form so that it is about.

In addition, in this embodiment, since light enters from the back surface side (lower part of drawing) of the board | substrate 200, although the 1st electrode 202 is formed using the electroconductive material which has a translucency, afterwards, In the case where the light is incident from the second electrode 210 side (upper part of the drawing) formed, the present invention is not limited thereto. In such a case, the first electrode 202 can be formed using a conductive material having no light transmissive properties such as aluminum, platinum, gold, silver, copper, titanium, tantalum and tungsten. In particular, when using a material which easily reflects light such as aluminum, silver, titanium, tantalum, or the like, it is possible to sufficiently improve the photoelectric conversion efficiency.

Like the substrate 200, the first electrode 202 may have a texture structure. In addition, an auxiliary electrode made of a low resistance conductive material may be separately formed so as to contact the first electrode 202.

Next, as shown in FIG. 9B, a semiconductor film 204 showing the first conductivity type is formed over the first electrode 202. The semiconductor film 204 which shows a 1st conductivity type is typically formed using the semiconductor film containing the semiconductor material to which the impurity element which gives a conductivity type was added. As the semiconductor material, it is suitable to use silicon in terms of productivity and cost. When using silicon as a semiconductor material, as an impurity element which imparts a conductivity type, phosphorus which gives n type, arsenic, boron which gives p type, aluminum, etc. are employ | adopted.

In addition, in this embodiment, since light is comprised from the back surface side (lower part of drawing) of the board | substrate 200, the conductivity type (1st conductivity type) of the semiconductor film 204 which shows a 1st conductivity type is It is preferable to set it as p type. This is due to the fact that the lifetime of the hole is short at about half of the lifetime of the electron, and as a result, the diffusion length of the hole is short, and the formation of electrons and holes is often made at the side where the light of the semiconductor film 206 undergoing photoelectric conversion is incident. . By setting the first conductivity type to p-type in this way, it is possible to take out as a current before the hole disappears, so that the decrease in photoelectric conversion efficiency can be suppressed. In addition, in the situation where the above is not a problem, for example, when the semiconductor film 206 that performs photoelectric conversion is sufficiently thin, the first conductivity type may be n-type.

Examples of the semiconductor material that can be used for the semiconductor film 204 showing the first conductivity type include silicon carbide, germanium, gallium arsenide, indium phosphide, zinc selenide, gallium nitride, silicon germanium, and the like. It is also possible to use a semiconductor material containing an organic material, a semiconductor material containing a metal oxide, or the like. The material can be appropriately selected in relation to the semiconductor film 206 which performs photoelectric conversion.

Although there is no request regarding the crystallinity of the semiconductor film 204 showing the first conductivity type, the semiconductor film 204 showing the first conductivity type is determined by reducing the gap of the mixed phase shown in the first or second embodiment. In the case of employing a microcrystalline semiconductor film having improved properties, the series resistance can be reduced and the optical and electrical loss at the interface with other films can be suppressed as compared with the conventional microcrystalline semiconductor film. , Suitable. Of course, it is also possible to employ other crystalline semiconductors such as amorphous, polycrystalline, and single crystals.

In addition, the semiconductor film 204 showing the first conductivity type may have a texture structure like the substrate 200.

The semiconductor film 204 showing the first conductivity type can be formed by a plasma CVD method using a deposition gas containing silicon and diborane. The semiconductor film 204 showing the first conductivity type is formed to have a thickness of 1 nm to 100 nm, preferably 5 nm to 50 nm.

In addition, after forming the silicon film to which the impurity element imparting a conductivity type is not added by plasma CVD or the like, boron may be added by a method such as ion implantation to form a semiconductor film 204 showing the first conductivity type. .

Next, as shown in FIG. 9C, on the semiconductor film 204 showing the first conductivity type, a semiconductor film 206 for performing photoelectric conversion is formed. As the semiconductor film 206 for performing the photoelectric conversion, a semiconductor film using the same semiconductor material as the semiconductor film 204 is applied. That is, silicon, silicon carbide, germanium, gallium arsenide, indium phosphide, zinc selenide, gallium nitride, silicon germanium, or the like can be used as the semiconductor material. Among these, it is suitable to use silicon. Besides, it is also possible to use a semiconductor material containing an organic material, a metal oxide semiconductor material, or the like.

As the semiconductor film 206 which performs photoelectric conversion, it is more suitable to apply the microcrystalline semiconductor film which improved crystallinity by reducing the clearance gap of a mixed phase as shown in Embodiment 1 and Embodiment 2. By employing a microcrystalline semiconductor film having high crystallinity by reducing the interphase gap between the semiconductor films as shown in Embodiments 1 and 2, the series resistance is reduced as compared with the case where a conventional microcrystalline semiconductor film is employed. The optical and electrical losses at the interface with other films can be suppressed.

Moreover, since sufficient light absorption is required for the semiconductor film 206 which performs photoelectric conversion, it is preferable that the thickness is about 100 nm-about 10 micrometers.

Next, as shown in FIG. 9D, a semiconductor film 208 showing the second conductivity type is formed on the semiconductor film 206 for performing photoelectric conversion. In this embodiment, the second conductivity type is n-type. The semiconductor film 208 showing the second conductivity type can be formed using a material such as silicon to which phosphorus is added as an impurity element imparting a conductivity type. The semiconductor material which can be used for the semiconductor film 208 showing the second conductivity type is the same as the semiconductor film 204 showing the first conductivity type.

The semiconductor film 208 showing the second conductivity type can be formed like the semiconductor film 204 showing the first conductivity type. For example, it can be formed by a plasma CVD method using a deposition gas containing silicon and phosphine. Also for the semiconductor film 208 showing the second conductivity type, it is suitable to employ a microcrystalline semiconductor film having high crystallinity by reducing the gap between the interphase grains shown in the first or second embodiment.

In addition, in this embodiment, since light enters from the back surface side (lower part of drawing) of the board | substrate 200, the conductivity type (2nd conductivity type) of the semiconductor film 208 is set to n type. One embodiment of the disclosed invention is not limited to this. When the first conductivity type is n-type, the second conductivity type is p-type.

Next, as shown in FIG. 9E, the second electrode 210 is formed over the semiconductor film 208 having the second conductivity type. The second electrode 210 is formed using a conductive material such as metal. For example, it can form using materials which are easy to reflect light, such as aluminum, silver, titanium, and tantalum. In this case, since the light which could not be fully absorbed in the semiconductor film 206 can be made to enter the semiconductor film 206 again, the photoelectric conversion efficiency can be improved.

Examples of the method for forming the second electrode 210 include sputtering, vacuum deposition, CVD, coating, printing, and the like. In addition, the second electrode 210 is formed to a thickness of 10nm to 500nm, preferably 50nm to 100nm.

In addition, in this embodiment, since light enters from the back surface side (lower part of drawing) of the board | substrate 200, although the 2nd electrode 210 is formed using the material which does not have translucency, it is 2nd The configuration of the electrode 210 is not limited to this. For example, when the light enters from the 2nd electrode 210 side (upper part of drawing), the 2nd electrode 210 uses the electroconductive material which has the translucency shown to the 1st electrode 202, and is used. Can be formed.

In addition, an auxiliary electrode made of a low resistance conductive material may be formed so as to be in contact with the second electrode 210.

The photoelectric used in the above-mentioned method by using the microcrystalline semiconductor film which improved crystallinity by reducing the gap of a mixed phase in the semiconductor film which performs photoelectric conversion, the semiconductor film which shows a 1st conductivity type, and the semiconductor film which shows a 2nd conductivity type. A converter can be manufactured. And by this, the conversion efficiency of a photoelectric conversion device can be improved. In addition, the microcrystalline semiconductor film which has improved crystallinity by reducing the interphase gap may be used in any one of the semiconductor film which performs photoelectric conversion, the semiconductor film which shows a 1st conductivity type, and the semiconductor film which shows a 2nd conductivity type, Which one to use can be changed as appropriate. Moreover, when using the microcrystal semiconductor film which improved crystallinity by reducing the clearance gap of a mixed phase in the plurality of said semiconductor films, it is more effective.

In addition, although the photoelectric conversion apparatus which has one unit cell was shown in this embodiment, it can be set as the photoelectric conversion apparatus which laminated | stacked two or more unit cells suitably.

This embodiment can be used in appropriate combination with any of the other embodiments.

(Embodiment 8)

The semiconductor device disclosed in this specification can be applied as an electronic paper. The electronic paper can be used for electronic devices in all fields as long as it displays information. For example, in electronic cards, posters, digital signage, public information displays (PIDs), in-car advertising of vehicles such as trains, and various cards such as credit cards, etc. Applicable to the display of. An example of an electronic device is shown in FIG. 10.

10 shows an example of an electronic book. For example, the electronic book 2700 is composed of two cases, a case 2701 and a case 2703. The case 2701 and the case 2703 are integrated by the shaft portion 2711, and the opening and closing operation can be performed with the shaft portion 2711 as the shaft. This configuration makes it possible to perform operations such as paper books.

The display unit 2705 and the photoelectric conversion device 2706 are built in the case 2701, and the display unit 2707 and the photoelectric conversion device 2708 are built into the case 2703. The display unit 2705 and the display unit 2707 may be configured to display a continuous screen or may be configured to display different screens. By setting the structure to display different screens, for example, sentences can be displayed on the right display unit (display unit 2705 in FIG. 10), and images can be displayed on the left display unit (display unit 2707 in FIG. 10).

In addition, in FIG. 10, the example which provided the operation part etc. in the case 2701 is shown. For example, the case 2701 includes a power switch 2721, an operation key 2723, a speaker 2725, and the like. The page can be turned by the operation key 2723. In addition, it is good also as a structure provided with a keyboard, a pointing device, etc. on the same surface as the display part of a case. Further, the rear surface or the side surface of the case may be provided with an external connection terminal (such as an earphone terminal, a USB terminal, or a terminal that can be connected to various cables such as an AC adapter and a USB cable), a recording medium insertion portion, and the like. The electronic book 2700 may be configured to have a function as an electronic dictionary.

The electronic book 2700 may be configured to transmit and receive information wirelessly. It is also possible to make the structure which purchases and downloads desired book data etc. from an electronic book server by radio.

(Embodiment 9)

The semiconductor device disclosed in this specification can be applied to various electronic devices (including game machines). As the electronic device, for example, a television device (also called a television or a television receiver), a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone (also called a mobile phone or a mobile phone device), And a large game machine such as a portable game machine, a portable information terminal, an audio reproducing apparatus, or a pachining machine.

11A shows an example of a television device. The television unit 9600 incorporates a display portion 9603 in the case 9601. An image can be displayed by the display portion 9603. In addition, the structure which supported the case 9601 by the stand 9605 is shown here.

The operation of the television device 9600 can be performed by an operation switch included in the case 9601 or a separate remote control manipulator 9610. The operation keys 9609 included in the remote control manipulator 9610 allow the channel and the volume to be operated, and the video displayed on the display portion 9603 can be operated. In addition, it is good also as a structure which forms the display part 9607 which displays the information output from the said remote control manipulator 9610 in the remote control manipulator 9610.

The television device 9600 is configured to include a receiver, a modem, and the like. General television broadcasting can be received by the receiver, and by connecting to a wired or wireless communication network through a modem, the receiver can be connected in one direction (sender to receiver) or in two directions (between the transmitter and the receiver or between receivers). It is also possible to perform information communication.

11B shows an example of a digital photoframe. For example, the digital photo frame 9700 is provided with a display portion 9703 in the case 9701. The display portion 9703 can display various images. For example, the display portion 9703 can function as a normal picture frame by displaying image data photographed with a digital camera or the like.

The digital photo frame 9700 is configured to include an operation unit, a terminal for external connection (such as a terminal capable of connecting with various cables such as a USB terminal and a USB cable), a recording medium insertion unit, and the like. Although such a structure may be built in the same surface as the display part, when it is provided in the side surface or the back surface, since design improves, it is preferable. For example, a memory storing memory of image data shot by a digital camera can be inserted into a recording medium insertion section of a digital photo frame to acquire image data, and the acquired image data can be displayed on the display portion 9703.

The digital photo frame 9700 may be configured to transmit and receive information wirelessly. It is also possible to obtain a configuration in which desired image data is acquired and displayed by radio.

12 is a perspective view illustrating an example of a portable computer.

The portable computer shown in FIG. 12 includes an upper case 9301 having a display portion 9303 and a lower case having a keyboard 9304 with the hinge unit connecting the upper case 9301 and the lower case 9302 closed. 9302 can be folded, and it is convenient to carry, and when a user inputs a keyboard, an input operation can be performed by looking at the display part 9303, with the hinge unit open.

The lower case 9302 also has a pointing device 9306 that performs input operations in addition to the keyboard 9304. When the display portion 9303 is a touch input panel, an input operation can also be performed by touching a portion of the display portion. The lower case 9302 has arithmetic functional units such as a CPU and a hard disk. The lower case 9302 also has an external connection port 9305 to which a communication cable conforming to a communication standard of another device, for example, USB is inserted.

The upper case 9301 also has a display portion 9307 that can be slid into the upper case 9301 to accommodate it, and a wide display screen can be realized. In addition, the user may adjust the direction of the screen of the display unit 9307 that may be stored. In addition, when the receivable display part 9307 is a touch input panel, an input operation can be performed by touching a part of the receivable display part.

The display portion 9303 or the display portion 9307 that can be accommodated uses an image display apparatus such as a light emitting display panel such as a liquid crystal display panel, an organic light emitting element, or an inorganic light emitting element.

In addition, the portable computer shown in Fig. 12 has a receiver or the like and can receive television broadcasts and display an image on the display unit. In addition, while the hinge unit connecting the upper case 9301 and the lower case 9302 is closed, the display unit 9307 may be slid to expose the front of the screen and the screen angle may be adjusted so that the user may watch television broadcast. . Since the hinge unit is opened and the display unit 9303 is not displayed and only a circuit for displaying television broadcast is started, it is useful for a portable computer having a limited power consumption and having a minimum power consumption. Do.

(Example 1)

In the present Example, the electrical characteristics of the thin film transistor produced using Embodiment 3 are demonstrated.

First, the manufacturing method of the thin film transistor of this embodiment is demonstrated with reference to FIG. 3 and FIG.

First, a base insulating film (not shown here) was formed on the substrate 101, and a gate electrode 103 was formed on the base insulating film.

Here, the glass substrate (Corning EAGLE XG) was used as the substrate 101.

The gate electrode 103 has a structure in which an aluminum layer is sandwiched by a titanium layer. Specifically, first, a titanium target was sputtered with argon ions to form a first titanium film having a thickness of 50 nm on the underlying insulating film. At this time, the flow rate of argon to be introduced was 20 sccm, the pressure in the processing chamber was 0.1 Pa, the applied voltage was 12 kW, and the temperature was room temperature. Then, the aluminum target was sputtered with argon ions thereon to form an aluminum film having a thickness of 100 nm. At this time, the flow rate of argon to be introduced was 50 sccm, the pressure in the processing chamber was 0.4 Pa, the applied voltage was 4 kW, and the temperature was room temperature. And the titanium target was sputtered with argon ion on it, and the 2nd titanium film of thickness 50nm was formed. The second titanium film was formed in the same manner as the first titanium film. That is, the flow rate of argon to be introduced was 20 sccm, the pressure in the processing chamber was 0.1 Pa, the applied voltage was 12 kW, and the temperature was room temperature.

Next, a resist was applied on the second titanium film, exposed using a first photomask, and then developed to form a mask formed of resist.

Next, an etching process was performed using a mask formed of the resist to form the gate electrode 103. Here, two-step etching was performed using an ICP (Inductively Coupled Plasma) apparatus. That is, ICP power 600W, bias power 250W, boron trichloride was introduced at a flow rate of 60 sccm as the etching gas, chlorine was introduced at a flow rate of 20 sccm, and the first chamber was etched at 1.2 Pa in the process chamber. Carbon tetrafluoride was introduced at a flow rate of 80 sccm as the power 50 W, the pressure 2.0 Pa, and the etching gas, and the second etching was performed at a pressure of 2.0 Pa in the processing chamber. Thereafter, the mask formed of the resist was removed.

Next, after the gate insulating film 105 was formed over the gate electrode 103 and the underlying insulating film, the gate insulating film 105 was subjected to plasma treatment.

Here, as the gate insulating film 105, a silicon nitride oxide film having a thickness of 240 nm was formed by plasma CVD. The deposition of the silicon nitride oxide film is carried out by introducing a source gas with a flow rate of silane of 15 sccm, a flow rate of hydrogen of 200 sccm, a flow rate of nitrogen of 180 sccm, a flow rate of ammonia of 500 sccm, a flow rate of dinitrogen monoxide (N ₂ O) of 100 sccm, Plasma discharge was performed by setting the pressure in the processing chamber to 100 Pa, the RF power source frequency to 13.56 MHz, and the power of the RF power source to 200 W. Further, deposition of the gate insulating film 105 is performed using a parallel plate plasma CVD apparatus, and the upper electrode temperature is set to 200 ° C, the lower electrode temperature is set to 300 ° C, and the gap (gap) between the upper electrode and the lower electrode is set. It was 26 mm.

In the plasma treatment to the formed gate insulating film, the flow rate of dinitrogen monoxide was introduced into the processing chamber at 400 sccm, the pressure in the processing chamber was 60 Pa, the power was 300 W, and plasma discharge was performed for 3 minutes. In addition, the said plasma processing was performed using the parallel plate type plasma processing apparatus, the upper electrode temperature was 200 degreeC, the lower electrode temperature was 300 degreeC, and the space | interval of the upper electrode and the lower electrode was 30 mm.

Next, a seed crystal 107 having a thickness of 5 nm was formed on the gate insulating film 105 by plasma CVD. For seed crystal deposition, source gas was introduced at a flow rate of silane of 2 sccm, flow rate of hydrogen at 750 sccm, flow rate of argon at 750 sccm, pressure in the processing chamber at 3000 Pa, RF power frequency at 13.56 MHz, and power at RF power at 175 W. Plasma discharge was performed. The seed crystals 107 were deposited using a parallel plate plasma CVD apparatus, the temperature of the upper electrode was 200 ° C, the temperature of the lower electrode was 300 ° C, and the gap between the upper electrode and the lower electrode was 7 mm. It was set as.

The structure obtained by the process to here is shown to FIG. 3A.

Subsequently, a microcrystalline semiconductor film 109 having a thickness of 65 nm was formed on the gate insulating film 105 and the seed crystal 107 by plasma CVD. In the deposition of the microcrystalline semiconductor film 109, the source gas was introduced with the flow rate of silane at 1.5 sccm, the flow rate of hydrogen at 750 sccm, the flow rate of argon at 750 sccm, the pressure in the process chamber at 10000 Pa, the RF power supply frequency at 13.56 MHz, and the RF. Plasma discharge was performed with the power of the power supply being 300W. Further, deposition of the microcrystalline semiconductor film 109 is performed using a parallel plate plasma CVD apparatus, the temperature of the upper electrode is set to 200 ° C, the temperature of the lower electrode is set to 300 ° C, and the gap between the upper and lower electrodes is adjusted. It was set to 7 mm.

The structure obtained in this process is shown in FIG. 3B.

Next, a semiconductor film 111 having a thickness of 80 nm was formed on the microcrystalline semiconductor film 109, and an impurity semiconductor film 113 having a thickness of 50 nm was formed on the semiconductor film 111. The semiconductor film 111 and the impurity semiconductor film 113 were formed by depositing by the plasma CVD method.

The deposition of the semiconductor film 111 is performed by introducing a material gas with a flow rate of silane of 25 sccm, a flow rate of 1000 ppm ammonia (hydrogen dilution) of 100 sccm, a flow rate of hydrogen of 650 sccm, a flow rate of argon of 750 sccm, and a pressure in the processing chamber of 1250 Pa. Plasma discharge was performed using RF power frequency of 13.56 MHz and power of RF power of 150 W. The semiconductor film 111 was deposited using a parallel plate plasma CVD apparatus, the upper electrode temperature was set at 200 ° C, the lower electrode temperature was set at 300 ° C, and the gap between the upper electrode and the lower electrode was set at 15 mm. .

As the impurity semiconductor film 113, an amorphous silicon film to which phosphorus was added was formed. The impurity semiconductor film 113 is deposited with a flow rate of silane of 90 sccm, a flow rate of 5% phosphine (silane dilution) of 10 sccm, and a flow rate of hydrogen of 500 sccm. Plasma discharge was performed with a frequency of 13.56 MHz and a power of RF power of 30 W. The impurity semiconductor film was deposited using a parallel plate plasma CVD apparatus, the upper electrode temperature was 200 ° C, the lower electrode temperature was 300 ° C, and the gap between the upper electrode and the lower electrode was 25mm.

Next, after the resist was applied onto the impurity semiconductor film 113, it was exposed using a second photomask and developed to form a mask 115 formed of resist. The structure obtained by the process to here is shown in FIG. 3C.

Next, the microcrystalline semiconductor film 109, the semiconductor film 111, and the impurity semiconductor film 113 are etched using the mask 115 formed of a resist, so that the microcrystalline semiconductor region 117a and the amorphous semiconductor region 117b are etched. The semiconductor laminate 117 and the impurity semiconductor film 121 were formed.

In performing the etching, in this embodiment, an ICP device is used, ICP power 450 W, bias power 100 W, boron trichloride flow rate 36 sccm, carbon tetrafluoride 36 sccm, oxygen 8 sccm, and the pressure in the process chamber is 2 Pa. Etching was performed.

Thereafter, an oxygen plasma treatment is performed to form an oxide film on the side surfaces of the semiconductor laminate 117 and the impurity semiconductor film 121 having the microcrystalline semiconductor region 117a and the amorphous semiconductor region 117b, and then a mask formed of a resist. 115 is removed (not shown).

In the oxygen plasma treatment, the flow rate of oxygen was introduced at 100 sccm, the pressure in the processing chamber was 0.67 Pa, the substrate temperature was -10 ° C, the plasma power was discharged at 2000W and the bias power at 350W.

The structure obtained by the process to here is shown in FIG. 3D.

Next, the gate insulating film 105, the semiconductor laminate 117, and the impurity semiconductor film 121 were covered to form a conductive film 127. The structure obtained by this process is shown to FIG. 5A.

In this embodiment, the conductive film 127 has a structure in which an aluminum layer is sandwiched by a titanium layer, and is formed like the gate electrode 103. However, the thickness of the first titanium film was 50 nm, the thickness of the aluminum film was 200 nm, and the thickness of the second titanium film was 50 nm.

Next, after applying a resist on the conductive film 127, it was exposed using a third photomask and developed to form a mask formed of resist. The conductive film 127 was dry etched using the mask formed of the resist to form the wiring 129a and the wiring 129b. In the above step, the impurity semiconductor film 121 is dry-etched to form a pair of impurity semiconductor films 131a and 131b serving as source and drain regions. In addition, part of the semiconductor laminate 117 was etched.

In this step, using an ICP apparatus, boron trichloride was introduced at a flow rate of 60 sccm as an ICP power of 450 W, a bias power of 100 W, and an etching gas, chlorine was introduced at 20 sccm, and etching was performed at a pressure of 1.9 Pa in the processing chamber.

Next, after removing the mask formed of resist, part of the semiconductor laminate 117 is etched again to form a semiconductor laminate 133 having a microcrystalline semiconductor region 133a and a pair of amorphous semiconductor regions 133b. It was.

In this step, carbon tetrafluoride was introduced at a flow rate of 100 sccm as a source power of 1000 W, a bias power of 50 W, and an etching gas, and etching was performed at a pressure of 0.67 Pa in the processing chamber.

In addition, the semiconductor laminate 117 was etched so that the thickness of the microcrystalline semiconductor region 133a was 50 nm. In addition, in this embodiment, the planar shape of the wirings 129a and 129b serving as the source electrode and the drain electrode is straight.

Next, the surface of the semiconductor laminate 133 was subjected to water plasma treatment to remove impurities remaining on the surface of the semiconductor laminate 133. In this step, water plasma treatment was performed at a power of 1800 W, water vapor was introduced at a flow rate of 300 sccm, and the pressure in the processing chamber was 66.5 Pa.

The structure obtained by the process to here is shown in FIG. 5B.

Next, as the insulating film 137, a silicon nitride film having a thickness of 300 nm was formed. The deposition of the insulating film 137 is performed by introducing a material gas with a flow rate of silane of 20 sccm, a flow rate of ammonia of 220 sccm, a flow rate of nitrogen of 450 sccm, and a flow rate of hydrogen of 450 sccm, a pressure in the processing chamber of 160 Pa, and an RF power supply frequency of 27 MHz. The plasma discharge was performed with the power of the RF power supply set to 200W. The insulating film 137 was deposited using a parallel plate plasma CVD apparatus, the upper electrode temperature was 250 deg. C, the lower electrode temperature was 290 deg. C, and the gap between the upper electrode and the lower electrode was 21 mm.

Next, after applying a resist on the insulating film 137, it was exposed using a fourth photomask and developed to form a mask formed of resist. A portion of the insulating film was dry-etched using the mask formed of the resist to expose the wirings 129a and 129b serving as source and drain electrodes. In addition, part of the insulating film 137 and the gate insulating film 105 were dry-etched to expose the gate electrode 103. Thereafter, the mask formed of resist was removed.

Next, after the conductive film was formed on the insulating film 137, a resist was applied on the conductive film, exposed using a fifth photomask, and developed to form a mask formed of the resist. A portion of the conductive film was wet etched using the mask formed of the resist to form the back gate electrode 139.

Here, as the conductive film, an indium tin oxide having a thickness of 50 nm was formed by the sputtering method, and then the back gate electrode 139 was formed by a wet etching process. Although not shown here, the back gate electrode 139 is connected to the gate electrode 103. Thereafter, the mask formed of resist was removed.

Through the above steps, a dual gate type thin film transistor (denoted as TFT 1) was produced (see FIG. 5C).

13 shows the results of measuring electrical characteristics of the thin film transistor TFT 1 fabricated in this embodiment. The horizontal axis represents the gate voltage Vg, and the vertical axis represents the drain current Id. Here, the electrical characteristics when the gate voltage is applied only to the gate electrode 103 are shown. The field effect mobility was calculated with a channel length of 3.4 mu m, a channel width of 22.1 mu m, a thickness of a gate insulating film of 240 nm, and an average dielectric constant of 5.6 of the thin film transistor of this embodiment.

In addition, the on-current when the drain voltage is 10V and the gate voltage is 15V (Ion), the minimum off-current (Ioff (min)), the off-current when the gate voltage of the minimum off-current -10V (Denoted Ioff), threshold voltage (denoted Vth), S value (denoted S-value), ratio of on current to minimum off current (denoted Ion / Ioff_min), and drain voltage 10V. Table 1 shows the field effect mobility (denoted as FEFE_sat).

The method of forming the microcrystalline semiconductor film from FIG. 13 is formed in two steps to form the microcrystalline semiconductor film after the seed crystal is formed once, and the thin film transistor having good electrical characteristics can be fabricated by setting the pressure at the time of formation to a high pressure. Could.

(Example 2)

In this embodiment, as described in the first embodiment, the seed crystal is formed by using the first condition and then formed into the seed crystal by forming the microcrystalline semiconductor film in two steps of forming the microcrystalline semiconductor film using the second condition. It will be described that the microcrystalline semiconductor film can be formed while filling the gap between the mixed phases.

First, the manufacturing method of the microcrystalline semiconductor film using the method shown in Embodiment 1 is demonstrated.

As in Example 1, a 240 nm thick silicon nitride oxide film was formed on a glass substrate (EAGLE XG manufactured by Corning), and the silicon nitride oxide film was subjected to N ₂ O plasma treatment. Next, a 5 nm thick seed crystal was formed thereon by a plasma CVD method, and then a 25 nm thick microcrystalline semiconductor film was formed on the silicon nitride oxide film and the seed crystal by the plasma CVD method.

In this embodiment, the N ₂ O plasma treatment was performed under the same conditions as in Example 1, and the silicon nitride oxide film, seed crystal, and microcrystalline semiconductor film were formed under the same conditions as in Example 1.

The SEM photograph (magnification 200,000 times) which observed the produced microcrystalline semiconductor film with the scanning electron microscope (SEM) is shown in FIG.

As shown in FIG. 14A, it was confirmed that the mixed grains were dispersed in the seed crystal formed at a pressure of 3000 Pa, and there was a gap between the mixed grains. As shown in FIG. 14B, it was confirmed that the microcrystalline semiconductor film formed at a pressure of 10000 Pa on the silicon nitride film and the seed crystal was in close contact with each other.

Claims (20)

Forming a seed crystal on the insulating film by the plasma CVD method under a first condition in which the flow rate of hydrogen is 50 times or more and 1000 times or less of the deposition gas containing silicon, and the pressure of the processing chamber is larger than 1333 Pa and 13332 Pa or less. step; And
Forming a microcrystalline semiconductor film on the seed crystal by plasma CVD under a second condition in which the flow rate of hydrogen is 100 times or more and 2000 times or less than the deposition gas containing silicon and the pressure of the processing chamber is 1333 Pa or more and 13332 Pa or less. A microcrystalline semiconductor film production method. The method of claim 1,
And the seed crystal comprises an interphase grain comprising an amorphous silicon region and a crystallite which is a single crystal, wherein the interphase grain is provided continuously to the seed crystal. The method of claim 1,
And the seed crystal comprises a material selected from the group consisting of a microcrystalline silicon film, a microcrystalline silicon germanium film, and a microcrystalline germanium film. The method of claim 1,
The deposition gas containing silicon comprises a gas selected from the group consisting of SiH ₄ and Si ₂ H ₆ . The method of claim 1,
A deposition gas containing the hydrogen and the silicon is introduced into the processing chamber. The method of claim 1,
And said seed crystals comprise a plurality of interphase grains each comprising an amorphous silicon region and a single crystal, said interphase grains being dispersed in said seed crystals. The method of claim 1,
A method for producing a microcrystalline semiconductor film, wherein a rare gas is introduced into the processing chamber under the first condition. The method of claim 7, wherein
The rare gas is selected from the group consisting of helium, neon, argon, krypton, and xenon. The method of claim 1,
The method for producing a microcrystalline semiconductor film, wherein a rare gas is introduced into the processing chamber under the second condition. The method of claim 9,
The rare gas is selected from the group consisting of helium, neon, argon, krypton, and xenon. Forming a gate electrode over the substrate;
Forming a gate insulating film on the substrate and the gate electrode;
Forming a seed crystal on the gate insulating film under a first condition;
Forming a microcrystalline semiconductor film on the seed crystals under a second condition;
Forming a semiconductor film including a microcrystalline semiconductor region and an amorphous semiconductor region on the microcrystalline semiconductor film;
Forming a first impurity semiconductor film on the semiconductor film including a microcrystalline semiconductor region and an amorphous semiconductor region;
Etching a portion of the first impurity semiconductor film to form an island-shaped second impurity semiconductor film;
Etching a portion of the seed crystal, a portion of the microcrystalline semiconductor film, and a portion of the semiconductor film including a microcrystalline semiconductor region and an amorphous semiconductor region to form an island-shaped first semiconductor laminate;
Forming wirings on the second impurity semiconductor film that function as source and drain electrodes; And
Etching the second impurity semiconductor film to form a pair of impurity semiconductor films functioning as a source region and a drain region,
Under the first condition, the flow rate of hydrogen is 50 times or more and 1000 times or less of the deposition gas containing silicon, the pressure of the processing chamber is larger than 1333 Pa and 13332 Pa or less,
Under the second condition, the flow rate of hydrogen is 100 times or more and 2000 times or less of the deposition gas containing silicon, and the pressure of the processing chamber is 1333 Pa or more and 13332 Pa or less. The method of claim 11,
After forming the island-shaped first semiconductor laminate and before forming the wirings serving as the source electrode and the drain electrode on the island-shaped first semiconductor laminate, the island-shaped first semiconductor Exposing a side of the laminate to plasma to form a barrier region on the side of the island-shaped first semiconductor laminate. The method of claim 11,
Etching a portion of the island-shaped first semiconductor laminate to form a second semiconductor laminate in which microcrystalline semiconductor regions and a pair of amorphous semiconductor regions are stacked;
Forming an insulating film on the wirings, the pair of impurity semiconductor films, the second semiconductor laminate, and the gate insulating film; And
And forming a back gate electrode over said insulating film. The method of claim 12,
Etching a portion of the island-shaped first semiconductor laminate to form a second semiconductor laminate in which microcrystalline semiconductor regions and a pair of amorphous semiconductor regions are stacked;
Forming an insulating film on the wirings, the pair of impurity semiconductor films, the second semiconductor laminate, and the gate insulating film; And
And forming a back gate electrode over said insulating film. The method of claim 13,
And the gate electrode and the back gate electrode are parallel to each other. The method of claim 14,
And the gate electrode and the back gate electrode are parallel to each other. The method of claim 13,
And the gate electrode and the back gate electrode are connected to each other. The method of claim 14,
And the gate electrode and the back gate electrode are connected to each other. The method of claim 13,
And the back gate electrode is in a floating state. The method of claim 14,
And the back gate electrode is in a floating state.

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