KR20110076505A

KR20110076505A - Method for optical proximity correction of pattern including diagonal direction layout

Info

Publication number: KR20110076505A
Application number: KR1020090133244A
Authority: KR
Inventors: 유민애
Original assignee: 주식회사 하이닉스반도체
Priority date: 2009-12-29
Filing date: 2009-12-29
Publication date: 2011-07-06

Abstract

Optical proximity effect correction method of the pattern including the diagonal layout of the present invention, the first pattern and the third pattern arranged in the vertical direction, the first pattern and the third pattern are connected at a predetermined angle with respect to the vertical axis direction Designing an original layout consisting of a second diagonal pattern having an inclined diagonal shape; The first pattern disposed in the vertical direction by cutting out the oblique second pattern, the third pattern disposed in the vertical direction while overlapping to move by a predetermined width from the first pattern, and the space disposed between the first pattern and the third pattern Modifying with a modified layout comprising; And verifying the modified layout.

Diagonal Layout, OPC, Bridge

Description

Method for optical proximity correction of pattern including diagonal direction layout}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a method for correcting optical proximity effect of a pattern including a diagonal layout.

A photolithography process of transferring a pattern onto a wafer using a photo mask in a process of manufacturing a semiconductor device involves first designing and implementing a layout of a pattern to be transferred onto a photomask. The process of implementing the layout of the target pattern to be transferred onto the wafer on the photomask first designs the layout of the pattern to be transferred. Next, the layout correction process is performed to perform an optical proximity effect correction (OPC) to correct the layout in consideration of the optical proximity effect (OPE) generated in the photolithography process, And transferring to the photomask substrate using electron beam exposure or the like.

On the other hand, as the degree of integration of semiconductor devices increases, the size of patterns is also miniaturized as design rules are reduced. This makes it difficult to implement patterns as designed in the design layout. In particular, when a layout according to a design includes a layout in a direction other than a vertical or horizontal layout, for example, a diagonal layout, the electron beam shape is restricted to the electron beam exposure. It takes time and steps.

FIG. 1 is a diagram schematically illustrating a method of forming a pattern layout including a general diagonal layout.

Referring to FIG. 1, the design layout 100 defines the first zone 101 and the third zone 104 and the first zone 101 and the third zone 104 arranged obliquely while being disposed in the vertical direction. It comprises a second zone 103 arranged in an oblique direction with respect to the side 102 of the first zone 101 while connecting (a). As such, since the design layout 100, which is not aligned in a straight line, is transferred to the wafer as it is, there is a limitation due to the electron beam shape, and thus the optical proximity effect correction (OPC) is performed on the design layout.

The modified layout 120 illustrated in (b) of FIG. 1 is a layout in which the optical proximity effect OPE is corrected for the design layout 100 of (a). Optical proximity effect correction (OPC) is difficult to transfer the oblique layout in which the electron beam shape is disposed in the second zone 103, so that the correction pattern of the fine vertical or horizontal line shape of the second zone 103 is formed. The 135 are proceeding to divide into a fine step shape. Therefore, the correction layout 120 has a layout in which polygonal correction patterns 135 according to the optical proximity effect correction (OPC) are included in the second region 115 in the diagonal direction.

However, when the diagonal layout is modified to produce a fine step shape, there is a problem in that the productivity of the mask decreases due to an increase in mask manufacturing time. Accordingly, when the pattern layout including the diagonal layout is a pattern that does not participate in the operation of the semiconductor device, or the size of the portion to which the pattern is connected is not accurate and serves to connect the two patterns, reducing the mask manufacturing time is required. Required.

The technical problem to be achieved by the present invention is that when the target layout includes a layout in a direction other than the horizontal direction or the vertical direction, an oblique line that can be modified to a layout of a shape that is easy to manufacture a mask by performing optical proximity effect correction (OPC) The present invention provides a method for correcting optical proximity effects of a pattern including a layout of a direction.

In the optical proximity effect correction method of the pattern including the diagonal layout according to the present invention, the first pattern and the third pattern disposed in the vertical direction, the first pattern and the third pattern are connected to each other and are fixed with respect to the vertical axis direction. Designing an original layout comprising a second pattern of diagonally inclined angles; The first pattern disposed in the vertical direction by cutting the diagonal second pattern, the third pattern disposed in the vertical direction while overlapping to move by a predetermined width from the first pattern, and disposed between the first pattern and the third pattern. Correcting with a modified layout including the spaces; And verifying the corrected layout.

In the present invention, the first pattern and the third pattern comprise a line-and-space pattern.

Preferably, the second pattern is cut out and corrected in a vertical direction and a horizontal direction with respect to the vertical axis direction.

The space is preferably arranged in a width that causes a bridge phenomenon that is connected to each other by optical mutual interference between the first pattern and the third pattern in the exposure process.

In the verifying of the corrected layout, it is preferable to inspect the transferred pattern by transferring the corrected layout to a wafer or by using a simulation program.

According to the present invention, when the diagonal layout is difficult to manufacture the mask is included in the target layout, the layout in the diagonal direction is removed, and the diagonal pattern can be easily formed by configuring the pattern in the vertical direction or the horizontal direction. Accordingly, since the pattern can be embodied in an oblique direction that is vulnerable to mask production, productivity can be improved by reducing the mask production time.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

2 is a process flowchart showing a method of correcting optical proximity effects of a pattern including a diagonal layout. 3 to 6 are diagrams for explaining the optical proximity effect correction method of the pattern including the diagonal layout according to an embodiment of the present invention.

2 and 3, an original layout 313 to be transferred onto a wafer is designed (S200). The original layout 313 connects the first pattern 300 and the third pattern 305 disposed in the vertical direction with the first pattern 300 and the third pattern 305 and is constant with respect to the vertical axis C direction. The second pattern 305 has a diagonal shape inclined at an angle. Here, the first pattern 300 and the third pattern 305 are formed of a line-and-space pattern. In addition, the first pattern 300 and the third pattern 305 are not disposed in a straight line but are moved by a predetermined width.

The original layout 313 having the configuration of the first pattern 300, the second pattern 305, and the third pattern 305 is a layout in which diagonal shapes are included in the design, and in particular, the pattern size is not important. When only two patterns are connected to satisfy the characteristics of the device, for example, it may be a layout of a metal wiring or a layout of a dummy pattern.

2 and 4, a correction layout 327 is formed by performing optical proximity effect correction (OPC) on the original layout 313 including the diagonal layout (S210). The optical proximity effect correction may be performed by cutting the oblique second pattern 310 (see FIG. 3) of the original layout 313. The second pattern 310 is cut out in the vertical direction and the horizontal direction with respect to the vertical axis C direction.

The correction layout 327 corrected by the optical proximity effect correction (OPC) is spaced apart from the first pattern 315 and the first pattern 320 arranged in the vertical direction by a predetermined distance, and the third pattern arranged in the vertical direction. And a space 325 disposed between the 320 and the first pattern 315 and the third pattern 320. Here, the first pattern 315 and the third pattern 320 are not disposed on a straight line, but are disposed to move left and right by a predetermined width.

Considering the operation of the optical proximity correction (OPC), as shown in Figure 5, the width (d1) and the first pattern of the space 325 disposed between the first pattern 315 and the third pattern 320 The distance d2 between the 315 and the third pattern 320 while moving left and right by a predetermined width is overlapped. The space 325 disposed between the first pattern 315 and the third pattern 320 is connected to each other by optical mutual interference between the first pattern 320 and the third pattern 320 in an exposure process. bridge) Place it to the width that causes the phenomenon. In this case, a space for making a mask should be maintained. The degree of connection varies depending on the size of the width d1 and the distance d2 of the space 325 disposed between the first pattern 315 and the third pattern 320. Therefore, the optical proximity effect correction (OPC) should be performed and then transferred to the wafer, and then the optical proximity effect correction (OPC) should be verified for proper connection.

2 and 6, a verification step of verifying the accuracy of the modified layout 327 modified by the optical proximity effect correction (OPC) is performed (S220). The step of verifying the correction layout 327 may be performed by actually transferring the correction layout 327 to a pattern on the wafer and inspecting the transferred pattern or by using a simulation program (image, 330). ) Can be checked and corrected by the operator.

In the optical proximity effect correction method of a pattern including a diagonal layout according to the present invention, in the case of forming a pattern in a direction other than the vertical and horizontal directions, in the case of forming a pattern in which the pattern size is not an important element characteristic element, a resist bridge And it is applicable to the case of connecting the pattern using the hole bridge and the case of forming a pattern connected by energy control rather than the connection by optical proximity effect correction. In the case of forming a pattern connected by energy control, when a pattern is connected in a situation where a reticle is already manufactured, a pattern may be formed by adjusting energy of an exposure apparatus while using a modified layout according to the present invention.

1A and 1B are diagrams schematically illustrating a method of forming a pattern layout including a general diagonal layout.

2 is a process flowchart showing a method of correcting optical proximity effects of a pattern including a diagonal layout.

3 to 6 are diagrams for explaining the optical proximity effect correction method of the pattern including the diagonal layout in accordance with an embodiment of the present invention.

Claims

Designing an original layout comprising a first pattern and a third pattern arranged in a vertical direction, and a second pattern of diagonal lines connected to the first pattern and the third pattern and inclined at an angle with respect to the vertical axis direction;

The first pattern disposed in the vertical direction by cutting the diagonal second pattern, the third pattern disposed in the vertical direction while overlapping to move by a predetermined width from the first pattern, and disposed between the first pattern and the third pattern. Correcting with a modified layout including the spaces; And

The optical proximity effect correction method of the pattern including the diagonal layout including the step of verifying the corrected layout.

The method of claim 1,

The first and third patterns are optical proximity effect correction method of the pattern comprising a diagonal layout consisting of a line-and-space pattern.

The method of claim 1,

The second pattern is optical proximity effect correction method of the pattern comprising a diagonal layout to cut and correct in the vertical direction and the horizontal direction with respect to the vertical axis direction.

The method of claim 1,

The space is an optical proximity effect correction method of the pattern comprising a diagonal layout arranged in a width causing a bridge phenomenon connected to each other by mutual light interference between the first pattern and the third pattern in the exposure process. .

The method of claim 1,

The step of verifying the correction layout, the optical proximity effect correction method of the pattern comprising a diagonal layout for inspecting the transferred pattern by transferring the correction layout to the wafer.

The method of claim 1,

The step of verifying the corrected layout, the optical proximity effect correction method of the pattern comprising a diagonal layout to be examined using a simulation program.