KR20090083094A - Resistive memory including nanoparticle and formation method of the same - Google Patents

Resistive memory including nanoparticle and formation method of the same Download PDF

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Publication number
KR20090083094A
KR20090083094A KR1020080009062A KR20080009062A KR20090083094A KR 20090083094 A KR20090083094 A KR 20090083094A KR 1020080009062 A KR1020080009062 A KR 1020080009062A KR 20080009062 A KR20080009062 A KR 20080009062A KR 20090083094 A KR20090083094 A KR 20090083094A
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South Korea
Prior art keywords
dielectric layer
electrode
conductive nanoparticles
resistive memory
forming
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Application number
KR1020080009062A
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Korean (ko)
Inventor
박주철
백인규
심현준
임은경
정재관
조금석
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삼성전자주식회사
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Priority to KR1020080009062A priority Critical patent/KR20090083094A/en
Publication of KR20090083094A publication Critical patent/KR20090083094A/en

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L45/00Solid state devices adapted for rectifying, amplifying, oscillating or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof
    • H01L45/04Bistable or multistable switching devices, e.g. for resistance switching non-volatile memory
    • H01L45/06Bistable or multistable switching devices, e.g. for resistance switching non-volatile memory based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L45/00Solid state devices adapted for rectifying, amplifying, oscillating or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof
    • H01L45/04Bistable or multistable switching devices, e.g. for resistance switching non-volatile memory
    • H01L45/12Details
    • H01L45/122Device geometry
    • H01L45/1233Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices

Abstract

A resistive memory including a switching element and a storage element and a method of manufacturing the same are disclosed. The resistive memory according to the present invention includes a lower electrode; A dielectric layer on the lower electrode, the dielectric layer including a plurality of conductive nanoparticles and storing information according to a change in resistance state; An upper electrode on the dielectric layer; It includes. By controlling the size, position and density of the plurality of conductive nanoparticles, the position and density of the conductive paths that change the resistance of the dielectric layer are adjusted and the distribution of the switching parameters of the data is improved.

Description

Resistive memory using nanoparticles and its manufacturing method {Resistive memory including nanoparticle and formation method of the same}
The present invention relates to a nonvolatile memory and a method of manufacturing the same, and more particularly to a resistive memory and a method of manufacturing the same.
Resistive Random Access Memory (RRAM), which is one of nonvolatile memories, applies a sufficiently high voltage to a normally insulated dielectric to form a filament or conduction path. Based on the concept Once the filament is formed, it is possible to record the data by applying an appropriate voltage to reset the high resistance state (reset the conductive path) or to set the low resistance state (reform the conductive path). Recent data suggest that multiple conductive pathways are involved rather than a single filament.
The dielectric layer serving as a data storage by the change of the resistance value is interposed between the lower electrode and the upper electrode to which a voltage is applied, and is usually composed of a binary transition metal oxide of two components. Resistive memory is advantageous in the manufacture of highly integrated and high density memory because the material used is simple and can be easily applied to the conventional CMOS device manufacturing process.
However, there are some problems to be solved in order to use such transition metal oxide as a memory, and one of them is to improve the distribution of switching parameters (eg, Ron, Roff, Vset, Vreset). The scattering of the switching parameters is believed to be due to sporadic and irregular generation and dissipation of the conductive filament paths and impedes stable switching behavior.
1 is a diagram conceptually illustrating a switching process of a conventional resistive memory. Referring to FIG. 1, the filament 22 is formed in the dielectric layer 20 by applying a filament generating current or voltage to the lower electrode 10 and the upper electrode 30. Thereafter, a reset voltage is applied to the lower electrode 10 and the upper electrode 30 to control the connection of the filament at the interface between the lower electrode 10 or the upper electrode 30 and the dielectric layer 20. That is, in the reset condition, the filament is broken at the interface of the dielectric layer 20 to increase the resistance. In the set condition, the filament is connected at the interface of the dielectric layer 20 to decrease the resistance, thereby causing memory switching.
However, in the conventional resistive memory, the filament path is formed differently according to the cell, and there is a problem that sputtering and breaking at the interface of the generated filament occurs sporadically at an unspecified location. As a result, as shown in FIG. 1, the reliability of the memory may be degraded as the resistance between cells is different or the resistance is different according to three and reset cycles.
An object of the present invention is to provide a resistive memory having improved memory switching characteristics by controlling the formation of filament paths in the dielectric layer.
Another object of the present invention is to provide a method of manufacturing a resistive memory having improved memory switching characteristics by controlling the formation of a filament path in a dielectric layer.
Resistive memory for achieving an object of the present invention includes a switching element and a storage element, the storage element is a lower electrode; A dielectric layer on the lower electrode including a plurality of conductive nanoparticles and storing information according to a change in resistance state; An upper electrode on the dielectric layer; It includes.
Here, the plurality of conductive nanoparticles may be formed at an interface between the upper electrode and the dielectric layer. Alternatively, the plurality of conductive nanoparticles are formed at an interface between the lower electrode and the dielectric layer. Alternatively, the plurality of conductive nanoparticles may be formed at an interface between the upper electrode and the dielectric layer and at an interface between the lower electrode and the dielectric layer. In each case, the conductive layer may further include a plurality of conductive nanoparticles.
The plurality of conductive nanoparticles may be formed in the dielectric layer.
The plurality of conductive nanoparticles inside the dielectric layer may be formed in a single layer, or the plurality of conductive nanoparticles in the dielectric layer may be formed in a plurality of layers.
The dielectric layer of the resistive memory may comprise a transition metal oxide. At this time, the transition metal oxide may include an oxide of Ni, Nb, Ti, Zr, Hf, Co, Fe, Cu, Zn or Cr.
The plurality of conductive nanoparticles may include a noble metal, and the noble metal may include gold (Au), silver (Ag), platinum (Pt), tantalum (Ta), palladium (Pd), ruthenium (Ru), and iridium (Ir). ), Osmium (Os) or rhodium (Rh).
The plurality of conductive nanoparticles may have a size of 10 μs to 200 μs.
The upper electrode or the lower electrode may include iridium (Ir), platinum (Pt), ruthenium (Ru), tungsten (W), titanium nitride (TiN) or polycrystalline silicon.
The switching element of the resistive memory may include a transistor or a diode.
According to another aspect of the present invention, there is provided a method of manufacturing a resistive memory including a switching element and a storage element; Forming a dielectric layer on the lower electrode, the dielectric layer including a plurality of conductive nanoparticles and storing information according to a change in resistance state; And forming an upper electrode over the dielectric layer.
The dielectric layer may include a transition metal oxide.
The forming of the dielectric layer may include forming a plurality of conductive nanoparticles; And forming a transition metal oxide layer to cover the plurality of conductive nanoparticles.
Alternatively, forming the dielectric layer may include forming a transition metal oxide layer; And forming a plurality of conductive nanoparticles on the transition metal oxide layer.
Alternatively, forming the dielectric layer comprises forming a first transition metal oxide layer; Forming a plurality of conductive nanoparticles on the transition metal oxide layer; And forming a second transition metal oxide layer to cover the plurality of conductive nanoparticles. It may include.
By adjusting the size, position and density of the conductive nanoparticles can be formed by adjusting the position, density of the filament formed in the dielectric layer. As the filament is formed by adjusting the position and density of the filament, switching parameters (eg, R on , R off , V set , and V reset ) can be adjusted. In addition, since the connection or disconnection of the filament with the lower electrode or the upper electrode at the time of switching, that is, the set and reset occurs regularly through the conductive nanoparticles, it is possible to improve the distribution of the set and reset voltages. Furthermore, the reset current which is currently a problem can be reduced.
Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided so that the disclosure may be made thorough and complete, and to fully convey the spirit of the present invention to those skilled in the art. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Like numbers refer to like elements throughout.
2 is a diagram conceptually illustrating a switching process of a resistive memory according to an embodiment of the present invention. The storage element of the resistive memory of FIG. 2 includes a dielectric layer 120 that stores information between a lower electrode 110 and an upper electrode 130 according to a change in resistance state. A plurality of conductive nanoparticles 122 are formed at the interface between the dielectric layer 120 and the upper electrode 130. In the set state, the filament 124, which is a conductive path in the dielectric layer 120, is connected to the conductive nanoparticles 122, and in the reset state, the filament 124 in the dielectric layer 120 is disconnected from the conductive nanoparticles 122. . The conductive nanoparticle 122 serves as a nucleus for generating the filament 124 in the dielectric layer 120. In addition, the conductive nanoparticles 122 are at the point where the filament 124 is connected to and disconnected from the upper electrode 130 in the reset state. Third, the filament 124 is connected to or disconnected from the upper electrode 130 through the conductive nanoparticles 122 at the interface between the dielectric layer 120 and the upper electrode 130 in the reset state, thereby reducing the resistance of the dielectric layer 120. You can change the data and save it.
The dielectric layer 120 may be made of a transition metal oxide of two components, and may be made of, for example, Ni, Nb, Ti, Zr, Hf, Co, Fe, Cu, Zn, or Cr oxide. The filament 124 is believed to be formed from the transition metal or lattice defects that make up the transition metal oxide. The conductive nanoparticles 122 may be made of a noble metal, for example, gold (Au), silver (Ag), platinum (Pt), tantalum (Ta), palladium (Pd), ruthenium (Ru) , Iridium (Ir), osmium (Os) or rhodium (Rh). The size of the conductive nanoparticles 122 may have a diameter in the range of 10 μs to 200 μs. The lower electrode 110 or the upper electrode 130 may be made of Ir, Pt, Ru, W, TiN, or polycrystalline silicon.
In the embodiment of FIG. 2, the plurality of conductive nanoparticles are formed at the interface between the dielectric layer and the upper electrode, but in another embodiment, the plurality of conductive nanoparticles may be formed at the interface between the dielectric layer and the lower electrode. Third, in the reset state, through the conductive nanoparticles at the interface between the dielectric layer and the lower electrode, the filament is connected to or disconnected from the lower electrode, thereby changing the resistance of the dielectric layer to store data. In another embodiment, the plurality of conductive nanoparticles may be simultaneously formed at the interface between the lower electrode and the dielectric layer and at the interface between the dielectric layer and the upper electrode.
3 is a diagram illustrating a case where conductive nanoparticles are formed of a plurality of layers in a dielectric layer. Referring to FIG. 3, since the filament 224 is formed along the conductive nanoparticles 222, a path in which the filament 224 is formed may be specified by adjusting the position of the conductive nanoparticles 222. In FIG. 3, reference numeral 210 is a lower electrode, 220 is a dielectric layer, and 230 is an upper electrode. Furthermore, the conductive nanoparticles 222 may be further included at the interface with the upper electrode or the interface with the lower electrode.
4 is a view comparing the case where the sizes of the conductive nanoparticles in the dielectric layer are different. The size of the conductive nanoparticles 322a of FIG. 4A is larger than that of the conductive nanoparticles 322b of FIG. 4B, and the larger the size of the conductive nanoparticles is connected to one conductive nanoparticle. It is believed that there will be many paths of filaments formed. In FIG. 4, reference numeral 310 is a lower electrode, 320 is a dielectric layer, 324 is a filament, and 330 is an upper electrode.
In another embodiment, a plurality of conductive nanoparticles may be formed in a single layer in the dielectric layer. In another embodiment, a plurality of conductive nanoparticles may be formed in the interface between the bottom electrode and the dielectric layer and / or in the interface and dielectric layer between the dielectric layer and the top electrode. In this case, the plurality of conductive nanoparticles in the dielectric layer may be formed of a single layer or a plurality of layers.
The size, position, and density of the conductive nanoparticles can be variously controlled, as illustrated above. By controlling the size, position and density of the conductive nanoparticles, the location and density of the filaments formed in the dielectric layer can be improved to reduce the dispersion of the dielectric layer resistance at the time of reset and the set of the resistive memory. Can be.
5 is a flowchart illustrating a method of forming a storage device in which conductive nanoparticles are formed between a lower electrode and a dielectric layer according to an exemplary embodiment of the present invention. Referring to FIG. 5, first, a lower electrode is formed (S110), and a plurality of conductive nanoparticles are formed (S120). After forming a dielectric layer formed of a transition metal oxide (S130), an upper electrode is formed (S140). The transition metal oxide may be bicomponent.
6 is a flowchart illustrating a method of forming a storage device in which conductive nanoparticles are formed between a dielectric layer and an upper electrode according to another exemplary embodiment of the present invention. Referring to FIG. 6, first, a lower electrode is formed (S210), and a dielectric layer formed of a transition metal oxide is formed (S220). And after forming a plurality of conductive nanoparticles (S230), to form an upper electrode (S240).
FIG. 7 is a flowchart illustrating a method of sequentially forming a storage device in which conductive nanoparticles are formed at an interface between a lower electrode and a dielectric layer and at an interface between the dielectric layer and the upper electrode according to another exemplary embodiment of the present invention. Referring to FIG. 7, first, a lower electrode is formed (S310), a plurality of conductive nanoparticles are formed (S320), and a dielectric layer formed of a two-component transition metal oxide is formed (S330). After again forming a plurality of conductive nanoparticles (S340), to form an upper electrode (S350).
8 is a flowchart illustrating a method of sequentially forming a storage device in which conductive nanoparticles are formed of a plurality of layers in a dielectric layer according to another embodiment of the present invention. Referring to FIG. 8, first, a lower electrode is formed (S410). In addition, a thin dielectric layer formed of a two-component transition metal oxide is formed (S420), and a plurality of conductive nanoparticles are formed (S430). In order to form the conductive nanoparticles in the desired number of layers, the steps S420 and S430 are repeated by the desired number of layers. After forming a thin dielectric layer formed of a bicomponent transition metal oxide (S440), an upper electrode is formed (S450). In this case, in order to add conductive nanoparticles to the interface between the lower electrode and the dielectric layer, a step of forming the conductive nanoparticles between the lower electrode forming step S410 and the dielectric layer forming step 420 may be added. Alternatively, in order to add conductive nanoparticles to the interface between the dielectric layer and the upper electrode, a step of forming the conductive nanoparticles between the dielectric layer forming step S440 and the upper electrode forming step S450 may be added. Also, conductive nanoparticles may be formed between the lower electrode and the dielectric layer, inside the dielectric layer, and between the dielectric layer and the upper electrode. On the other hand, it is a matter of course that the conductive nanoparticles can be formed in a single layer inside the dielectric layer.
As described in the above embodiments, the size, location and density of the conductive nanoparticles may be adjusted to control the location and density of the filaments formed in the dielectric layer. The switching parameters (eg Ron, Roff, Vset, Vreset) can be adjusted by forming the filament by adjusting its position and density. In addition, since the connection or disconnection with the lower electrode or the upper electrode of the filament during the set, reset occurs regularly through the conductive nanoparticles, it is possible to improve the distribution of the set, reset voltage. Furthermore, it is expected that the reset current, which is currently a problem, can be reduced.
Although the embodiments of the present invention have been described in detail above, the present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes without departing from the technical spirit of the present invention are made. It will be apparent to one of ordinary skill in the art that this is possible.
1 is a diagram conceptually illustrating a switching process of a conventional resistive memory.
2 is a diagram conceptually illustrating a switching process of a resistive memory according to an embodiment of the present invention.
3 is a diagram illustrating a case where conductive nanoparticles are formed of a plurality of layers in a dielectric layer.
4 is a view comparing cases where the sizes of the conductive nanoparticles in the dielectric layer are different.
5 is a flowchart sequentially illustrating a method of forming a storage element of a resistive memory according to an embodiment of the present invention.
6 is a flowchart illustrating a method of forming a storage device of a resistive memory according to another exemplary embodiment of the present invention.
7 is a flowchart sequentially illustrating a method of forming a storage element of a resistive memory according to another embodiment of the present invention.
8 is a flowchart sequentially illustrating a method of forming a storage device of a resistive memory according to another exemplary embodiment of the present invention.

Claims (22)

  1. In a resistive memory comprising a switching element and a storage element, the storage element is
    Lower electrode;
    A dielectric layer on the lower electrode, the dielectric layer including a plurality of conductive nanoparticles and storing information according to a change in resistance state; And
    An upper electrode over the dielectric layer; Resistive memory comprising a.
  2. The resistive memory of claim 1, wherein the plurality of conductive nanoparticles are formed at an interface between the upper electrode and the dielectric layer.
  3. The resistive memory of claim 1, wherein the plurality of conductive nanoparticles are formed at an interface between the lower electrode and the dielectric layer.
  4. The resistive memory of claim 1, wherein the plurality of conductive nanoparticles are formed at an interface between the upper electrode and the dielectric layer and at an interface between the lower electrode and the dielectric layer.
  5. The resistive memory of claim 1, wherein the plurality of conductive nanoparticles are formed in the dielectric layer.
  6. The resistive memory of claim 2, 3, or 4, further comprising a plurality of conductive nanoparticles inside the dielectric layer.
  7. The resistive memory of claim 5, wherein the plurality of conductive nanoparticles inside the dielectric layer are formed in a single layer.
  8. The resistive memory of claim 6, wherein the plurality of conductive nanoparticles inside the dielectric layer are formed in a single layer.
  9. 6. The resistive memory of claim 5, wherein the plurality of conductive nanoparticles inside the dielectric layer are formed of a plurality of layers.
  10. The resistive memory of claim 6, wherein the plurality of conductive nanoparticles inside the dielectric layer are formed of a plurality of layers.
  11. The resistive memory of claim 1, wherein the dielectric layer comprises a transition metal oxide.
  12. 12. The resistive memory of claim 11, wherein the transition metal oxide comprises an oxide of Ni, Nb, Ti, Zr, Hf, Co, Fe, Cu, Zn or Cr.
  13. The resistive memory of claim 1, wherein the plurality of conductive nanoparticles comprise a noble metal.
  14. The method of claim 13, wherein the precious metal is gold (Au), silver (Ag), platinum (Pt), tantalum (Ta), palladium (Pd), ruthenium (Ru), iridium (Ir), osmium (Os) or rhodium Resistive memory comprising (Rh).
  15. The resistive memory of claim 1, wherein the plurality of conductive nanoparticles have a size of about 10 μs to about 200 μs.
  16. The resistive memory of claim 1, wherein the upper electrode or the lower electrode comprises iridium (Ir), platinum (Pt), ruthenium (Ru), tungsten (W), titanium nitride (TiN), or polycrystalline silicon.
  17. The resistive memory of claim 1, wherein the switching device comprises a transistor or a diode.
  18. In the method of manufacturing a resistive memory comprising a switching element and a storage element,
    Forming a lower electrode;
    Forming a dielectric layer on the lower electrode, the dielectric layer including a plurality of conductive nanoparticles and storing information according to a change in resistance state; And
    Forming an upper electrode over said dielectric layer.
  19. 19. The method of claim 18 wherein the dielectric layer comprises a transition metal oxide.
  20. 19. The method of claim 18, wherein forming the dielectric layer
    Forming a plurality of conductive nanoparticles;
    Forming a transition metal oxide layer to cover the plurality of conductive nanoparticles.
  21. 19. The method of claim 18, wherein forming the dielectric layer
    Forming a transition metal oxide layer;
    And forming a plurality of conductive nanoparticles on the transition metal oxide layer.
  22. 19. The method of claim 18, wherein forming the dielectric layer
    Forming a first transition metal oxide layer;
    Forming a plurality of conductive nanoparticles on the transition metal oxide layer;
    Forming a second transition metal oxide layer to cover the plurality of conductive nanoparticles; Method of manufacturing a resistive memory comprising a.
KR1020080009062A 2008-01-29 2008-01-29 Resistive memory including nanoparticle and formation method of the same KR20090083094A (en)

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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102244193A (en) * 2010-05-13 2011-11-16 复旦大学 Ruthenium (Ru)-doped tantalum oxide based resistive memory and preparation method thereof
KR101118755B1 (en) * 2010-02-08 2012-03-13 고려대학교 산학협력단 Multi-bit nonvolatile memory device and menufacturing method of the same
US8264866B2 (en) 2009-09-24 2012-09-11 Kabushiki Kaisha Toshiba Nonvolatile memory device and method for manufacturing same
KR20130060089A (en) * 2011-11-29 2013-06-07 에스케이하이닉스 주식회사 Variable resistor, non-volatile memory device using the same, and method of fabricating thereof
KR20130077504A (en) * 2011-12-29 2013-07-09 에스케이하이닉스 주식회사 Resistance variable memory device and method for fabricating the same
KR20130107288A (en) * 2010-08-23 2013-10-01 크로스바, 인크. Improved device switching using layered device structure
US8581364B2 (en) 2010-02-08 2013-11-12 Samsung Electronics Co., Ltd. Resistance memory devices and methods of forming the same
CN104835909A (en) * 2014-02-11 2015-08-12 力晶科技股份有限公司 Resistive random access memory
CN104979469A (en) * 2014-04-14 2015-10-14 华邦电子股份有限公司 Memory element and formation method thereof
CN109360887A (en) * 2018-09-18 2019-02-19 南京工业大学 A kind of controllable resistance-variable storing device of shift voltage and preparation method thereof

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8264866B2 (en) 2009-09-24 2012-09-11 Kabushiki Kaisha Toshiba Nonvolatile memory device and method for manufacturing same
US8581364B2 (en) 2010-02-08 2013-11-12 Samsung Electronics Co., Ltd. Resistance memory devices and methods of forming the same
KR101118755B1 (en) * 2010-02-08 2012-03-13 고려대학교 산학협력단 Multi-bit nonvolatile memory device and menufacturing method of the same
CN102244193A (en) * 2010-05-13 2011-11-16 复旦大学 Ruthenium (Ru)-doped tantalum oxide based resistive memory and preparation method thereof
KR20130107288A (en) * 2010-08-23 2013-10-01 크로스바, 인크. Improved device switching using layered device structure
KR20130060089A (en) * 2011-11-29 2013-06-07 에스케이하이닉스 주식회사 Variable resistor, non-volatile memory device using the same, and method of fabricating thereof
KR20130077504A (en) * 2011-12-29 2013-07-09 에스케이하이닉스 주식회사 Resistance variable memory device and method for fabricating the same
CN104835909A (en) * 2014-02-11 2015-08-12 力晶科技股份有限公司 Resistive random access memory
CN104979469A (en) * 2014-04-14 2015-10-14 华邦电子股份有限公司 Memory element and formation method thereof
CN109360887A (en) * 2018-09-18 2019-02-19 南京工业大学 A kind of controllable resistance-variable storing device of shift voltage and preparation method thereof

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