KR20090064709A - Ｌｄｐｃ 부호의 패리티 검사 행렬 생성 장치 및 그방법과, 그를 이용한 ｌｄｐｃ 부/복호화 장치 - Google Patents

Ｌｄｐｃ 부호의 패리티 검사 행렬 생성 장치 및 그방법과, 그를 이용한 ｌｄｐｃ 부/복호화 장치 Download PDF

Info

Publication number
KR20090064709A
KR20090064709A KR1020070132008A KR20070132008A KR20090064709A KR 20090064709 A KR20090064709 A KR 20090064709A KR 1020070132008 A KR1020070132008 A KR 1020070132008A KR 20070132008 A KR20070132008 A KR 20070132008A KR 20090064709 A KR20090064709 A KR 20090064709A
Authority
KR
South Korea
Prior art keywords
parity check
check matrix
basic
parity
matrix
Prior art date
Application number
KR1020070132008A
Other languages
English (en)
Korean (ko)
Inventor
오종의
윤찬호
유철희
이석규
Original Assignee
한국전자통신연구원
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 한국전자통신연구원 filed Critical 한국전자통신연구원
Priority to KR1020070132008A priority Critical patent/KR20090064709A/ko
Priority to PCT/KR2008/003197 priority patent/WO2009078514A1/fr
Publication of KR20090064709A publication Critical patent/KR20090064709A/ko

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/618—Shortening and extension of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
    • H03M13/6393—Rate compatible low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)
KR1020070132008A 2007-12-17 2007-12-17 Ｌｄｐｃ 부호의 패리티 검사 행렬 생성 장치 및 그방법과, 그를 이용한 ｌｄｐｃ 부/복호화 장치 KR20090064709A (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020070132008A KR20090064709A (ko) 2007-12-17 2007-12-17 Ｌｄｐｃ 부호의 패리티 검사 행렬 생성 장치 및 그방법과, 그를 이용한 ｌｄｐｃ 부/복호화 장치
PCT/KR2008/003197 WO2009078514A1 (fr) 2007-12-17 2008-06-09 Appareil et procede de creation de matrice de controle de parite pour code ldpc et appareil de codage/decodage ldpc associe

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020070132008A KR20090064709A (ko) 2007-12-17 2007-12-17 Ｌｄｐｃ 부호의 패리티 검사 행렬 생성 장치 및 그방법과, 그를 이용한 ｌｄｐｃ 부/복호화 장치

Publications (1)

Publication Number Publication Date
KR20090064709A true KR20090064709A (ko) 2009-06-22

Family

ID=40795622

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070132008A KR20090064709A (ko) 2007-12-17 2007-12-17 Ｌｄｐｃ 부호의 패리티 검사 행렬 생성 장치 및 그방법과, 그를 이용한 ｌｄｐｃ 부/복호화 장치

Country Status (2)

Country Link
KR (1) KR20090064709A (fr)
WO (1) WO2009078514A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8645810B2 (en) 2011-07-31 2014-02-04 Sandisk Technologies Inc. Fast detection of convergence or divergence in iterative decoding
CN105811996B (zh) 2014-12-30 2019-12-06 华为技术有限公司 一种基于准循环ldpc的数据处理方法及系统
US10509603B2 (en) 2016-07-29 2019-12-17 Western Digital Technologies, Inc. Hierarchical variable code rate error correction coding
WO2018084732A1 (fr) * 2016-11-01 2018-05-11 Huawei Technologies Co., Ltd Codes ldpc pour schémas de harq à redondance incrémentielle (ir-harq)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100550414B1 (ko) * 2002-12-24 2006-02-08 한국전자통신연구원 하이브리드 재전송 시스템에서 ｌｄｐｃ 부호를 사용하는인코딩 장치 및 디코딩 장치
KR100659266B1 (ko) * 2004-04-22 2006-12-20 삼성전자주식회사 다양한 코드율을 지원하는 저밀도 패러티 검사 코드에 의한데이터 송수신 시스템, 장치 및 방법
KR20050118056A (ko) * 2004-05-12 2005-12-15 삼성전자주식회사 다양한 부호율을 갖는 Ｂｌｏｃｋ ＬＤＰＣ 부호를 이용한이동 통신 시스템에서의 채널부호화 복호화 방법 및 장치

Also Published As

Publication number Publication date
WO2009078514A1 (fr) 2009-06-25

Similar Documents

Publication Publication Date Title
KR100833515B1 (ko) 가변 정보 길이 및 가변 부호율을 가진 ｌｄｐｃ 부호의패리티 검사 행렬 생성 방법, 부/복호화 방법 및 이를이용하는 장치
KR101789959B1 (ko) 구조적 ldpc의 인코딩 방법, 디코딩 방법, 인코딩 장치 및 디코딩 장치
KR101611169B1 (ko) 통신/방송 시스템에서 데이터 송수신 장치 및 방법
KR101502623B1 (ko) 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널부호/복호 방법 및 장치
CN101073205B (zh) 低密度奇偶校验编码器和解码器以及低密度奇偶校验编码和解码方法
JP5612699B2 (ja) 通信システムにおけるデータ送受信方法及び装置
WO2011062111A1 (fr) Procédé et dispositif de correction d'erreurs, et système de communication les utilisant
CN108988869B (zh) 一种确定校验矩阵的方法及装置、计算机存储介质
KR20190008335A (ko) 구조화된 ldpc의 부호화 및 복호화 방법 및 장치
US20100269011A1 (en) Apparatus and method for decoding low density parity check code using prototype matrix
CN102142928B (zh) 交织、解交织外码编码输出码字的方法和交织、解交织器
KR20110065393A (ko) 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널 부호화/복호화 방법 및 장치
KR20110123637A (ko) 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널 부호/복호 방법 및 장치
JP2010279013A (ja) Ｌｄｐｃ符号の符号化
RU2743857C1 (ru) Способ и оборудование проектирования для квазициклического разреженного контроля по четности
KR101077552B1 (ko) 복수의 기본 패리티 검사행렬을 이용한 저밀도 패리티 검사부호의 복호화 장치 및 그 방법
JP4832447B2 (ja) チャネルコードを用いた復号化装置及び方法
KR101503653B1 (ko) 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널 부호화/복호화 방법 및 장치
KR20090064709A (ko) Ｌｄｐｃ 부호의 패리티 검사 행렬 생성 장치 및 그방법과, 그를 이용한 ｌｄｐｃ 부/복호화 장치
US11190210B2 (en) Method for encoding based on parity check matrix of LDPC code in wireless communication system and terminal using this
KR102329573B1 (ko) 송신 장치 및 그의 신호 처리 방법
CN108270448B (zh) 准循环低密度奇偶校验编码方法及装置
WO2008069460A1 (fr) Procédé de génération d'une matrice de contrôle de parité, procédé de codage/décodage pour un code de contrôle de parité à faible densité à longueur d'informations variable et à vitesse de codage variable, appareil utilisant ce dernier
KR20170060574A (ko) 통신 또는 방송 시스템에서 채널 부호화/복호화 방법 및 장치
KR20080075591A (ko) 순환 행렬을 이용한 리차드슨 엘디피씨 부호화 알고리즘기반의 고속 부호화 방법

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E902 Notification of reason for refusal
E601 Decision to refuse application