KR20090019633A - Electro-luminescent pixel and display panel and device having the same - Google Patents

Abstract

An electroluminescence pixel and display panel and device having the same are provided to accurately answer to the pixel driving signal because the current flowing in the electroluminescent device is controlled by the pixel driving signal. The electroluminescence pixel is prepared. The first voltage line delivers the first potential voltage. The second voltage line delivers the second potential voltage and the reference potential voltage alternately. The electroluminescent device is connected between the first voltage line and the reference node. The first switch device controls the current amount flowing from the second voltage line to the reference node. The second switch device switches the pixel driving signal to be supplied to the control node from the data line. The capacitor(Cst) is connected between the control node and the reference node. The third switch device is connected to the first switch device in parallel and responses the scan signal.

Description

Electroluminescent Pixel and Display Panel and Device having the same}

The present invention relates to an electroluminescent display device using an electroluminescent element.

Recently, various flat panel display devices that can reduce weight and volume, which are disadvantages of cathode ray tubes, have been developed. Such a flat panel display device includes a liquid crystal display device, a field emission display device, a plasma display device, an electroluminescence display device, and the like. have. Among these flat panel display devices, the electroluminescent display device is classified into a self-luminous type display device which emits light by itself together with the plasma display device and the field emission display device.

In the electroluminescent display, a fluorescent material is excited by a combination of electrons and holes, and light is emitted from the excited fluorescent substance molecules, thereby displaying an image corresponding to a video signal. The electroluminescent display is classified into an organic electroluminescent display and an organic electroluminescent display according to the fluorescent material used. The inorganic electroluminescent display requires a high voltage of 100 to 200 V, while the organic electroluminescent display is driven by a low voltage of about 5 to 20 V. In addition, the organic light emitting display device has a wide viewing angle, high-speed response characteristics, high contrast ratio, and the like. In this respect, the organic light emitting display device is attracting attention as a next generation display device.

Furthermore, the organic light emitting display device is classified into a passive matrix driving method and an active matrix driving method according to a driving method. In the passive driving type organic light emitting display device, the pixels emit light by a predetermined period (that is, one horizontal synchronization signal) by one line by a sequential scan operation of a plurality of gate lines. For this reason, in the organic light emitting display device of the passive matrix driving method, since the light emission period of the pixel is short, it is difficult to realize sufficient luminance, uniformity of luminance, and high contrast ratio. On the contrary, in the active matrix driving type organic light emitting display device, each pixel includes a thin film transistor and a capacitor to continuously emit light during a frame period. Accordingly, the organic EL display device of the active matrix driving method enables the realization of sufficient luminance, uniform luminance, and high contrast ratio. Due to these advantages, the organic light emitting display device of the active matrix driving method has been in the spotlight.

However, continuous driving of the organic EL device shortens the life of the organic EL display device as well as the organic EL device. In addition, the continuous driving of the organic EL device results in degradation of the organic EL device. In addition, the driving voltage which is commonly supplied to all the pixels is inevitably changed due to the characteristics of impedance and scan driving on the transmission line. As a result, a deviation occurs in the driving voltage supplied to each of the pixels. The degradation of the organic electroluminescent element and the deviation of the pixel driving voltage prevent the organic electroluminescent pixel from accurately responding to the pixel driving signal. For this reason, the luminance in the organic electroluminescent display panel is uneven, and the quality of the image displayed by the organic electroluminescent display is inevitably deteriorated.

An object of an embodiment of the present invention is to provide an electroluminescent pixel suitable for stable and accurate response to a pixel driving signal.

Another object of the present invention is to provide an electroluminescent display panel suitable for generating uniform luminance.

Another object of the present invention is to provide an electroluminescent display device and a driving method thereof suitable for improving the image quality of an image.

According to an embodiment of the present invention, an EL pixel includes: a first voltage line transferring a first potential voltage; A second voltage line alternately transferring a second potential voltage and a reference potential voltage; An electroluminescent element connected between said first voltage line and a reference node; A first switch element for controlling an amount of current flowing from the second voltage line to the reference node in response to the voltage on the control node; A second switch element for switching a pixel driving signal to be supplied to the control node from a data line in response to a scan signal on a gate line; And a capacitor connected between the control node and the reference node.

The electroluminescent pixel may further include a third switch element connected in parallel with the first switch element and responsive to the scan signal.

The scan signal will be enabled in the period during which the reference potential voltage is supplied to the second voltage line.

The reference potential voltage will have a voltage level that is approximately equal to the first reference potential voltage and lower than the second potential voltage.

In another embodiment, an EL display panel includes: a plurality of gate lines; A plurality of data lines arranged to intersect the gate lines; A first voltage line carrying a first potential voltage; A second voltage line alternately transferring a second potential voltage and a reference potential voltage; And a plurality of electroluminescent pixels commonly connected to the first and second voltage lines and connected to the data line and the gate line. Each of the electroluminescent pixels may include an electroluminescent element connected between the first voltage line and a reference node; A first switch element for controlling an amount of current flowing from the second voltage line to the reference node in response to the voltage on the control node; A second switch element for switching a pixel driving signal to be supplied from the data line to the control node in response to a scan signal on the gate line; And a capacitor connected between the control node and the reference node.

The EL display device according to another embodiment of the present invention is connected to the first and second voltage lines in common, and responds to the corresponding gate line among the plurality of gate lines and the corresponding data line among the plurality of data lines, respectively. A plurality of electroluminescent pixels, each of the electroluminescent pixels connected between the first voltage line and the reference node, and an amount of current flowing from the second voltage line to the reference node in response to a voltage on a control node; A first switch element for controlling, a second switch element for switching a pixel drive signal to be supplied from the data line to the control node in response to a scan signal on the gate line, and a capacitor connected between the control node and the reference node An electroluminescent display panel composed of; A gate driver scanning the gate lines; A data driver supplying pixel driving signals to the data lines; A voltage generator supplying the first potential voltage to the first voltage line; And a swing voltage generator configured to alternately supply the reference potential voltage and the second potential voltage to the second voltage line.

The gate driver will sequentially scan the gate lines during the period when the reference potential voltage is supplied to the second voltage line.

The swing voltage generator will supply the reference potential voltage to the second voltage line for a period corresponding to 10-50% of the frame period.

In another embodiment, a method of driving an EL display device includes supplying a first potential voltage to the EL pixels on the display panel; Supplying a reference potential voltage to the electroluminescent pixels; Writing a pixel driving signal to each of the electroluminescent pixels; And supplying a second potential voltage to the electroluminescent pixels instead of the reference potential voltage so that each of the electroluminescent pixels emits light corresponding to the voltage of the pixel driving signal.

According to the above configuration, the electroluminescent pixel according to the embodiment of the present invention causes the pixel driving signal to be charged based on the reference potential voltage so as to compensate for variations in the threshold voltage and the driving voltage of the electroluminescent element during light emission. Because of this voltage compensation, the current flowing through the EL device is controlled only by the pixel driving signal, so that the light emission characteristic of the EL device can accurately respond to the pixel driving signal Vds. The electroluminescent display panel including the electroluminescent pixel has a constant luminance characteristic that accurately responds only to the pixel driving signal even when the threshold voltage and the driving voltage of the electroluminescent element change. In addition, since the electroluminescent element is turned off at least during the charging period of the pixel driving signal, the electroluminescent pixel and the display panel and the device including the electroluminescent pixel may be driven in an impulse manner to reduce even motion blur. As a result, the EL display panel and the EL display device according to the present invention can provide a good image.

Other objects, other features, and other advantages of the present invention in addition to the above objects will become apparent from the detailed description of the embodiments associated with the accompanying drawings.

Before describing the embodiments of the present invention, the organic electroluminescent pixel of the related art arranged in the active matrix organic electroluminescent display panel will be described. 1 is a circuit diagram illustrating in detail an organic electroluminescent pixel of the related art. Referring to FIG. 1, an organic electroluminescent pixel of the related art includes a first thin film transistor MN1 for controlling an amount of current flowing through an organic electroluminescent element OLED connected to a high potential voltage line HVL. The first thin film transistor MN1 adjusts the amount of current flowing from the cathode electrode of the organic EL device toward the low potential voltage line LVL based on the voltage level on the control node CN. The high potential voltage VDD of about 5 to 15 V is supplied to the high potential voltage line HVL, and the base voltage (ie, "0 V") is supplied to the low potential voltage line LVL. As the voltage supplied from the control node CN to the gate electrode of the first thin film transistor MN1 increases, the drain of the organic EL device OLED and the first thin film transistor MN1 is discharged from the high potential voltage line HVL. The amount of current flowing toward the low potential voltage line LVL via the electrode and the source electrode increases. As the amount of current flowing through itself increases, the organic light emitting diode OLED emits a lot of light.

The organic electroluminescent pixel of FIG. 1 includes a second thin film transistor MN2 for switching the pixel driving signal Vds to be supplied to the control node CN from the data line DL, and the control node CN and the low potential voltage. A storage capacitor Cst is connected between the lines LVL. In the second thin film transistor MN2, when the scan signal SCN on the gate line GL is enabled (that is, has a high logic), the pixel driving signal Vds on the data line DL is controlled. To be supplied to (CN). On the other hand, when the scan signal SCN on the gate line GL is disabled (ie, has a low logic), the second thin film transistor MN2 is supplied from the data line DL to the control node CN. The pixel driving signal Vds to be blocked is blocked. The storage capacitor Cst charges the pixel driving signal Vds which is supplied to the control node CN in a period where the second thin film transistor MN2 is turned on. The pixel driving signal Vds charged in the storage capacitor Cst is maintained until the second thin film transistor MN2 is turned on again (ie, for one frame period). As the pixel driving signal is maintained by the storage capacitor Cst, the first thin film transistor MN1 maintains a constant amount of current flowing through the organic light emitting diode OLED. Accordingly, the organic light emitting diode OLED continuously emits light corresponding to the amount of current to display the flash point.

As such, since the organic light emitting diode OLED continuously responds to the amount of current controlled by the first thin film transistor MN1, the movement characteristics of the majority carriers may deteriorate. The deterioration of the multi-carrier transfer characteristic causes the threshold voltage Vel of the organic light emitting diode OLED to increase. In addition, the low potential voltage VSS applied to the storage capacitor Cst and the source electrode of the first thin film transistor MN1 also has a ground voltage (that is, “0 V” due to the impedance characteristic of the low potential voltage line LVL). Have a higher positive voltage level or lower negative voltage level. The variation of the low potential voltage VSS is further increased by scanning another electroluminescent pixel on another gate line of the display panel. The increase in the threshold voltage Vel and the deviation of the low potential voltage VSS of the organic light emitting diode OLED prevent the light emission characteristic of the organic electroluminescent device from accurately responding to the voltage characteristic of the pixel driving signal. As a result, the luminance of the image displayed by the organic electroluminescent panel and the display device including the organic electroluminescent pixel of the related art is lowered as well as uneven. As a result, the organic electroluminescent display panel and the display apparatus of the related art were difficult to provide a high quality image.

Next, embodiments of the present invention will be described in detail with reference to the accompanying drawings. 2 is a circuit diagram illustrating in detail an electroluminescent pixel according to an exemplary embodiment of the present invention. Referring to FIG. 2, an electroluminescent pixel according to an exemplary embodiment of the present invention is configured to control an amount of current flowing through an organic light emitting diode OLED connected between a reference node RN and a first voltage line FVL. The first thin film transistor MN21 is provided. The first thin film transistor MN21 may have a first voltage line from the second voltage line SVL via the reference node RN and the organic EL device OLED based on the voltage level on the control node CN. Adjust the amount of current flowing to FVL). As the voltage supplied from the control node CN to the gate electrode of the first thin film transistor MN21 increases, the second voltage line SVL passes through the reference node RN and the organic light emitting diode OLED. The amount of current flowing toward one voltage line FVL increases. As the amount of current flowing through itself increases, the organic light emitting diode OLED emits a lot of light.

The organic electroluminescent pixel of FIG. 1 includes a second thin film transistor MN22 for switching the pixel driving signal Vds to be supplied to the control node CN from the data line DL; And a capacitor Cst connected between the control node CN and the reference node IN. When the scan signal SCN on the gate line GL is enabled (that is, has a high logic), the second thin film transistor MN22 has a control node of the pixel driving signal Vds on the data line DL. To be supplied to (CN). On the other hand, when the scan signal SCN on the gate line GL is disabled (ie, has a low logic), the second thin film transistor MN22 is supplied from the data line DL to the control node CN. The pixel driving signal Vds to be blocked is blocked.

The capacitor Cst charges the pixel driving signal Vds during the period in which the scan signal SCN is enabled. In the radiation period, the capacitor Cst compensates for the voltage of the charged pixel voltage signal Vds by the voltage variation on the first voltage line FVL and the threshold voltage Vel of the organic EL device OLED, and compensates for the voltage. The voltage is supplied to the gate electrode of the first thin film transistor MN21.

In the voltage compensation operation of the capacitor Cst, unlike the low potential voltage VSS is supplied to the first voltage line FVL, the reference potential voltage Vref and the high potential voltage VDD are the second voltage line SVL. By alternating-supplying). The reference potential voltage Vref is supplied to the second voltage line SVL at least in a period in which the scan signal SCN is enabled (that is, in a period in which the pixel driving signal Vds is charged in the capacitor Cst). . The reference potential voltage Vref is set to have the same or almost the same voltage level as the low potential voltage VSS. On the other hand, the high potential voltage VDD is in a period in which the scan signal SCN is disabled (that is, in a period in which the capacitor Cst maintains the voltage of the pixel driving signal Vds charged) or a part thereof. It is supplied to the second voltage line SVL.

The first thin film transistor responds to the pixel driving signal Vds + Vel + Δ VSS compensated by the variation of the threshold voltage Vel and the low potential voltage VSS of the organic light emitting diode OLED by the capacitor Cst. The MN21 causes a current that is proportional to (or corresponding to) the voltage of the pixel driving signal Vds to flow to the organic EL device OLED. The amount of light emitted from the organic light emitting diode OLED is independent of the rise of the threshold voltage Vel and the variation of the driving voltage (ie, the low potential voltage VSS) of the organic light emitting diode OLED. It only increases or decreases according to the voltage of Vds. Accordingly, the electroluminescent pixel of FIG. 2 has a light emission characteristic that accurately responds to the pixel driving signal Vds regardless of the degradation of the organic electroluminescent element and the variation of the power supply voltage (ie, the low potential voltage VSS). Can provide.

3 is a timing chart illustrating a method of driving an electroluminescent pixel of FIG. 2. In Fig. 3, the scan signal SCN is a specific logic for a period corresponding to 10 to 50% (preferably 30%) of the horizontal synchronization signal during the frame period (i.e., for one vertical synchronization signal). (E.g., high logic) is enabled and the rest of the period is disabled in the state of the underlying logic (e.g., low logic). The pixel drive signal Vds also has a data line during a period corresponding to 10 to 50% (preferably 30%) of the horizontal synchronization signal (that is, a period during which the scan signal SCN is enabled in a high logic state). (DL) is supplied. The reference potential voltage Vref is supplied to the second voltage line SVL only in the enable period of the scan signal SCN, or 10 to 50% of the frame period including the enable period of the scan signal SCN (preferably It is supplied to the second voltage line SVL for a period corresponding to 30%) (for convenience, referred to as "scanning period (SCT)"). Finally, the high potential voltage VDD is a period corresponding to 50 to 90% (preferably 70%) of the disable period or the frame period of the scan signal SCN (hereinafter referred to as the "radiation period EMT"). ) May be supplied to the second voltage line SVL.

As the voltage supplied to the second voltage line SVL is switched, the electroluminescent pixel may alternately perform a scan operation SCT and an emission operation EMT. In other words, the electroluminescent pixel performs a scan operation in a period (SCT) in which the reference potential voltage (Vref) is supplied to the second voltage line (SVL), and a high potential voltage (VDD) in the second voltage line (SVL). In this supplied period EMT, a spinning operation is performed. In the scan operation period SCT of the electroluminescent pixel, the pixel driving signal Vds may be continuously supplied to the data line DL. In this case, the voltage of the pixel driving signal Vds is changed at every enable period of the scan signal SCN.

The scan operation period SCT is subdivided into a sampling period SPT and a floating period FLT according to a state in which the scan signal SCN on the gate line GL corresponding to the electroluminescent pixel is enabled or disabled. Can be. The sampling operation SPT is performed in a period in which the scan signal SCN on the gate line GL corresponding to the electroluminescent pixel is enabled with a specific logic (ie, high logic), while the floating operation FLP is performed in the electroluminescence. The scan signal SCN corresponding to the pixel is performed in the period in which it is disabled by the basis logic (ie, low logic). The electroluminescent pixel charges the pixel drive signal Vds from the data line DL on the basis of the reference potential voltage Vref during the sampling operation period SPT, and drives the charged pixel during the floating operation period FLT. Hold the signal Vds.

The sampling operation period may be disposed at the start, end, or middle part (ie, before, after, or in the middle of the floating period) of the scan operation period, depending on the position on the display panel of the electroluminescent pixel. When the sampling operation period SPT is located in the middle of the floating operation period FLT, in the floating operation period FLTp before the sampling operation period, the electroluminescent pixel receives the voltage of the pixel driving signal Vds charged in the previous frame. On the other hand, in the floating operation period FLTu later than the sampling operation period, the electroluminescent pixel maintains the voltage of the pixel driving signal Vds of the current frame updated by the sampling operation.

In the radiation operation period EMT, both the pixel driving signal Vds and the scan signal SCN are disabled. In other words, both the data line DL and the gate line GL may be in a floating state. The electroluminescent pixel uses the voltage of the charged pixel driving signal Vds during the radiation operation period EMT to set the threshold voltage Vel of the organic electroluminescent element OLED and the low potential voltage at the first voltage line FVL. Compensate for changes in (VSS). In addition, the electroluminescent pixel adjusts the amount of current flowing through the organic electroluminescent element OLED based on the compensated pixel driving voltage. As a result, the organic light emitting diode OLED receives light having an amount of increase or decrease according to the voltage of the pixel driving signal Vds regardless of the increase of its threshold voltage Vel and the change of the low potential voltage VSS. Radiate.

As described above, the electroluminescent pixel of FIG. 2 has the sampling mode SPT and the floating mode FLT according to the level state of the voltage Vref / VDD on the second voltage line SVL and the logic state of the scan signal SCN. ) And radiation mode (EMT) may be performed sequentially. An operating state of the electroluminescent pixel according to the driving mode may be described as illustrated in FIGS. 4A to 4C. 4A to 4C, the solid line portion represents the operation circuit portion, while the dotted line portion represents the non-operation circuit portion.

4A illustrates a state in which the electroluminescent pixel of FIG. 2 is driven in a sampling mode. In the sampling mode SPT, the pixel driving signal Vds is in the data line DL, the low potential voltage VSS is in the first voltage line FVL, and the reference potential voltage Vref is in the second voltage line ( SVL). The scan signal SCN supplied to the gate line GL is enabled in a specific logic (ie, high logic) state. By the scan signal SCN of the specific logic, the second thin film transistor MN22 is turned on so that the pixel driving signal Vds on the data line DL is supplied to the control node CN. The pixel driving signal Vds on the control node CN turns on the first thin film transistor MN21 so that the reference potential voltage Vref on the second voltage line SVL is supplied to the reference node RN. The organic electroluminescent device OLED is turned because the reference potential voltage Vref on the reference node RN is not higher than its low voltage VSS on the first voltage line FVL by its threshold voltage Vel. -Is off. Accordingly, the capacitor Cst charges the voltage of the pixel driving signal Vds on the control node CN based on the reference potential voltage Vref. In other words, the capacitor Cst charges the difference voltage between the voltage of the pixel driving signal Vds and the reference potential voltage Vref.

4B illustrates a state in which the electroluminescent pixel of FIG. 2 is driven in a floating mode. In the floating mode FLT, similarly to the sampling mode SPT, the pixel driving signal Vds, the low potential voltage VSS, and the reference potential voltage Vref are divided into the data line DL, the first voltage line FVL, and the first voltage line FVL. 2 voltage lines SVL are respectively supplied. On the other hand, the scan signal SCN supplied to the gate line GL is disabled to a base logic (ie, low logic) state. By the scan signal SCN of the basis logic, the second thin film transistor MN22 is turned off so that the pixel driving signal Vds on the data line DL is not supplied to the control node CN. The first thin film transistor MN21 is turned on by the pixel driving signal Vds charged in the capacitor Cst so that the reference potential voltage Vref on the second voltage line SVL is the reference node RN. To be supplied. The organic electroluminescent device OLED is turned because the reference potential voltage Vref on the reference node RN is not higher than its low voltage VSS on the first voltage line FVL by its threshold voltage Vel. -Is off. Accordingly, the capacitor Cst maintains the voltage of the pixel driving signal Vds charged based on the reference potential voltage Vref.

4C illustrates a state in which the electroluminescent pixel of FIG. 2 is driven in a radiation mode. In the radiation mode, the scan signal SCN is disabled in the base logic (ie, low logic) state and the pixel drive signal Vds is not supplied to the data line DL. On the other hand, instead of the reference potential voltage Vref, the high potential voltage VDD is supplied to the second voltage line SVL and the low potential voltage VSS is still supplied to the first voltage line FVL. By the scan signal SCN of the basis logic, the second thin film transistor MN22 is turned off to electrically separate the data line DL from the control node CN. The first thin film transistor MN21 is turned on by the pixel driving signal Vds charged in the capacitor Cst so that the high potential voltage VDD on the second voltage line SVL is applied to the reference node RN. To be supplied. The organic light emitting diode OLED is turned on by the high potential voltage VDD on the reference node RN to drain and source electrodes of the first thin film transistor MN21 from the second voltage line SVL, A current path leading to the first voltage line FVL is formed via the reference node RN and the anode electrode and the cathode electrode of the organic light emitting element OLED. In this case, a sum voltage of the low potential voltage VSS and the threshold voltage Vel of the organic light emitting diode OLED is displayed at the reference node RN. The capacitor Cst rises-compensates the voltage of the charged pixel driving signal Vds by the voltage (Vel + VSS) on the reference node RN, so that the rise-compensated voltage (Vds-Vref + Vel + VSS). Is supplied to the control node CN. Accordingly, the first thin film transistor MN21 has an amount of current that is proportional to (or corresponding to) the voltage level of the pixel driving signal Vds due to the rising-compensated voltage on the control node CN. It flows to the element OLED. This is because the capacitor Cst is induced by supplying the second potential voltage VDD to the second voltage line SVL in the sampling mode SPT and the high potential voltage VDD instead of the reference potential voltage Vref in the radiation mode. This is because the threshold voltage Vth of the electroluminescent element OLED and the variation ΔVSS of the low potential voltage VSS on the first voltage line FVL are compensated for. In this case, the amount of current Ioled flowing in the organic light emitting diode OLED is determined as in Equation 1.

Ioled = k (Vgs- (Vel + Vth)) 2/2, Vgs = Vds-Vref + Vel + VSS, k = μ N C SiNx · W / L

Ioled = k / 2 · (Vds + Vel + VSS-Vref -Vel-Vth) ²

= k / 2 · (Vds + ΔVSS-Vth) ² , ΔVSS = VSS-Vref

Accordingly, the amount of current Ioled flowing in the organic light emitting diode OLED is independent of the fluctuation of the threshold voltage Vel and the low potential voltage VSS of the organic light emitting diode OLED. Only the voltage level of is affected.

In fact, when the low potential voltage VSS fluctuates in the range of ± 1V with respect to 0V while the threshold voltage Vel of the organic EL device is fixed at a constant voltage level, the electric field of the related art of FIG. The amount of current flowing through the organic electroluminescent element of the light emitting pixel is greatly changed to about 24.11% as shown in FIG. 5A. Alternatively, in the electroluminescent pixel of the related art of FIG. 1, the organic light emitting diode OLED may be connected between the source electrode of the first thin film transistor MN1 and the low potential voltage line LVL. In this case, when the threshold voltage Vel of the organic light emitting diode OLED is changed within a range of ± 1 V, the amount of current flowing through the organic light emitting diode OLED changes by about 30%. On the other hand, in the electroluminescent pixel of FIG. 2, even if the threshold voltage of the low potential voltage VSS and / or the organic electroluminescent element OLED varies in a range of about ± 1 V, the amount of current flowing through the organic electroluminescent element is shown in FIG. 5B. As small as 3.39%.

As described above, since the current flowing in the organic light emitting diode OLED is controlled only by the pixel driving signal Vds, the light emission characteristic of the organic light emitting diode OLED may accurately respond to the pixel driving signal Vds. . The organic electroluminescent display panel including the organic electroluminescent pixel has a constant luminance that accurately responds only to the voltage of the pixel driving signal Vds even when the threshold voltage and the low potential voltage VSS of the organic electroluminescent element OLED change. Has characteristics. In addition, since the organic light emitting diode OLED is turned off during the scan period SCT, the electroluminescent pixel and the display panel and the device including the same may be driven in an impulse manner to reduce motion blur. As a result, the organic electroluminescent display panel and the organic electroluminescent display can provide a high quality image.

6 is a circuit diagram illustrating an electroluminescent pixel according to another exemplary embodiment of the present invention. The electroluminescent pixel of FIG. 6 has the same structure as the electroluminescent pixel of FIG. 2 except for further including the 3rd thin film transistor MN23 connected in parallel with the 1st thin film transistor MN21. Components of FIG. 6 having the same functions, operations, and names as those shown in FIG. 2 will be referred to by the same reference numerals as in FIG. 2. Also, detailed descriptions of the components of FIG. 6 that are identical to those of FIG. 2 will be omitted, as is already apparent from FIG. 2. In addition, the electroluminescent pixel of FIG. 6 is driven in the sampling mode, the floating mode, and the radiation mode as shown in FIGS. 7A to 7C according to the waveform diagram of FIG. 3, similarly to the electroluminescent pixel of FIG. 2. The description of the floating operation and the radiation operation of the electroluminescent pixel of FIG. 6 will be omitted since it is the same as the floating operation and the radiation operation of the electroluminescent pixel of FIG. 2.

The third thin film transistor MN23 selectively forms an auxiliary current path between the second voltage line SVL and the reference node RN in response to the scan signal SCN on the gate line GL. Specifically, the third thin film transistor MN23 is shown in FIG. 7B only in the sampling operation period SPT of the electroluminescent pixel in which the scan signal SCN is enabled in a specific logic (ie, high logic) state. As such, an auxiliary current path is formed. The auxiliary current path is connected in parallel with the main current path formed between the second voltage line SVL and the reference node RN by the first thin film transistor MN21, so that the second voltage line SVL and the reference node are parallel to each other. Make the impedance between (RN) very small. Accordingly, even when the voltage of the pixel driving signal Vds is low in the sampling mode, the reference potential voltage Vref on the second voltage line SVL is transmitted to the reference node RN without attenuation. The capacitor Cst can accurately charge the pixel driving signal Vds supplied from the data line DL via the second thin film transistor MN22 based on the reference potential voltage Vref. In other words, even when the voltage of the pixel drive signal Vds is low, the capacitor Cst can accurately charge the difference voltage between the pixel drive signal Vds and the reference potential voltage Vref. Accordingly, in the emission mode EMT, the amount of current flowing through the organic light emitting diode OLED may accurately respond to the low voltage pixel driving signal Vds. Furthermore, the electroluminescent pixel of FIG. 6 may provide a light emission characteristic that varies linearly according to the pixel driving signal Vds.

When the pixel driving signal Vds having a low voltage (for example, about 0 to 3 V) is supplied to the data line DL, the amount of current flowing through the organic electroluminescent element OLED of the electroluminescent pixel of FIG. As shown in FIG. 8A, the current flows in a substantially stepped shape, whereas the amount of current flowing through the organic light emitting diode OLED of the electroluminescent pixel of FIG. 6 changes to a nearly linear shape as shown in FIG. 8B. As a result, the electroluminescent pixel of FIG. 6 can provide a light emission characteristic that accurately responds to the low voltage pixel driving signal Vds.

9 is a block diagram illustrating an EL display device according to still another embodiment of the present invention. Referring to FIG. 9, an electroluminescent display according to another exemplary embodiment of the present invention may include a gate driver 12 sequentially scanning the gate lines GL1 to GLn on the electroluminescent display panel 10; And a data driver 14 driving a plurality of data lines DL1 to DLm on the electroluminescent display panel 10. The electroluminescent display panel 10 is divided into a plurality of pixel regions arranged in a matrix form by the gate lines GL1 to GLn and the data lines DL1 to DLm. In each of the pixel regions, an electroluminescent pixel ELP is formed. Each of the electroluminescent pixels ELP may be composed of an organic electroluminescent element OLED, a capacitor Cst, and first and second thin film transistors MN21 and MN22 as shown in FIG. 2. In contrast, each of the EL pixels ELP may be formed of an organic EL device, a capacitor Cst, and first to third thin film transistors MN21 to MN23, as illustrated in FIG. 6. have. Since functions and effects of each of the electroluminescent pixels ELP are clearly shown through the description of FIGS. 2 to 8, a detailed description thereof will be omitted.

The gate driver 12 generates a plurality of scan signals SCN1 to SCNn that are sequentially and exclusively enabled in a state of a specific logic (eg, high logic). The enable period of each of the scan signals SCN1 to SCNn corresponds to about 10 to 50% (preferably 30%) of the period of one horizontal sync signal Hsync. In other words, the gate driver 12 includes a plurality of gate lines in the scan period SCT corresponding to about 10 to 50% (preferably 30%) of the frame period (ie, the period of one vertical synchronization signal). Scan (GL1 ~ GLn) in sequential and exclusive form. Each of the scan signals SCN1 to SCNn is supplied to a corresponding gate line GL1 to GLn on the electroluminescent display panel 10. In order to generate scan signals SCN1 to SCNn, the gate driver 12 responds to the gate control signal GCS. The gate control signal GCS includes a gate start pulse GSP and at least one gate clock GCLK. The gate start pulse GSP is enabled in a state of a specific logic (eg, high or low logic) once every frame period (that is, every period of the vertical synchronization signal Vsync). The enable period of the gate start pulse GSP is set to correspond to about 10 to 50% (preferably 30%) of one horizontal synchronization signal. The at least one gate clock GCLK has about 10 to 50% (preferably 30%) of the period of the horizontal synchronization signal.

The data driver 14 inputs one line of pixel data VDi every 10 to 50% (preferably 30%) of the period of the horizontal synchronization signal, and inputs the inputted pixel data VDi. VDi is converted into analog pixel driving signals Vds1 to Vdsm. Pixel data is supplied from the timing controller 16 to the data driver 14. One line of pixel driving signals Vds1 to Vdsm generated by the data driver 14 has a voltage level of positive polarity corresponding to a logic value of pixel data. The pixel driving signals Vds1 to Vdsm for one line are respectively supplied to the corresponding data lines DL1 to DLm on the electroluminescent display panel 10. In order to perform the input and conversion operations of the pixel data, the data driver 14 responds to the data control signal DCS. The data control signal DCS includes a data clock DCLK indicating an input period of pixel data and a data enable signal DE indicating an output period of pixel driving signals for one line.

The timing controller 16 generates the gate control signal GCS and the data control signal DCS using the synchronization signal SYNC from an external video source. The sync signal sync includes a vertical sync signal Vsync, a horizontal sync signal Hsync, a data clock DCLK, and a data enable signal DE. The operation timings of the gate driver 12 and the swing voltage generator 20 are controlled by the gate control signal GCS. The data control signal DCS controls the operation timing of the data driver 14. In addition, the timing controller 24 scans the pixel data VDf for one frame supplied from the external video source to the data driver 14 by about 10 to 50% (preferably 30%) of the frame period. The data is transferred to the data driver 14 one by one in SCT.

The electroluminescent display of FIG. 7 further includes a voltage generator 18 for generating a drive voltage necessary for driving the electroluminescent display panel 10. The voltage generator 18 generates a high potential voltage VDD and a low potential voltage VSS. The high potential voltage VDD will have a voltage level on the order of approximately 5-15V and the low potential voltage VSS will have a base voltage of 0V. The high potential voltage VDD is supplied only to the swing voltage generator 20, and the low potential voltage VSS is a first voltage line (FVL in FIGS. 2 and 6) and a swing voltage generator on the electroluminescent display panel 10. 20 is supplied.

The swing voltage generator 20 alternately supplies the reference potential voltage Vref and the high potential voltage VDD to the second voltage line (SVL in FIGS. 2 and 6) on the electroluminescent display panel 10. To this end, the swing voltage generator 20 uses the high potential and low potential voltages VDD, VSS from the drive voltage generator 16 to maintain a constant voltage level that is equal to, or slightly higher or lower than, the low potential voltage VSS. Generate a reference potential voltage Vref that maintains. In addition, the swing voltage generator 20 alternately supplies the reference potential voltage Vref and the high potential voltage VDD to the second voltage line SVL on the electroluminescent display panel 10. The reference potential voltage Vref is supplied to the second voltage line SVL on the electroluminescent display panel 10 during the scan period SCT during the frame period, while the high potential voltage VDD is supplied during the radiation period during the frame period. The second voltage line SVL on the electroluminescent display panel 10 is supplied during the EMT period. In order to switch the reference potential voltage Vref and the high potential voltage VDD in the swing voltage generator 20, the swing voltage generator 20 is controlled by the timing controller 16. For example, the swing voltage generator 20 may switch between the reference potential voltage Vref and the high potential voltage VDD in response to the gate start pulse GSP generated by the timing controller 16. In this case, the swing voltage generator 20 may include a monostable multivibrator for setting the scan period SCT. Alternatively, the swing voltage generator 20 may be configured to display the first voltage on the electroluminescent display panel 10 as the reference potential voltage Vref instead of the reference potential voltage Vref during the scan period SCT. It may be supplied to the two voltage lines SVL. In addition, the swing voltage generator 20 may be formed on the EL display panel 10. Furthermore, the reference potential voltage Vref may be generated together with the low potential and high potential voltages VSS and VDD in the voltage generator 18. In this case, the swing voltage generator 20 will input the high potential voltage VDD and the reference potential voltage Vref.

As the reference potential voltage Vref and the high potential voltage VDD are switched according to the scan period SCT and the emission period EMT, the electroluminescent pixels ELP on the electroluminescent display panel 10 are formed in the emission period. EMT) simultaneously emits light corresponding to the voltage of the pixel driving signal Vds. In the scan period SCT in which the reference potential voltage Vref is supplied to the second voltage line SVL, the electroluminescent pixels ELP on the electroluminescent display panel 10 are scanned signals on the corresponding gate line GL. As the SCN is enabled, the pixel driving signal Vds is sequentially charged by one line. The electroluminescent pixels on the same gate line GL have their voltages of the pixel driving signal Vds on the corresponding data line DL in a period during which the scan signal SCN on the gate line GL is enabled. The capacitor Cst is charged at the same time. At this time, the capacitor Cst of each of the EL pixels is charged with the voltage of the pixel driving signal Vds based on the reference potential voltage Vref. In other words, each of the electroluminescent pixels ELP on the same gate line GL charges a voltage difference between the voltage of the pixel driving signal Vds and the reference potential voltage Vref on the corresponding data line DL. . In addition, while the scan signal SCN on the corresponding gate line GL is disabled (that is, the floating period FLT) during the scan period SCT, the electroluminescent pixels ELP are charged with the pixel driving signal. Maintain a voltage of (Vds). In addition, the organic light emitting diode OLED included in each of the electroluminescent pixels ELP may have a reference potential voltage substantially equal to the low potential voltage VSS on the first voltage line FVL during the scan period SCT. Vref) is turned off so that no light is emitted.

The electroluminescent pixel on the electroluminescent display panel 10 during the radiation period EMT in which the high potential voltage VDD is supplied to the second voltage line SVL on the electroluminescent display panel 10 instead of the reference potential voltage Vref. Both ELPs change the voltage of the charged pixel driving signal Vds by the threshold voltage Vel of the organic light emitting diode OLED and the variation of the low potential voltage VSS on the first voltage line FVL (ie, Up-compensation is performed at the same time by the sum voltage of DELTA VSS = VSS-Vref). In addition, the electroluminescent pixels ELP simultaneously adjust the amount of current flowing through their organic electroluminescent elements by the voltage of the rising-compensated pixel driving signal. Accordingly, the electroluminescent pixels ELP on the electroluminescent display panel 10 drive the pixels even if the threshold voltage Vel and / or the low potential voltage VSS of the organic electroluminescent element OLED change. An amount of light corresponding to (or proportional to) the voltage level of the signal Vds may be emitted.

As such, since the light emission characteristic of the organic light emitting diode OLED accurately responds to the pixel driving signal Vds, all of the electroluminescent pixels ELP on the electroluminescent display panel 10 are organic EL devices. Even if the threshold voltage Vel and the low potential voltage VSS of the OLED are changed, only the voltage of the pixel driving signal Vds is correctly responded. Accordingly, the electroluminescent display panel 10 can stably maintain uniform luminance characteristics, and further, the electroluminescent display panel and the organic electroluminescent display can provide a high quality image.

In addition, as the reference potential voltage Vref and the high potential voltage VDD are switched according to the scan period SCT and the emission period EMT, the driving voltages (that is, the first and second voltages) in the emission period EMT. Variations in the low potential and high potential voltages VSS and VDD on the lines FVL and SVL are minimized, and the non-display period corresponding to the scan period is alternated with the display period corresponding to the radiation period. Accordingly, the amount of light emitted during the emission period can be stably maintained, and the electroluminescent pixels ELP on the electroluminescent display panel 10 are driven in an impulse manner. The electroluminescent display panel and the device not only stably maintain uniform luminance characteristics but also reduce motion blur, and further improve image quality.

As described above, the embodiments of the present invention have been described with reference to FIGS. 2 to 9, but a person having ordinary knowledge in the technical field to which the embodiments of the present invention belong are disclosed. It will be apparent that various modifications, changes and equivalent other embodiments are possible without departing from this. Therefore, the spirit and scope disclosed in the embodiments of the present invention should not be limited to the description of the embodiments, but should be set by the matter described in the appended claims.

1 is a circuit diagram showing an electroluminescent pixel of the related art.

2 is a circuit diagram illustrating an organic electroluminescent pixel according to an exemplary embodiment of the present invention.

3 is a timing chart illustrating a method of driving an electroluminescent pixel of FIG. 2.

4A through 4C are equivalent circuit diagrams illustrating operation states of respective driving modes of the electroluminescent pixel of FIG. 2.

FIG. 5A is a diagram illustrating a current characteristic of an organic EL device included in the organic EL pixel of FIG. 1.

FIG. 5B is a diagram illustrating current characteristics of the organic EL device included in the EL pixel of FIG. 2.

6 is a circuit diagram illustrating an electroluminescent pixel according to another exemplary embodiment of the present invention.

7A to 7C are equivalent circuit diagrams illustrating operation states of respective driving modes of the EL pixel of FIG. 6.

FIG. 8A is a diagram illustrating a current characteristic of an organic EL device included in the organic EL pixel of FIG. 2.

FIG. 8B is a diagram illustrating current characteristics of the organic EL device included in the EL pixel of FIG. 6.

9 is a block diagram illustrating an EL display device according to an exemplary embodiment.

`` Explanation of symbols for main parts of drawings ''

10 electroluminescent display panel 12 gate driver

14: data driver 16: timing controller

18: voltage generator 20: swing voltage generator

Cst: Capacitors MN21 to MN23: First to third thin film transistors

OLED: organic electroluminescent device

Claims (14)

A first voltage line carrying a first potential voltage; A second voltage line alternately transferring a second potential voltage and a reference potential voltage; An electroluminescent element connected between said first voltage line and a reference node; A first switch element for controlling an amount of current flowing from the second voltage line to the reference node in response to the voltage on the control node; A second switch element for switching a pixel driving signal to be supplied to the control node from a data line in response to a scan signal on a gate line; And And a capacitor connected between the control node and the reference node. The method of claim 1, And a third switch element connected in parallel with the first switch element and responsive to the scan signal. The method of claim 1, And the scan signal is enabled in a period during which the reference potential voltage is supplied to the second voltage line. The method of claim 1, And the reference potential voltage is substantially equal to the first reference potential voltage and has a voltage level lower than the second potential voltage. The method of claim 1, And the electroluminescent element is turned off while the reference potential voltage is supplied to the second voltage line. A plurality of gate lines; A plurality of data lines arranged to intersect the gate lines; A first voltage line carrying a first potential voltage; A second voltage line alternately transferring a second potential voltage and a reference potential voltage; And A plurality of electroluminescent pixels commonly connected to the first and second voltage lines and connected to the data line and the gate line, each of the electroluminescent pixels An electroluminescent element connected between said first voltage line and a reference node; A first switch element for controlling an amount of current flowing from the second voltage line to the reference node in response to the voltage on the control node; A second switch element for switching a pixel driving signal to be supplied from the data line to the control node in response to a scan signal on the gate line; And And a capacitor connected between the control node and the reference node. The method of claim 6, And a third switch element connected in parallel with the first switch element and responsive to the scan signal. The method of claim 6, And a voltage switching unit for alternately switching between the reference potential voltage and the second potential voltage to be supplied to the second voltage line in response to a control signal. A plurality of electroluminescent pixels connected in common to the first and second voltage lines and respectively corresponding to corresponding gate lines of the plurality of gate lines and corresponding data lines of the plurality of data lines, each of the electroluminescent pixels An electroluminescent element connected between the first voltage line and a reference node, a first switch element for controlling an amount of current flowing from a second voltage line to a reference node in response to a voltage on a control node, in response to a scan signal on the gate line An electroluminescent display panel comprising a second switch element for switching a pixel drive signal to be supplied from the data line to the control node, and a capacitor connected between the control node and the reference node; A gate driver scanning the gate lines; A data driver supplying pixel driving signals to the data lines; A voltage generator supplying the first potential voltage to the first voltage line; And And a swing voltage generator configured to alternately supply the reference potential voltage and the second potential voltage to the second voltage line. The method of claim 9, And the gate driver sequentially scans the gate lines while the reference potential voltage is supplied to the second voltage line. The method of claim 10, And the swing voltage generator supplies the reference potential voltage to the second voltage line for a period corresponding to 10 to 50% of a frame period. The method of claim 9, And the reference potential voltage is substantially equal to the first reference potential voltage and lower than the second potential voltage. Supplying a first potential voltage to the electroluminescent pixels on the display panel; Supplying a reference potential voltage to the electroluminescent pixels; Writing a pixel driving signal to each of the electroluminescent pixels; And And supplying a second potential voltage to the electroluminescent pixels instead of the reference potential voltage so that each of the electroluminescent pixels emits light corresponding to the voltage of the pixel driving signal. Method of driving the display device. The method of claim 13, And the reference potential voltage is substantially equal to the first reference potential voltage and lower than the second potential voltage.

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